From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757942AbcJaCmh (ORCPT ); Sun, 30 Oct 2016 22:42:37 -0400 Received: from mail-yw0-f195.google.com ([209.85.161.195]:34836 "EHLO mail-yw0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757912AbcJaCmf (ORCPT ); Sun, 30 Oct 2016 22:42:35 -0400 Date: Sun, 30 Oct 2016 21:42:32 -0500 From: Rob Herring To: Minghuan Lian Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Shawn Guo , Marc Zyngier , Mingkai Hu , Stuart Yoder , Yang-Leo Li , Scott Wood Subject: Re: [PATCH 2/6] arm: dts: ls1021a: update MSI node Message-ID: <20161031024232.wqvfrcinrp2aqgxu@rob-hp-laptop> References: <1477398945-22774-1-git-send-email-Minghuan.Lian@nxp.com> <1477398945-22774-2-git-send-email-Minghuan.Lian@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1477398945-22774-2-git-send-email-Minghuan.Lian@nxp.com> User-Agent: Mutt/1.6.2-neo (2016-08-21) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Oct 25, 2016 at 08:35:41PM +0800, Minghuan Lian wrote: > 1. Change compatible to "fsl,ls-scfg-msi" That is obvious from the diff. Write your commit message to answer the question Why? This also breaks compatibility with old DTBs. > 2. Move two MSI dts node into the parent node "msi-controller". > So a PCIe device can request the MSI from the two MSI controllers. > > Signed-off-by: Minghuan Lian > --- > arch/arm/boot/dts/ls1021a.dtsi | 28 ++++++++++++++++------------ > 1 file changed, 16 insertions(+), 12 deletions(-) > > diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi > index 368e219..7a3b510 100644 > --- a/arch/arm/boot/dts/ls1021a.dtsi > +++ b/arch/arm/boot/dts/ls1021a.dtsi > @@ -119,18 +119,22 @@ > > }; > > - msi1: msi-controller@1570e00 { > - compatible = "fsl,1s1021a-msi"; > - reg = <0x0 0x1570e00 0x0 0x8>; > + msi: msi-controller { > + compatible = "fsl,ls-scfg-msi"; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > msi-controller; > - interrupts = ; > - }; > > - msi2: msi-controller@1570e08 { > - compatible = "fsl,1s1021a-msi"; > - reg = <0x0 0x1570e08 0x0 0x8>; > - msi-controller; > - interrupts = ; > + msi0@1570e00 { > + reg = <0x0 0x1570e00 0x0 0x8>; > + interrupts = ; > + }; > + > + msi1@1570e08 { > + reg = <0x0 0x1570e08 0x0 0x8>; > + interrupts = ; > + }; > }; > > ifc: ifc@1530000 { > @@ -643,7 +647,7 @@ > bus-range = <0x0 0xff>; > ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ > 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ > - msi-parent = <&msi1>; > + msi-parent = <&msi>; > #interrupt-cells = <1>; > interrupt-map-mask = <0 0 0 7>; > interrupt-map = <0000 0 0 1 &gic GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, > @@ -666,7 +670,7 @@ > bus-range = <0x0 0xff>; > ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */ > 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ > - msi-parent = <&msi2>; > + msi-parent = <&msi>; > #interrupt-cells = <1>; > interrupt-map-mask = <0 0 0 7>; > interrupt-map = <0000 0 0 1 &gic GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, > -- > 1.9.1 > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Subject: Re: [PATCH 2/6] arm: dts: ls1021a: update MSI node Date: Sun, 30 Oct 2016 21:42:32 -0500 Message-ID: <20161031024232.wqvfrcinrp2aqgxu@rob-hp-laptop> References: <1477398945-22774-1-git-send-email-Minghuan.Lian@nxp.com> <1477398945-22774-2-git-send-email-Minghuan.Lian@nxp.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <1477398945-22774-2-git-send-email-Minghuan.Lian-3arQi8VN3Tc@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Minghuan Lian Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Shawn Guo , Marc Zyngier , Mingkai Hu , Stuart Yoder , Yang-Leo Li , Scott Wood List-Id: devicetree@vger.kernel.org On Tue, Oct 25, 2016 at 08:35:41PM +0800, Minghuan Lian wrote: > 1. Change compatible to "fsl,ls-scfg-msi" That is obvious from the diff. Write your commit message to answer the question Why? This also breaks compatibility with old DTBs. > 2. Move two MSI dts node into the parent node "msi-controller". > So a PCIe device can request the MSI from the two MSI controllers. > > Signed-off-by: Minghuan Lian > --- > arch/arm/boot/dts/ls1021a.dtsi | 28 ++++++++++++++++------------ > 1 file changed, 16 insertions(+), 12 deletions(-) > > diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi > index 368e219..7a3b510 100644 > --- a/arch/arm/boot/dts/ls1021a.dtsi > +++ b/arch/arm/boot/dts/ls1021a.dtsi > @@ -119,18 +119,22 @@ > > }; > > - msi1: msi-controller@1570e00 { > - compatible = "fsl,1s1021a-msi"; > - reg = <0x0 0x1570e00 0x0 0x8>; > + msi: msi-controller { > + compatible = "fsl,ls-scfg-msi"; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > msi-controller; > - interrupts = ; > - }; > > - msi2: msi-controller@1570e08 { > - compatible = "fsl,1s1021a-msi"; > - reg = <0x0 0x1570e08 0x0 0x8>; > - msi-controller; > - interrupts = ; > + msi0@1570e00 { > + reg = <0x0 0x1570e00 0x0 0x8>; > + interrupts = ; > + }; > + > + msi1@1570e08 { > + reg = <0x0 0x1570e08 0x0 0x8>; > + interrupts = ; > + }; > }; > > ifc: ifc@1530000 { > @@ -643,7 +647,7 @@ > bus-range = <0x0 0xff>; > ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ > 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ > - msi-parent = <&msi1>; > + msi-parent = <&msi>; > #interrupt-cells = <1>; > interrupt-map-mask = <0 0 0 7>; > interrupt-map = <0000 0 0 1 &gic GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, > @@ -666,7 +670,7 @@ > bus-range = <0x0 0xff>; > ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */ > 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ > - msi-parent = <&msi2>; > + msi-parent = <&msi>; > #interrupt-cells = <1>; > interrupt-map-mask = <0 0 0 7>; > interrupt-map = <0000 0 0 1 &gic GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, > -- > 1.9.1 > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: robh@kernel.org (Rob Herring) Date: Sun, 30 Oct 2016 21:42:32 -0500 Subject: [PATCH 2/6] arm: dts: ls1021a: update MSI node In-Reply-To: <1477398945-22774-2-git-send-email-Minghuan.Lian@nxp.com> References: <1477398945-22774-1-git-send-email-Minghuan.Lian@nxp.com> <1477398945-22774-2-git-send-email-Minghuan.Lian@nxp.com> Message-ID: <20161031024232.wqvfrcinrp2aqgxu@rob-hp-laptop> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Tue, Oct 25, 2016 at 08:35:41PM +0800, Minghuan Lian wrote: > 1. Change compatible to "fsl,ls-scfg-msi" That is obvious from the diff. Write your commit message to answer the question Why? This also breaks compatibility with old DTBs. > 2. Move two MSI dts node into the parent node "msi-controller". > So a PCIe device can request the MSI from the two MSI controllers. > > Signed-off-by: Minghuan Lian > --- > arch/arm/boot/dts/ls1021a.dtsi | 28 ++++++++++++++++------------ > 1 file changed, 16 insertions(+), 12 deletions(-) > > diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi > index 368e219..7a3b510 100644 > --- a/arch/arm/boot/dts/ls1021a.dtsi > +++ b/arch/arm/boot/dts/ls1021a.dtsi > @@ -119,18 +119,22 @@ > > }; > > - msi1: msi-controller at 1570e00 { > - compatible = "fsl,1s1021a-msi"; > - reg = <0x0 0x1570e00 0x0 0x8>; > + msi: msi-controller { > + compatible = "fsl,ls-scfg-msi"; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > msi-controller; > - interrupts = ; > - }; > > - msi2: msi-controller at 1570e08 { > - compatible = "fsl,1s1021a-msi"; > - reg = <0x0 0x1570e08 0x0 0x8>; > - msi-controller; > - interrupts = ; > + msi0 at 1570e00 { > + reg = <0x0 0x1570e00 0x0 0x8>; > + interrupts = ; > + }; > + > + msi1 at 1570e08 { > + reg = <0x0 0x1570e08 0x0 0x8>; > + interrupts = ; > + }; > }; > > ifc: ifc at 1530000 { > @@ -643,7 +647,7 @@ > bus-range = <0x0 0xff>; > ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ > 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ > - msi-parent = <&msi1>; > + msi-parent = <&msi>; > #interrupt-cells = <1>; > interrupt-map-mask = <0 0 0 7>; > interrupt-map = <0000 0 0 1 &gic GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, > @@ -666,7 +670,7 @@ > bus-range = <0x0 0xff>; > ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */ > 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ > - msi-parent = <&msi2>; > + msi-parent = <&msi>; > #interrupt-cells = <1>; > interrupt-map-mask = <0 0 0 7>; > interrupt-map = <0000 0 0 1 &gic GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, > -- > 1.9.1 >