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Date: Tue, 1 Nov 2016 09:34:35 +0000
From: Russell King - ARM Linux <linux@armlinux.org.uk>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-pci@vger.kernel.org, Rob Herring <robh@kernel.org>,
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Subject: Re: [PATCH] PCI: Warn on possible RW1C corruption for sub-32 bit
 config writes
Message-ID: <20161101093435.GO1041@n2100.armlinux.org.uk>
References: <20161031213902.6340.96123.stgit@bhelgaas-glaptop.roam.corp.google.com>
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On Mon, Oct 31, 2016 at 04:39:02PM -0500, Bjorn Helgaas wrote:
> Hardware that supports only 32-bit config writes is not spec-compliant.
> For example, if software performs a 16-bit write, we must do a 32-bit read,
> merge in the 16 bits we intend to write, followed by a 32-bit write.  If
> the 16 bits we *don't* intend to write happen to have any RW1C (write-one-
> to-clear) bits set, we just inadvertently cleared something we shouldn't
> have.
> 
> Add a rate-limited warning when we do sub-32 bit config writes.  Remove
> similar probe-time warnings from some of the affected host bridge drivers.

Yay, I've been on about this for ages...

Enthusiastically-Acked-by: Russell King <rmk+kernel@armlinux.org.uk>

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