Re: [PATCH 2/2] drm/i915: Skip final clflush if LLC is coherent

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Mon, Nov 14, 2016 at 08:54:53AM +0000, Chris Wilson wrote:
> If the LLC is coherent with the object, we do not need to worry about
> whether main memory and cache mismatch when we hand the object back to
> the system.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Makes sense to me.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/i915_gem.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 4931bfcff2a2..3b021e9e3379 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -228,7 +228,8 @@ __i915_gem_object_release_shmem(struct drm_i915_gem_object *obj,
>  	if (obj->mm.madv == I915_MADV_DONTNEED)
>  		obj->mm.dirty = false;
>  
> -	if ((obj->base.read_domains & I915_GEM_DOMAIN_CPU) == 0)
> +	if ((obj->base.read_domains & I915_GEM_DOMAIN_CPU) == 0 &&
> +	    !cpu_cache_is_coherent(obj->base.dev, obj->cache_level))
>  		drm_clflush_sg(pages);
>  
>  	obj->base.read_domains = I915_GEM_DOMAIN_CPU;
> -- 
> 2.10.2
> 
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-- 
Ville Syrjälä
Intel OTC
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