From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47171) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c7PpA-0003lD-Ot for qemu-devel@nongnu.org; Thu, 17 Nov 2016 11:46:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1c7Pp7-0006DS-DL for qemu-devel@nongnu.org; Thu, 17 Nov 2016 11:46:08 -0500 Date: Thu, 17 Nov 2016 18:45:59 +0200 From: "Michael S. Tsirkin" Message-ID: <20161117184538-mutt-send-email-mst@kernel.org> References: <1479385863-7648-1-git-send-email-ann.zhuangyanying@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline In-Reply-To: <1479385863-7648-1-git-send-email-ann.zhuangyanying@huawei.com> Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v3] ivshmem: Fix 64 bit memory bar configuration List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Zhuangyanying Cc: marcandre.lureau@redhat.com, armbru@redhat.com, pbonzini@redhat.com, qemu-devel@nongnu.org, qemu-stable@nongnu.org, arei.gonglei@huawei.com On Thu, Nov 17, 2016 at 08:31:03PM +0800, Zhuangyanying wrote: > From: Zhuang Yanying >=20 > Device ivshmem property use64=3D0 is designed to make the device > expose a 32 bit shared memory BAR instead of 64 bit one. The > default is a 64 bit BAR, except pc-1.2 and older retain a 32 bit > BAR. A 32 bit BAR can support only up to 1 GiB of shared memory. >=20 > This worked as designed until commit 5400c02 accidentally flipped > its sense: since then, we misinterpret use64=3D0 as use64=3D1 and v= ice > versa. Worse, the default got flipped as well. Devices > ivshmem-plain and ivshmem-doorbell are not affected. >=20 > Fix by restoring the test of IVShmemState member not_legacy_32bit > that got messed up in commit 5400c02. Also update its > initialization for devices ivhsmem-plain and ivshmem-doorbell. > Without that, they'd regress to 32 bit BARs. >=20 > Cc: qemu-stable@nongnu.org > Signed-off-by: Zhuang Yanying > Reviewed-by: Gonglei > Reviewed-by: Marc-Andr=E9 Lureau this is malformed, pls shift it left to start at beginning of the line. > --- > hw/misc/ivshmem.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) >=20 > diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c > index 230e51b..abeaf3d 100644 > --- a/hw/misc/ivshmem.c > +++ b/hw/misc/ivshmem.c > @@ -858,7 +858,7 @@ static void ivshmem_common_realize(PCIDevice *dev, = Error **errp) > pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, > &s->ivshmem_mmio); > =20 > - if (!s->not_legacy_32bit) { > + if (s->not_legacy_32bit) { > attr |=3D PCI_BASE_ADDRESS_MEM_TYPE_64; > } > =20 > @@ -1045,6 +1045,7 @@ static void ivshmem_plain_init(Object *obj) > ivshmem_check_memdev_is_busy, > OBJ_PROP_LINK_UNREF_ON_RELEASE, > &error_abort); > + s->not_legacy_32bit =3D 1; > } > =20 > static void ivshmem_plain_realize(PCIDevice *dev, Error **errp) > @@ -1116,6 +1117,7 @@ static void ivshmem_doorbell_init(Object *obj) > =20 > s->features |=3D (1 << IVSHMEM_MSI); > s->legacy_size =3D SIZE_MAX; /* whatever the server sends */ > + s->not_legacy_32bit =3D 1; > } > =20 > static void ivshmem_doorbell_realize(PCIDevice *dev, Error **errp) > --=20 > 1.8.3.1 >=20