From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753152AbcKTUrL (ORCPT ); Sun, 20 Nov 2016 15:47:11 -0500 Received: from mail.skyhub.de ([78.46.96.112]:42344 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751522AbcKTUrK (ORCPT ); Sun, 20 Nov 2016 15:47:10 -0500 Date: Sun, 20 Nov 2016 21:47:02 +0100 From: Borislav Petkov To: Henrique de Moraes Holschuh Cc: Andy Lutomirski , Matthew Whitehead , Brian Gerst , "linux-kernel@vger.kernel.org" , X86 ML Subject: Re: [PATCH] x86/boot: Fail the boot if !M486 and CPUID is missing Message-ID: <20161120204701.5eo6jxzqy3ck3nuj@pd.tnic> References: <70eac6639f23df8be5fe03fa1984aedd5d40077a.1479598603.git.luto@kernel.org> <20161120111917.pw3alolx4fksfwbv@pd.tnic> <20161120173244.a2odm3rupohvatiq@pd.tnic> <20161120193442.GA1145@khazad-dum.debian.net> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20161120193442.GA1145@khazad-dum.debian.net> User-Agent: NeoMutt/20161014 (1.7.1) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, Nov 20, 2016 at 05:34:43PM -0200, Henrique de Moraes Holschuh wrote: > On Sun, 20 Nov 2016, Borislav Petkov wrote: > > We will have set (or not) the X86_FEATURE_CPUID bit at > > early_identify_cpu() time. Looking at the code, we do call sync_core() > > pretty early. :-\ > > Hmm, watch out for the early microcode update driver for Intel > processors should something get changed in the implementation, or in the > behavior of sync_core(). That's exactly what I had in mind when I wrote the above sentence... > That driver absolutely needs to issue a cpuid (with EAX = 1) before each > rdmsr(MSR_IA32_UCODE_REV). And it uses sync_core() calls to do it. A > CR2 access just won't do in this extremely specific case. > > This kind of pitfall is why I wanted to replace all use of sync_core() > in arch/x86/kernel/cpu/microcode/intel.c with an explicit use of an > inconditional cpuid(eax = 1)... > > (note: this protocol to read MSR_IA32_UCODE_REV was made an > architectural requirement a while ago -- it was once considered an > erratum workaround. It is documented in the "Intel 64 and IA‐32 > Architectures Software Developer's Manual", Volume 3A: System > Programming Guide, Part 1, section 9.11). Well, I'm looking at this: "CPUID returns a value in a model specific register in addition to its usual register return values. The semantics of CPUID cause it to deposit an update ID value in the 64-bit model-specific register at address 08BH (IA32_BIOS_SIGN_ID)." And I think yes, we should do an explicit CPUID(1) regardless of what happens to sync_core(). Feel free to send a patch against tip:x86/microcode. -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply.