From mboxrd@z Thu Jan 1 00:00:00 1970 From: marcel@ziswiler.com Subject: [RESEND PATCH 4/6] apalis-tk1: adjust pin muxing for v1.1 hw Date: Thu, 24 Nov 2016 02:04:54 +0100 Message-ID: <20161124010456.24604-5-marcel@ziswiler.com> References: <20161124010456.24604-1-marcel@ziswiler.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20161124010456.24604-1-marcel@ziswiler.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: devicetree@vger.kernel.org Cc: Mark Rutland , Alexandre Courbot , Stephen Warren , Marcel Ziswiler , linux-kernel@vger.kernel.org, Rob Herring , Russell King , Thierry Reding , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org List-Id: linux-tegra@vger.kernel.org From: Marcel Ziswiler Configure Apalis MMC1 D6 GPIO on SDMMC3_CLK_LB_IN as reserved function without any pull-up/down. Configure GPIO_PV2 as SD1_CD# according to latest V1.1 HW. Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output driver enabled aka not tristated and input driver enabled as well as it features some magic properties even though the external loopback is disabled and the internal loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 bits being set to 0xfffd according to the TRM! This pin is now a not-connect on V1.1 HW in order to avoid any interference. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra124-apalis.dtsi | 53 +++++++++++++++------------------- 1 file changed, 23 insertions(+), 30 deletions(-) diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi index 747ce81..2bfc579 100644 --- a/arch/arm/boot/dts/tegra124-apalis.dtsi +++ b/arch/arm/boot/dts/tegra124-apalis.dtsi @@ -414,18 +414,10 @@ nvidia,tristate = ; nvidia,enable-input = ; }; - /* - * Don't use MMC1_D6 aka SDMMC3_CLK_LB_IN for now as it - * features some magic properties even though the - * external loopback is disabled and the internal - * loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 - * register's SDMMC_SPARE1 bits being set to 0xfffd - * according to the TRM! - */ sdmmc3_clk_lb_in_pee5 { /* D6 GPIO */ nvidia,pins = "sdmmc3_clk_lb_in_pee5"; - nvidia,function = "sdmmc3"; - nvidia,pull = ; + nvidia,function = "rsvd2"; + nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; @@ -520,20 +512,12 @@ nvidia,tristate = ; nvidia,enable-input = ; }; - /* - * Don't use SD1_CD# aka SDMMC3_CLK_LB_OUT for now as it - * features some magic properties even though the - * external loopback is disabled and the internal - * loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 - * register's SDMMC_SPARE1 bits being set to 0xfffd - * according to the TRM! - */ - sdmmc3_clk_lb_out_pee4 { /* CD# GPIO */ - nvidia,pins = "sdmmc3_clk_lb_out_pee4"; - nvidia,function = "rsvd2"; - nvidia,pull = ; + sdmmc3_cd_n_pv2 { /* CD# GPIO */ + nvidia,pins = "sdmmc3_cd_n_pv2"; + nvidia,function = "rsvd3"; + nvidia,pull = ; nvidia,tristate = ; - nvidia,enable-input = ; + nvidia,enable-input = ; }; /* Apalis SPDIF */ @@ -1512,13 +1496,6 @@ nvidia,tristate = ; nvidia,enable-input = ; }; - sdmmc3_cd_n_pv2 { /* NC */ - nvidia,pins = "sdmmc3_cd_n_pv2"; - nvidia,function = "rsvd3"; - nvidia,pull = ; - nvidia,tristate = ; - nvidia,enable-input = ; - }; gpio_x1_aud_px1 { /* NC */ nvidia,pins = "gpio_x1_aud_px1"; nvidia,function = "rsvd2"; @@ -1568,6 +1545,22 @@ nvidia,tristate = ; nvidia,enable-input = ; }; + /* + * Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output + * driver enabled aka not tristated and input driver + * enabled as well as it features some magic properties + * even though the external loopback is disabled and the + * internal loopback used as per + * SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 + * bits being set to 0xfffd according to the TRM! + */ + sdmmc3_clk_lb_out_pee4 { /* NC */ + nvidia,pins = "sdmmc3_clk_lb_out_pee4"; + nvidia,function = "sdmmc3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; }; }; -- 2.9.3 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S964794AbcKXBMJ (ORCPT ); Wed, 23 Nov 2016 20:12:09 -0500 Received: from mout.perfora.net ([74.208.4.197]:50416 "EHLO mout.perfora.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935292AbcKXBMG (ORCPT ); Wed, 23 Nov 2016 20:12:06 -0500 X-Greylist: delayed 355 seconds by postgrey-1.27 at vger.kernel.org; Wed, 23 Nov 2016 20:12:06 EST From: marcel@ziswiler.com To: devicetree@vger.kernel.org Cc: Marcel Ziswiler , Thierry Reding , linux-kernel@vger.kernel.org, Stephen Warren , Rob Herring , linux-tegra@vger.kernel.org, Mark Rutland , Alexandre Courbot , Russell King , linux-arm-kernel@lists.infradead.org Subject: [RESEND PATCH 4/6] apalis-tk1: adjust pin muxing for v1.1 hw Date: Thu, 24 Nov 2016 02:04:54 +0100 Message-Id: <20161124010456.24604-5-marcel@ziswiler.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20161124010456.24604-1-marcel@ziswiler.com> References: <20161124010456.24604-1-marcel@ziswiler.com> X-Provags-ID: V03:K0:UvIsDGwj+m1ng6oWF0gKrNfVWiPDp3gPXJlWPVqnREYJlR9+noU FKAr6V7kJ1m6Wwp/Iqt4knMV7e7nHEfudz9vitsA85lWx3d/LpGrPCG9AzEgtvitXqfrQ0D 65OmCYpXcv9vF+T6QoCcvQBMmT+dsNw+9odzMSyAxL7M3Z7jgjN/TACTsv5JToJItLvQO34 srSObHl/hrQ4mh33J3ocg== X-UI-Out-Filterresults: notjunk:1;V01:K0:BDwMLg2UJzE=:NnO6JZA9bQ7jIg4FY6qFHM G9AY6BgMWnLJYhtDX72+BfkQZzcjo612x9+nihB6nfIdHL/jQKDoJlvmQMN80b/vi8TmFxZQF acWaxIPZAOcTGs6dRP4fcIGGGfCoRzKI2KplbUfRTixpC+FwAGru4hdwCROKD2SuAQmgtmR5E rK5wQqUv2gSlJgmRJOHO+eVW/u5fKsaWh31TtGYg7lqGWR0rEJMpVEXk5lSl2B7Ji46BEihzt VJGGRxSD+DmU3IOEzK3n/P39RTXeIstqDwuN8JtN/swW2uf+Nc7eDFYmXJvcxDGKHuSgJlEgN kiR6tFx/X6xOFNWstomR20Fl6aEaxV0r9neV7S07yM+GEfxa8KxLp9rvMwaFExccOpIMdpVOG wByNZBzBCuHEaGDiuFCwxfEAdhYvuGnSqNX4VIMcCwkx6q1XjJ1HMvJyLbFMpMCv4oUp2WJsA rCXtL76xBXyz20Kr3kjqLNJoL+P+optd3hWJMPz2xeTd8IwEP8Csc4uwwZk/Qlk0VY5rSPd6i vJ3Z6xDj08mEgzgoVvCY0tjcqC5jEqf7IK402XLMSf2ak0KS1k00nG0DkNj4BqaOYFeXrWVyw fGDKO5SMcD8BWvg/wvdXALEelroSTo1gmRoJ2WPEACToyirN00ejowCaLYN2R13K9TDQn2GsZ 6xZHlNbNqzqsvY8fGREAQwgmLHD1TUDx7it5UoTwTi7emIiytHveDxIW5POPOGjfWnz0= Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Marcel Ziswiler Configure Apalis MMC1 D6 GPIO on SDMMC3_CLK_LB_IN as reserved function without any pull-up/down. Configure GPIO_PV2 as SD1_CD# according to latest V1.1 HW. Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output driver enabled aka not tristated and input driver enabled as well as it features some magic properties even though the external loopback is disabled and the internal loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 bits being set to 0xfffd according to the TRM! This pin is now a not-connect on V1.1 HW in order to avoid any interference. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra124-apalis.dtsi | 53 +++++++++++++++------------------- 1 file changed, 23 insertions(+), 30 deletions(-) diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi index 747ce81..2bfc579 100644 --- a/arch/arm/boot/dts/tegra124-apalis.dtsi +++ b/arch/arm/boot/dts/tegra124-apalis.dtsi @@ -414,18 +414,10 @@ nvidia,tristate = ; nvidia,enable-input = ; }; - /* - * Don't use MMC1_D6 aka SDMMC3_CLK_LB_IN for now as it - * features some magic properties even though the - * external loopback is disabled and the internal - * loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 - * register's SDMMC_SPARE1 bits being set to 0xfffd - * according to the TRM! - */ sdmmc3_clk_lb_in_pee5 { /* D6 GPIO */ nvidia,pins = "sdmmc3_clk_lb_in_pee5"; - nvidia,function = "sdmmc3"; - nvidia,pull = ; + nvidia,function = "rsvd2"; + nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; @@ -520,20 +512,12 @@ nvidia,tristate = ; nvidia,enable-input = ; }; - /* - * Don't use SD1_CD# aka SDMMC3_CLK_LB_OUT for now as it - * features some magic properties even though the - * external loopback is disabled and the internal - * loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 - * register's SDMMC_SPARE1 bits being set to 0xfffd - * according to the TRM! - */ - sdmmc3_clk_lb_out_pee4 { /* CD# GPIO */ - nvidia,pins = "sdmmc3_clk_lb_out_pee4"; - nvidia,function = "rsvd2"; - nvidia,pull = ; + sdmmc3_cd_n_pv2 { /* CD# GPIO */ + nvidia,pins = "sdmmc3_cd_n_pv2"; + nvidia,function = "rsvd3"; + nvidia,pull = ; nvidia,tristate = ; - nvidia,enable-input = ; + nvidia,enable-input = ; }; /* Apalis SPDIF */ @@ -1512,13 +1496,6 @@ nvidia,tristate = ; nvidia,enable-input = ; }; - sdmmc3_cd_n_pv2 { /* NC */ - nvidia,pins = "sdmmc3_cd_n_pv2"; - nvidia,function = "rsvd3"; - nvidia,pull = ; - nvidia,tristate = ; - nvidia,enable-input = ; - }; gpio_x1_aud_px1 { /* NC */ nvidia,pins = "gpio_x1_aud_px1"; nvidia,function = "rsvd2"; @@ -1568,6 +1545,22 @@ nvidia,tristate = ; nvidia,enable-input = ; }; + /* + * Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output + * driver enabled aka not tristated and input driver + * enabled as well as it features some magic properties + * even though the external loopback is disabled and the + * internal loopback used as per + * SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 + * bits being set to 0xfffd according to the TRM! + */ + sdmmc3_clk_lb_out_pee4 { /* NC */ + nvidia,pins = "sdmmc3_clk_lb_out_pee4"; + nvidia,function = "sdmmc3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; }; }; -- 2.9.3 From mboxrd@z Thu Jan 1 00:00:00 1970 From: marcel@ziswiler.com (marcel at ziswiler.com) Date: Thu, 24 Nov 2016 02:04:54 +0100 Subject: [RESEND PATCH 4/6] apalis-tk1: adjust pin muxing for v1.1 hw In-Reply-To: <20161124010456.24604-1-marcel@ziswiler.com> References: <20161124010456.24604-1-marcel@ziswiler.com> Message-ID: <20161124010456.24604-5-marcel@ziswiler.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org From: Marcel Ziswiler Configure Apalis MMC1 D6 GPIO on SDMMC3_CLK_LB_IN as reserved function without any pull-up/down. Configure GPIO_PV2 as SD1_CD# according to latest V1.1 HW. Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output driver enabled aka not tristated and input driver enabled as well as it features some magic properties even though the external loopback is disabled and the internal loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 bits being set to 0xfffd according to the TRM! This pin is now a not-connect on V1.1 HW in order to avoid any interference. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra124-apalis.dtsi | 53 +++++++++++++++------------------- 1 file changed, 23 insertions(+), 30 deletions(-) diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi index 747ce81..2bfc579 100644 --- a/arch/arm/boot/dts/tegra124-apalis.dtsi +++ b/arch/arm/boot/dts/tegra124-apalis.dtsi @@ -414,18 +414,10 @@ nvidia,tristate = ; nvidia,enable-input = ; }; - /* - * Don't use MMC1_D6 aka SDMMC3_CLK_LB_IN for now as it - * features some magic properties even though the - * external loopback is disabled and the internal - * loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 - * register's SDMMC_SPARE1 bits being set to 0xfffd - * according to the TRM! - */ sdmmc3_clk_lb_in_pee5 { /* D6 GPIO */ nvidia,pins = "sdmmc3_clk_lb_in_pee5"; - nvidia,function = "sdmmc3"; - nvidia,pull = ; + nvidia,function = "rsvd2"; + nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; @@ -520,20 +512,12 @@ nvidia,tristate = ; nvidia,enable-input = ; }; - /* - * Don't use SD1_CD# aka SDMMC3_CLK_LB_OUT for now as it - * features some magic properties even though the - * external loopback is disabled and the internal - * loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 - * register's SDMMC_SPARE1 bits being set to 0xfffd - * according to the TRM! - */ - sdmmc3_clk_lb_out_pee4 { /* CD# GPIO */ - nvidia,pins = "sdmmc3_clk_lb_out_pee4"; - nvidia,function = "rsvd2"; - nvidia,pull = ; + sdmmc3_cd_n_pv2 { /* CD# GPIO */ + nvidia,pins = "sdmmc3_cd_n_pv2"; + nvidia,function = "rsvd3"; + nvidia,pull = ; nvidia,tristate = ; - nvidia,enable-input = ; + nvidia,enable-input = ; }; /* Apalis SPDIF */ @@ -1512,13 +1496,6 @@ nvidia,tristate = ; nvidia,enable-input = ; }; - sdmmc3_cd_n_pv2 { /* NC */ - nvidia,pins = "sdmmc3_cd_n_pv2"; - nvidia,function = "rsvd3"; - nvidia,pull = ; - nvidia,tristate = ; - nvidia,enable-input = ; - }; gpio_x1_aud_px1 { /* NC */ nvidia,pins = "gpio_x1_aud_px1"; nvidia,function = "rsvd2"; @@ -1568,6 +1545,22 @@ nvidia,tristate = ; nvidia,enable-input = ; }; + /* + * Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output + * driver enabled aka not tristated and input driver + * enabled as well as it features some magic properties + * even though the external loopback is disabled and the + * internal loopback used as per + * SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 + * bits being set to 0xfffd according to the TRM! + */ + sdmmc3_clk_lb_out_pee4 { /* NC */ + nvidia,pins = "sdmmc3_clk_lb_out_pee4"; + nvidia,function = "sdmmc3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; }; }; -- 2.9.3