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From: David Miller <davem@davemloft.net>
To: Joao.Pinto@synopsys.com
Cc: hock.leong.kweh@intel.com, netdev@vger.kernel.org
Subject: Re: [PATCH] stmmac: Enable Clause 45 PHYs in GAMC4
Date: Wed, 04 Jan 2017 14:11:41 -0500 (EST)	[thread overview]
Message-ID: <20170104.141141.514392926320888488.davem@davemloft.net> (raw)
In-Reply-To: <14201d58c172f7a65b03510d36d55170f4d16cd5.1483540094.git.jpinto@synopsys.com>

From: Joao Pinto <Joao.Pinto@synopsys.com>
Date: Wed,  4 Jan 2017 14:35:26 +0000

> The eQOS IP Core (best known in stmmac as gmac4) has a register that must be
> set if using a Clause 45 PHY. If this register is not set, the PHY won't work.
> This patch will have no impact in setups using Clause 22 PHYs.
> 
> Signed-off-by: Joao Pinto <jpinto@synopsys.com>

Why don't you set this bit for MDIO reads as well?

If it isn't necessary for reads, you have to explain this in your commit
message otherwise people will wonder the same thing I did when they see
that only writes are handled.

Thanks.

  reply	other threads:[~2017-01-04 19:11 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-04 14:35 [PATCH] stmmac: Enable Clause 45 PHYs in GAMC4 Joao Pinto
2017-01-04 19:11 ` David Miller [this message]
2017-01-05  1:37 ` [PATCH] stmmac: Enable Clause 45 PHYs in GMAC4 (eQOS) Kweh, Hock Leong
2017-01-05 10:15   ` Joao Pinto

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