From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751103AbdAQOEs (ORCPT ); Tue, 17 Jan 2017 09:04:48 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:54252 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751026AbdAQOEo (ORCPT ); Tue, 17 Jan 2017 09:04:44 -0500 From: =?UTF-8?q?Myl=C3=A8ne=20Josserand?= To: lgirdwood@gmail.com, broonie@kernel.org, perex@perex.cz, tiwai@suse.com, maxime.ripard@free-electrons.com, wens@csie.org, mturquette@baylibre.com, sboyd@codeaurora.org, mark.rutland@arm.com, robh+dt@kernel.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com, mylene.josserand@free-electrons.com, alexandre.belloni@free-electrons.com Subject: [PATCH v2 02/10] clk: ccu-sun8i-a33: Add CLK_SET_RATE_PARENT to ac-dig Date: Tue, 17 Jan 2017 15:02:22 +0100 Message-Id: <20170117140230.23142-3-mylene.josserand@free-electrons.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170117140230.23142-1-mylene.josserand@free-electrons.com> References: <20170117140230.23142-1-mylene.josserand@free-electrons.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The audio DAI needs to set the clock rates of the ac-dig clock. To make it possible, the parent PLL audio clock rates should also be changed. This is possible via "CLK_SET_RATE_PARENT" flag. Signed-off-by: Mylène Josserand --- drivers/clk/sunxi-ng/ccu-sun8i-a33.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a33.c b/drivers/clk/sunxi-ng/ccu-sun8i-a33.c index 9bd1f78a0547..3cd4190ccd59 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-a33.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-a33.c @@ -440,7 +440,7 @@ static SUNXI_CCU_M_WITH_GATE(ve_clk, "ve", "pll-ve", 0x13c, 16, 3, BIT(31), CLK_SET_RATE_PARENT); static SUNXI_CCU_GATE(ac_dig_clk, "ac-dig", "pll-audio", - 0x140, BIT(31), 0); + 0x140, BIT(31), CLK_SET_RATE_PARENT); static SUNXI_CCU_GATE(ac_dig_4x_clk, "ac-dig-4x", "pll-audio-4x", 0x140, BIT(30), 0); static SUNXI_CCU_GATE(avs_clk, "avs", "osc24M", -- 2.11.0 From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?q?Myl=C3=A8ne=20Josserand?= Subject: [PATCH v2 02/10] clk: ccu-sun8i-a33: Add CLK_SET_RATE_PARENT to ac-dig Date: Tue, 17 Jan 2017 15:02:22 +0100 Message-ID: <20170117140230.23142-3-mylene.josserand@free-electrons.com> References: <20170117140230.23142-1-mylene.josserand@free-electrons.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20170117140230.23142-1-mylene.josserand@free-electrons.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: lgirdwood@gmail.com, broonie@kernel.org, perex@perex.cz, tiwai@suse.com, maxime.ripard@free-electrons.com, wens@csie.org, mturquette@baylibre.com, sboyd@codeaurora.org, mark.rutland@arm.com, robh+dt@kernel.org Cc: thomas.petazzoni@free-electrons.com, devicetree@vger.kernel.org, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, alexandre.belloni@free-electrons.com, mylene.josserand@free-electrons.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org VGhlIGF1ZGlvIERBSSBuZWVkcyB0byBzZXQgdGhlIGNsb2NrIHJhdGVzIG9mIHRoZSBhYy1kaWcg Y2xvY2suClRvIG1ha2UgaXQgcG9zc2libGUsIHRoZSBwYXJlbnQgUExMIGF1ZGlvIGNsb2NrIHJh dGVzIHNob3VsZAphbHNvIGJlIGNoYW5nZWQuIFRoaXMgaXMgcG9zc2libGUgdmlhICJDTEtfU0VU X1JBVEVfUEFSRU5UIiBmbGFnLgoKU2lnbmVkLW9mZi1ieTogTXlsw6huZSBKb3NzZXJhbmQgPG15 bGVuZS5qb3NzZXJhbmRAZnJlZS1lbGVjdHJvbnMuY29tPgotLS0KIGRyaXZlcnMvY2xrL3N1bnhp LW5nL2NjdS1zdW44aS1hMzMuYyB8IDIgKy0KIDEgZmlsZSBjaGFuZ2VkLCAxIGluc2VydGlvbigr KSwgMSBkZWxldGlvbigtKQoKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3N1bnhpLW5nL2NjdS1z dW44aS1hMzMuYyBiL2RyaXZlcnMvY2xrL3N1bnhpLW5nL2NjdS1zdW44aS1hMzMuYwppbmRleCA5 YmQxZjc4YTA1NDcuLjNjZDQxOTBjY2Q1OSAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvc3VueGkt bmcvY2N1LXN1bjhpLWEzMy5jCisrKyBiL2RyaXZlcnMvY2xrL3N1bnhpLW5nL2NjdS1zdW44aS1h MzMuYwpAQCAtNDQwLDcgKzQ0MCw3IEBAIHN0YXRpYyBTVU5YSV9DQ1VfTV9XSVRIX0dBVEUodmVf Y2xrLCAidmUiLCAicGxsLXZlIiwKIAkJCSAgICAgMHgxM2MsIDE2LCAzLCBCSVQoMzEpLCBDTEtf U0VUX1JBVEVfUEFSRU5UKTsKIAogc3RhdGljIFNVTlhJX0NDVV9HQVRFKGFjX2RpZ19jbGssCSJh Yy1kaWciLAkicGxsLWF1ZGlvIiwKLQkJICAgICAgMHgxNDAsIEJJVCgzMSksIDApOworCQkgICAg ICAweDE0MCwgQklUKDMxKSwgQ0xLX1NFVF9SQVRFX1BBUkVOVCk7CiBzdGF0aWMgU1VOWElfQ0NV X0dBVEUoYWNfZGlnXzR4X2NsaywJImFjLWRpZy00eCIsCSJwbGwtYXVkaW8tNHgiLAogCQkgICAg ICAweDE0MCwgQklUKDMwKSwgMCk7CiBzdGF0aWMgU1VOWElfQ0NVX0dBVEUoYXZzX2NsaywJCSJh dnMiLAkJIm9zYzI0TSIsCi0tIAoyLjExLjAKCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fXwpsaW51eC1hcm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1h cm0ta2VybmVsQGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcv bWFpbG1hbi9saXN0aW5mby9saW51eC1hcm0ta2VybmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: mylene.josserand@free-electrons.com (=?UTF-8?q?Myl=C3=A8ne=20Josserand?=) Date: Tue, 17 Jan 2017 15:02:22 +0100 Subject: [PATCH v2 02/10] clk: ccu-sun8i-a33: Add CLK_SET_RATE_PARENT to ac-dig In-Reply-To: <20170117140230.23142-1-mylene.josserand@free-electrons.com> References: <20170117140230.23142-1-mylene.josserand@free-electrons.com> Message-ID: <20170117140230.23142-3-mylene.josserand@free-electrons.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org The audio DAI needs to set the clock rates of the ac-dig clock. To make it possible, the parent PLL audio clock rates should also be changed. This is possible via "CLK_SET_RATE_PARENT" flag. Signed-off-by: Myl?ne Josserand --- drivers/clk/sunxi-ng/ccu-sun8i-a33.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a33.c b/drivers/clk/sunxi-ng/ccu-sun8i-a33.c index 9bd1f78a0547..3cd4190ccd59 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-a33.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-a33.c @@ -440,7 +440,7 @@ static SUNXI_CCU_M_WITH_GATE(ve_clk, "ve", "pll-ve", 0x13c, 16, 3, BIT(31), CLK_SET_RATE_PARENT); static SUNXI_CCU_GATE(ac_dig_clk, "ac-dig", "pll-audio", - 0x140, BIT(31), 0); + 0x140, BIT(31), CLK_SET_RATE_PARENT); static SUNXI_CCU_GATE(ac_dig_4x_clk, "ac-dig-4x", "pll-audio-4x", 0x140, BIT(30), 0); static SUNXI_CCU_GATE(avs_clk, "avs", "osc24M", -- 2.11.0