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From: Patchwork <patchwork@emeril.freedesktop.org>
To: ville.syrjala@linux.intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.BAT: warning for drm/i915: Introduce intel_cdclk_state (rev3)
Date: Fri, 20 Jan 2017 18:54:42 -0000	[thread overview]
Message-ID: <20170120185442.26529.86070@emeril.freedesktop.org> (raw)
In-Reply-To: <20170120182205.8141-1-ville.syrjala@linux.intel.com>

== Series Details ==

Series: drm/i915: Introduce intel_cdclk_state (rev3)
URL   : https://patchwork.freedesktop.org/series/16994/
State : warning

== Summary ==

Series 16994v3 drm/i915: Introduce intel_cdclk_state
https://patchwork.freedesktop.org/api/1.0/series/16994/revisions/3/mbox/

Test kms_flip:
        Subgroup basic-flip-vs-wf_vblank:
                pass       -> DMESG-WARN (fi-snb-2520m)

fi-bdw-5557u     total:246  pass:232  dwarn:0   dfail:0   fail:0   skip:14 
fi-bsw-n3050     total:246  pass:207  dwarn:0   dfail:0   fail:0   skip:39 
fi-bxt-j4205     total:246  pass:224  dwarn:0   dfail:0   fail:0   skip:22 
fi-bxt-t5700     total:79   pass:66   dwarn:0   dfail:0   fail:0   skip:12 
fi-byt-j1900     total:246  pass:219  dwarn:0   dfail:0   fail:0   skip:27 
fi-byt-n2820     total:246  pass:215  dwarn:0   dfail:0   fail:0   skip:31 
fi-hsw-4770      total:246  pass:227  dwarn:0   dfail:0   fail:0   skip:19 
fi-hsw-4770r     total:246  pass:227  dwarn:0   dfail:0   fail:0   skip:19 
fi-ivb-3520m     total:246  pass:225  dwarn:0   dfail:0   fail:0   skip:21 
fi-ivb-3770      total:246  pass:225  dwarn:0   dfail:0   fail:0   skip:21 
fi-kbl-7500u     total:246  pass:225  dwarn:0   dfail:0   fail:0   skip:21 
fi-skl-6260u     total:246  pass:233  dwarn:0   dfail:0   fail:0   skip:13 
fi-skl-6700hq    total:246  pass:226  dwarn:0   dfail:0   fail:0   skip:20 
fi-skl-6700k     total:246  pass:222  dwarn:3   dfail:0   fail:0   skip:21 
fi-skl-6770hq    total:246  pass:233  dwarn:0   dfail:0   fail:0   skip:13 
fi-snb-2520m     total:246  pass:214  dwarn:1   dfail:0   fail:0   skip:31 
fi-snb-2600      total:246  pass:214  dwarn:0   dfail:0   fail:0   skip:32 

aa012aa081f6a6d2dd5a1df0f3c3736017df0d56 drm-tip: 2017y-01m-20d-09h-33m-30s UTC integration manifest
f3392a6 drm/i915: Move ilk_pipe_pixel_rate() to intel_display.c
3814a27 drm/i915: Replace the .modeset_commit_cdclk() hook with a more direct .set_cdclk() hook
e2deea6 drm/i915: Nuke the VLV/CHV PFI programming power domain workaround
6fcaeaa drm/i915: Move PFI credit reprogramming into vlv/chv_set_cdclk()
0356921 drm/i915: Pass the cdclk state to the set_cdclk() functions
9beaad6 drm/i915: Pass dev_priv to remainder of the cdclk functions
a9b883f drm/i915: Track full cdclk state for the logical and actual cdclk frequencies
b8e2944 drm/i915: Start moving the cdclk stuff into a distinct state structure
8cf8a7b drm/i915: Pass computed vco to bxt_set_cdclk()
4520d74 drm/i915: Move most cdclk/rawclk related code to intel_cdclk.c
e970539 drm/i915: Clean up the .get_cdclk() assignment if ladder
9222aa2 drm/i915: s/get_display_clock_speed/get_cdclk/
e77b395 drm/i915: Nuke intel_mode_max_pixclk()
6dcb6f8 drm/i915: Store the pipe pixel rate in the crtc state

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3564/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2017-01-20 18:54 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-20 18:21 [PATCH v3 00/14] drm/i915: Introduce intel_cdclk_state (v3) ville.syrjala
2017-01-20 18:21 ` [PATCH v2 01/14] drm/i915: Store the pipe pixel rate in the crtc state ville.syrjala
2017-01-23  9:13   ` Ander Conselvan De Oliveira
2017-01-24 12:30   ` David Weinehall
2017-01-26 19:50   ` [PATCH v3 " ville.syrjala
2017-01-20 18:21 ` [PATCH v2 02/14] drm/i915: Nuke intel_mode_max_pixclk() ville.syrjala
2017-01-20 18:21 ` [PATCH 03/14] drm/i915: s/get_display_clock_speed/get_cdclk/ ville.syrjala
2017-01-26 19:51   ` [PATCH v2 " ville.syrjala
2017-02-07 18:31   ` [PATCH v3 " ville.syrjala
2017-01-20 18:21 ` [PATCH 04/14] drm/i915: Clean up the .get_cdclk() assignment if ladder ville.syrjala
2017-01-24 12:29   ` David Weinehall
2017-01-25 13:53     ` Ville Syrjälä
2017-02-07 18:32   ` [PATCH v2 " ville.syrjala
2017-01-20 18:21 ` [PATCH v2 05/14] drm/i915: Move most cdclk/rawclk related code to intel_cdclk.c ville.syrjala
2017-01-26 19:51   ` [PATCH v3 " ville.syrjala
2017-02-07 18:33   ` [PATCH v4 " ville.syrjala
2017-01-20 18:21 ` [PATCH 06/14] drm/i915: Pass computed vco to bxt_set_cdclk() ville.syrjala
2017-01-20 18:21 ` [PATCH v3 07/14] drm/i915: Start moving the cdclk stuff into a distinct state structure ville.syrjala
2017-02-07 18:33   ` [PATCH v4 " ville.syrjala
2017-01-20 18:21 ` [PATCH v3 08/14] drm/i915: Track full cdclk state for the logical and actual cdclk frequencies ville.syrjala
2017-01-20 18:22 ` [PATCH v2 09/14] drm/i915: Pass dev_priv to remainder of the cdclk functions ville.syrjala
2017-01-20 18:22 ` [PATCH v3 10/14] drm/i915: Pass the cdclk state to the set_cdclk() functions ville.syrjala
2017-01-20 18:22 ` [PATCH 11/14] drm/i915: Move PFI credit reprogramming into vlv/chv_set_cdclk() ville.syrjala
2017-01-26 19:57   ` [PATCH v2 " ville.syrjala
2017-01-20 18:22 ` [PATCH v2 12/14] drm/i915: Nuke the VLV/CHV PFI programming power domain workaround ville.syrjala
2017-01-20 18:22 ` [PATCH v3 13/14] drm/i915: Replace the .modeset_commit_cdclk() hook with a more direct .set_cdclk() hook ville.syrjala
2017-01-26 19:52   ` [PATCH v4 " ville.syrjala
2017-01-20 18:22 ` [PATCH 14/14] drm/i915: Move ilk_pipe_pixel_rate() to intel_display.c ville.syrjala
2017-01-20 18:54 ` Patchwork [this message]
2017-01-23  9:17 ` [PATCH v3 00/14] drm/i915: Introduce intel_cdclk_state (v3) Ander Conselvan De Oliveira
2017-01-26 23:54 ` ✗ Fi.CI.BAT: warning for drm/i915: Introduce intel_cdclk_state (rev8) Patchwork
2017-02-07 20:22 ` ✗ Fi.CI.BAT: warning for drm/i915: Introduce intel_cdclk_state (rev12) Patchwork
2017-02-08 16:55 ` [PATCH v3 00/14] drm/i915: Introduce intel_cdclk_state (v3) Ville Syrjälä

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