From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Boyd Subject: Re: [PATCHv5 0/5] Support for Marvell switches with integrated CPUs Date: Fri, 27 Jan 2017 10:47:45 -0800 Message-ID: <20170127184745.GD8801@codeaurora.org> References: <20170127032546.14657-1-chris.packham@alliedtelesis.co.nz> <87wpdgwj72.fsf@free-electrons.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: <87wpdgwj72.fsf@free-electrons.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Gregory CLEMENT Cc: Mark Rutland , Andrew Lunn , Geert Uytterhoeven , Linus Walleij , Laxman Dewangan , linux-clk@vger.kernel.org, Florian Fainelli , Juri Lelli , linux@armlinux.org.uk, Thierry Reding , Michael Turquette , Sebastian Hesselbarth , devicetree@vger.kernel.org, Jason Cooper , Arnd Bergmann , Kalyan Kinthada , Rob Herring , Chris Brand , linux-arm-kernel@lists.infradead.org, Thomas Petazzoni , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Chris Packham List-Id: linux-gpio@vger.kernel.org On 01/27, Gregory CLEMENT wrote: > Hi all, > > On ven., janv. 27 2017, Chris Packham wrote: > > > The 98DX3236, 98DX3336 and 98DX4251 are a set of switch ASICs with > > integrated CPUs. They CPU block is common within these product lines and > > (as far as I can tell/have been told) is based on the Armada XP. There > > are a few differences due to the fact they have to squeeze the CPU into > > the same package as the switch. > > > > I've rebased this series against linux-pinctrl/devel to get access to > > mvebu_mmio_mpp_ctrl. Everything else still applies cleanly to > > v4.10.0-rc5. > > Just to let you know that I plan to apply the 3 arm patch once Chris > will have sent the new series with the minor fixes I asked on patch 3. > > I already applied them in the for-next branch to benefit of some build > test coverage. > > Stephen, > > you gave your Acked-by on the first patch, but don't you plan to apply > it on the clk branch? It must have not been clear if I should apply it, hence the ack. I'll apply it now. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750948AbdA0Sv2 (ORCPT ); Fri, 27 Jan 2017 13:51:28 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:54598 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750775AbdA0Sux (ORCPT ); Fri, 27 Jan 2017 13:50:53 -0500 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 738346074C Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sboyd@codeaurora.org Date: Fri, 27 Jan 2017 10:47:45 -0800 From: Stephen Boyd To: Gregory CLEMENT Cc: Linus Walleij , Chris Packham , linux@armlinux.org.uk, linux-arm-kernel@lists.infradead.org, Rob Herring , Mark Rutland , Michael Turquette , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Geert Uytterhoeven , Chris Brand , Florian Fainelli , Arnd Bergmann , Thierry Reding , Sudeep Holla , Juri Lelli , Thomas Petazzoni , Laxman Dewangan , Kalyan Kinthada , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org Subject: Re: [PATCHv5 0/5] Support for Marvell switches with integrated CPUs Message-ID: <20170127184745.GD8801@codeaurora.org> References: <20170127032546.14657-1-chris.packham@alliedtelesis.co.nz> <87wpdgwj72.fsf@free-electrons.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <87wpdgwj72.fsf@free-electrons.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 01/27, Gregory CLEMENT wrote: > Hi all, > > On ven., janv. 27 2017, Chris Packham wrote: > > > The 98DX3236, 98DX3336 and 98DX4251 are a set of switch ASICs with > > integrated CPUs. They CPU block is common within these product lines and > > (as far as I can tell/have been told) is based on the Armada XP. There > > are a few differences due to the fact they have to squeeze the CPU into > > the same package as the switch. > > > > I've rebased this series against linux-pinctrl/devel to get access to > > mvebu_mmio_mpp_ctrl. Everything else still applies cleanly to > > v4.10.0-rc5. > > Just to let you know that I plan to apply the 3 arm patch once Chris > will have sent the new series with the minor fixes I asked on patch 3. > > I already applied them in the for-next branch to benefit of some build > test coverage. > > Stephen, > > you gave your Acked-by on the first patch, but don't you plan to apply > it on the clk branch? It must have not been clear if I should apply it, hence the ack. I'll apply it now. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project From mboxrd@z Thu Jan 1 00:00:00 1970 From: sboyd@codeaurora.org (Stephen Boyd) Date: Fri, 27 Jan 2017 10:47:45 -0800 Subject: [PATCHv5 0/5] Support for Marvell switches with integrated CPUs In-Reply-To: <87wpdgwj72.fsf@free-electrons.com> References: <20170127032546.14657-1-chris.packham@alliedtelesis.co.nz> <87wpdgwj72.fsf@free-electrons.com> Message-ID: <20170127184745.GD8801@codeaurora.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 01/27, Gregory CLEMENT wrote: > Hi all, > > On ven., janv. 27 2017, Chris Packham wrote: > > > The 98DX3236, 98DX3336 and 98DX4251 are a set of switch ASICs with > > integrated CPUs. They CPU block is common within these product lines and > > (as far as I can tell/have been told) is based on the Armada XP. There > > are a few differences due to the fact they have to squeeze the CPU into > > the same package as the switch. > > > > I've rebased this series against linux-pinctrl/devel to get access to > > mvebu_mmio_mpp_ctrl. Everything else still applies cleanly to > > v4.10.0-rc5. > > Just to let you know that I plan to apply the 3 arm patch once Chris > will have sent the new series with the minor fixes I asked on patch 3. > > I already applied them in the for-next branch to benefit of some build > test coverage. > > Stephen, > > you gave your Acked-by on the first patch, but don't you plan to apply > it on the clk branch? It must have not been clear if I should apply it, hence the ack. I'll apply it now. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project