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From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
To: Yi Sun <yi.y.sun@linux.intel.com>
Cc: wei.liu2@citrix.com, he.chen@linux.intel.com,
	andrew.cooper3@citrix.com, dario.faggioli@citrix.com,
	ian.jackson@eu.citrix.com, mengxu@cis.upenn.edu,
	jbeulich@suse.com, chao.p.peng@linux.intel.com,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH RESEND v5 06/24] x86: refactor psr: implement get hw info flow.
Date: Tue, 31 Jan 2017 15:17:14 -0500	[thread overview]
Message-ID: <20170131201714.GA16338@char.us.ORACLE.com> (raw)
In-Reply-To: <1484805686-7249-7-git-send-email-yi.y.sun@linux.intel.com>

.snip..
> +static enum psr_feat_type psr_cbm_type_to_feat_type(enum cbm_type type)
> +{
> +    enum psr_feat_type feat_type;
> +
> +    /* Judge if feature is enabled. */
> +    switch ( type ) {

The { should be on its own line.

> +    case PSR_CBM_TYPE_L3:
> +        feat_type = PSR_SOCKET_L3_CAT;
> +        break;
> +    default:
> +        feat_type = 0xFFFF;

Perhaps have an extra field in psr_feat_type titled 'PSR_SOCKET_UNKNOWN = 0xFFFF' 
and use that ?

> +        break;
> +    }
> +
> +    return feat_type;
> +}
> +
>  /* L3 CAT functions implementation. */
>  static void l3_cat_init_feature(struct cpuid_leaf_regs regs,
>                                  struct feat_node *feat,
> @@ -218,8 +238,22 @@ static unsigned int l3_cat_get_cos_max(const struct feat_node *feat)
>      return feat->info.l3_cat_info.cos_max;
>  }
>  
> +static bool l3_cat_get_feat_info(const struct feat_node *feat,
> +                                 uint32_t data[], unsigned int array_len)
> +{
> +    if ( !data || 3 > array_len )
> +        return false;
> +
> +    data[CBM_LEN] = feat->info.l3_cat_info.cbm_len;
> +    data[COS_MAX] = feat->info.l3_cat_info.cos_max;
> +    data[PSR_FLAG] = 0;
> +
> +    return true;
> +}
> +
>  static const struct feat_ops l3_cat_ops = {
>      .get_cos_max = l3_cat_get_cos_max,
> +    .get_feat_info = l3_cat_get_feat_info,
>  };
>  
>  static void __init parse_psr_bool(char *s, char *value, char *feature,
> @@ -425,10 +459,43 @@ void psr_ctxt_switch_to(struct domain *d)
>      }
>  }
>  
> -int psr_get_cat_l3_info(unsigned int socket, uint32_t *cbm_len,
> -                        uint32_t *cos_max, uint32_t *flags)
> +static struct psr_socket_info *get_socket_info(unsigned int socket)
>  {
> -    return 0;
> +    if ( !socket_info )
> +        return ERR_PTR(-ENODEV);
> +
> +    if ( socket >= nr_sockets )
> +        return ERR_PTR(-ENOTSOCK);

<chuckles>

I think ENXIO is more appropiate. Or ERANGE

> +
> +    if ( !socket_info[socket].feat_mask )
> +        return ERR_PTR(-ENOENT);
> +
> +    return socket_info + socket;
> +}
> +
> +int psr_get_info(unsigned int socket, enum cbm_type type,
> +                 uint32_t data[], unsigned int array_len)
> +{
> +    const struct psr_socket_info *info = get_socket_info(socket);
> +    const struct feat_node *feat;
> +    enum psr_feat_type feat_type;
> +
> +    if ( IS_ERR(info) )
> +        return PTR_ERR(info);
> +
> +    feat_type = psr_cbm_type_to_feat_type(type);
> +    list_for_each_entry(feat, &info->feat_list, list)
> +    {
> +        if ( feat->feature != feat_type )
> +            continue;
> +
> +        if ( feat->ops.get_feat_info(feat, data, array_len) )
> +            return 0;
> +        else
> +            return -EINVAL;
> +    }
> +
> +    return -ENOENT;
>  }
>  
>  int psr_get_l3_cbm(struct domain *d, unsigned int socket,
> diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c
> index 14e7dc7..d90db78 100644
> --- a/xen/arch/x86/sysctl.c
> +++ b/xen/arch/x86/sysctl.c
> @@ -176,15 +176,19 @@ long arch_do_sysctl(
>          switch ( sysctl->u.psr_cat_op.cmd )
>          {
>          case XEN_SYSCTL_PSR_CAT_get_l3_info:
> -            ret = psr_get_cat_l3_info(sysctl->u.psr_cat_op.target,
> -                                      &sysctl->u.psr_cat_op.u.l3_info.cbm_len,
> -                                      &sysctl->u.psr_cat_op.u.l3_info.cos_max,
> -                                      &sysctl->u.psr_cat_op.u.l3_info.flags);
> +        {
> +            uint32_t data[3];
> +            ret = psr_get_info(sysctl->u.psr_cat_op.target,
> +                               PSR_CBM_TYPE_L3, data, 3);
> +
> +            sysctl->u.psr_cat_op.u.l3_info.cbm_len = data[CBM_LEN];
> +            sysctl->u.psr_cat_op.u.l3_info.cos_max = data[COS_MAX];
> +            sysctl->u.psr_cat_op.u.l3_info.flags   = data[PSR_FLAG];
>  
>              if ( !ret && __copy_field_to_guest(u_sysctl, sysctl, u.psr_cat_op) )
>                  ret = -EFAULT;
>              break;
> -
> +        }
>          default:
>              ret = -EOPNOTSUPP;
>              break;
> diff --git a/xen/include/asm-x86/psr.h b/xen/include/asm-x86/psr.h
> index 57f47e9..e3b18bc 100644
> --- a/xen/include/asm-x86/psr.h
> +++ b/xen/include/asm-x86/psr.h
> @@ -33,6 +33,11 @@
>  /* L3 CDP Enable bit*/
>  #define PSR_L3_QOS_CDP_ENABLE_BIT       0x0
>  
> +/* Used by psr_get_info() */
> +#define CBM_LEN  0
> +#define COS_MAX  1
> +#define PSR_FLAG 2

Odd. Looking at that file I see those #define but all of them are on
an odd spacing. But that was with previous commits that are in.

Perhaps put them all on the same column?

> +
>  struct psr_cmt_l3 {
>      unsigned int features;
>      unsigned int upscaling_factor;
> @@ -63,8 +68,8 @@ int psr_alloc_rmid(struct domain *d);
>  void psr_free_rmid(struct domain *d);
>  void psr_ctxt_switch_to(struct domain *d);
>  
> -int psr_get_cat_l3_info(unsigned int socket, uint32_t *cbm_len,
> -                        uint32_t *cos_max, uint32_t *flags);
> +int psr_get_info(unsigned int socket, enum cbm_type type,
> +                 uint32_t data[], unsigned int array_len);
>  int psr_get_l3_cbm(struct domain *d, unsigned int socket,
>                     uint64_t *cbm, enum cbm_type type);
>  int psr_set_l3_cbm(struct domain *d, unsigned int socket,
> -- 
> 1.9.1
> 

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  reply	other threads:[~2017-01-31 20:18 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-19  6:01 [PATCH RESEND v5 00/24] Enable L2 Cache Allocation Technology & Refactor psr.c Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 01/24] docs: create L2 Cache Allocation Technology (CAT) feature document Yi Sun
2017-01-20  9:39   ` Tian, Kevin
2017-01-22  2:15     ` Yi Sun
2017-02-08  6:45       ` Tian, Kevin
2017-01-30 18:10   ` Konrad Rzeszutek Wilk
2017-01-30 20:39     ` Konrad Rzeszutek Wilk
2017-02-04  7:24       ` Yi Sun
2017-02-04  7:06     ` Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 02/24] x86: refactor psr: remove L3 CAT/CDP codes Yi Sun
2017-01-30 22:05   ` Konrad Rzeszutek Wilk
2017-01-19  6:01 ` [PATCH RESEND v5 03/24] x86: refactor psr: implement main data structures Yi Sun
2017-01-30 22:20   ` Konrad Rzeszutek Wilk
2017-01-31 10:10     ` Jan Beulich
2017-01-31 14:12       ` Konrad Rzeszutek Wilk
2017-01-31 15:07         ` Jan Beulich
2017-01-31 17:32           ` Konrad Rzeszutek Wilk
2017-02-05  1:53     ` Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 04/24] x86: refactor psr: implement CPU init and free flow Yi Sun
2017-01-31  2:44   ` Konrad Rzeszutek Wilk
2017-01-31 10:14     ` Jan Beulich
2017-01-31 14:13       ` Konrad Rzeszutek Wilk
2017-01-31 10:53     ` Andrew Cooper
2017-01-19  6:01 ` [PATCH RESEND v5 05/24] x86: refactor psr: implement Domain init/free and schedule flows Yi Sun
2017-01-31 19:52   ` Konrad Rzeszutek Wilk
2017-01-19  6:01 ` [PATCH RESEND v5 06/24] x86: refactor psr: implement get hw info flow Yi Sun
2017-01-31 20:17   ` Konrad Rzeszutek Wilk [this message]
2017-01-19  6:01 ` [PATCH RESEND v5 07/24] x86: refactor psr: implement get value flow Yi Sun
2017-01-31 20:29   ` Konrad Rzeszutek Wilk
2017-02-07  2:47     ` Yi Sun
2017-02-07 13:56       ` Konrad Rzeszutek Wilk
2017-01-19  6:01 ` [PATCH RESEND v5 08/24] x86: refactor psr: set value: implement framework Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 09/24] x86: refactor psr: set value: assemble features value array Yi Sun
2017-01-31 20:57   ` Konrad Rzeszutek Wilk
2017-02-07  2:51     ` Yi Sun
2017-02-07 13:57       ` Konrad Rzeszutek Wilk
2017-01-19  6:01 ` [PATCH RESEND v5 10/24] x86: refactor psr: set value: implement cos finding flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 11/24] x86: refactor psr: set value: implement cos id picking flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 12/24] x86: refactor psr: set value: implement write msr flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 13/24] x86: refactor psr: implement CPU init and free flow for CDP Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 14/24] x86: refactor psr: implement get hw info " Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 15/24] x86: refactor psr: implement get value " Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 16/24] x86: refactor psr: implement set value callback functions " Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 17/24] x86: L2 CAT: implement CPU init and free flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 18/24] x86: L2 CAT: implement get hw info flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 19/24] x86: L2 CAT: implement get value flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 20/24] x86: L2 CAT: implement set " Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 21/24] tools: L2 CAT: support get HW info for L2 CAT Yi Sun
2017-01-27 15:18   ` Wei Liu
2017-01-19  6:01 ` [PATCH RESEND v5 22/24] tools: L2 CAT: support show cbm " Yi Sun
2017-01-27 15:18   ` Wei Liu
2017-01-19  6:01 ` [PATCH RESEND v5 23/24] tools: L2 CAT: support set " Yi Sun
2017-01-27 15:18   ` Wei Liu
2017-01-19  6:01 ` [PATCH RESEND v5 24/24] docs: add L2 CAT description in docs Yi Sun
2017-01-27 15:18   ` Wei Liu

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