From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752560AbdBFURH (ORCPT ); Mon, 6 Feb 2017 15:17:07 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:56235 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752411AbdBFURE (ORCPT ); Mon, 6 Feb 2017 15:17:04 -0500 Date: Mon, 6 Feb 2017 18:46:35 +0100 From: Maxime Ripard To: Chen-Yu Tsai Cc: linux-arm-kernel , linux-kernel Subject: Re: [PATCH 3/9] ARM: sunxi: Rename pwm0_pins to match our usual pattern Message-ID: <20170206174635.wvl7fnxjhmr6e7zc@lukather> References: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="ej6ok5qkod3hjaau" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.6.2-neo (2016-08-21) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --ej6ok5qkod3hjaau Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Feb 06, 2017 at 03:15:15PM +0800, Chen-Yu Tsai wrote: > On Mon, Feb 6, 2017 at 2:49 AM, Maxime Ripard > wrote: > > The pwm0_pins group name is suggesting that this is the only option usa= ble > > for the PWM0 on the SoCs it's declared on. However, this is not the case > > and defining a second pwm0 group would be quite weird given the name of= the > > first group. >=20 > Can you elaborate on the second pwm0 option? I'm not seeing it in my data= sheets. Hmmmm, I'm not sure why I did that anymore, looks like you're right... I'll drop this one, and queue the others for 4.12. Thanks! Maxime --=20 Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com --ej6ok5qkod3hjaau Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIcBAEBCAAGBQJYmLZ3AAoJEBx+YmzsjxAg2EYP/3nhIFWUaDHLHqBx8NmUvfR7 Tulwjf9/ml2vxLEmHxglVRuPHU4x2Pk6SXsjStvdqEdMTjIspZTJn3AxepG55PTi ssJ/fU+4MPFNHv2Nu5GEK6IjiWU0qxX0CsC298BEu+FosDvy+aH4198UYIaF7jMV rPCQTUVpF3ImaEIAfGdDkRZoI8Yp7pVSR0W2cIMHpAgvjEq2wlmT3V5TbWX/fsmM IvkUCqmWwS95pemY99zKbkCvvs6D+vywYMcv/Hz3KjYnX27bSxEpvvYKnQKWX7DH bMgaLP6xZB7PwVKS9Eb6Q0dHKEGoHARavXFypcktPczyUdK98Zm/R8HB6nEDoVL4 n3Vo1jr6aW+CEvwxazr5yoJ6+A7NYWLlHBsVh6I5Fj807nPF9uRHCBJZEt78utLt yTYEZJ7oZuSo8RPZ6RCqdI2zr7/mkzWzfBvc/gHRplkyewNqpUmVweTdiOF+mS5b v7bt5TClQsL/JbemNWkpw6sBKB1Q/mMlgN6UyOccKrR6qHPZkfkQ9/g8nEWp20f9 in+Il0X13ZElm+FvZfVvzZ6eYXy9b8UTipGs9or6hRMQwEy1aHgFUDM+fxxafkE+ geP2nAYpyqxICxEZf1MzknHhBH5DoDC/fSQpw/MNBlp9aVZYOpdQoYeZA8fr+4IJ 75RTeaQTf7gyuMcdsid+ =M0bT -----END PGP SIGNATURE----- --ej6ok5qkod3hjaau-- From mboxrd@z Thu Jan 1 00:00:00 1970 From: maxime.ripard@free-electrons.com (Maxime Ripard) Date: Mon, 6 Feb 2017 18:46:35 +0100 Subject: [PATCH 3/9] ARM: sunxi: Rename pwm0_pins to match our usual pattern In-Reply-To: References: Message-ID: <20170206174635.wvl7fnxjhmr6e7zc@lukather> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Mon, Feb 06, 2017 at 03:15:15PM +0800, Chen-Yu Tsai wrote: > On Mon, Feb 6, 2017 at 2:49 AM, Maxime Ripard > wrote: > > The pwm0_pins group name is suggesting that this is the only option usable > > for the PWM0 on the SoCs it's declared on. However, this is not the case > > and defining a second pwm0 group would be quite weird given the name of the > > first group. > > Can you elaborate on the second pwm0 option? I'm not seeing it in my datasheets. Hmmmm, I'm not sure why I did that anymore, looks like you're right... I'll drop this one, and queue the others for 4.12. Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 801 bytes Desc: not available URL: