From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933106AbdBHJoS (ORCPT ); Wed, 8 Feb 2017 04:44:18 -0500 Received: from merlin.infradead.org ([205.233.59.134]:49106 "EHLO merlin.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932969AbdBHJny (ORCPT ); Wed, 8 Feb 2017 04:43:54 -0500 Date: Wed, 8 Feb 2017 10:43:13 +0100 From: Peter Zijlstra To: Mark Rutland Cc: Kees Cook , "Reshetova, Elena" , Greg KH , Arnd Bergmann , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , Will Deacon , David Windsor , Hans Liljestrand , David Howells , LKML , "kernel-hardening@lists.openwall.com" Subject: Re: [kernel-hardening] Re: [PATCH 4/4] refcount: Report failures through CHECK_DATA_CORRUPTION Message-ID: <20170208094313.GI6536@twins.programming.kicks-ass.net> References: <20170207083405.GV6500@twins.programming.kicks-ass.net> <20170207111011.GB28790@leverpostej> <20170207123630.GR6515@twins.programming.kicks-ass.net> <20170207135020.GA26173@leverpostej> <20170207150737.GM25813@worktop.programming.kicks-ass.net> <20170207160300.GB26173@leverpostej> <20170207173036.GS6515@twins.programming.kicks-ass.net> <20170207175542.GC26173@leverpostej> <20170208091250.GT6515@twins.programming.kicks-ass.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170208091250.GT6515@twins.programming.kicks-ass.net> User-Agent: Mutt/1.5.23.1 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Feb 08, 2017 at 10:12:50AM +0100, Peter Zijlstra wrote: > Something like: > > #define EX_REG_HANDLER(_reg) \ > bool ex_handler_value_##_reg(const struct exception_table_entry *fixup, \ > struct pt_regs *regs, int trapnr) \ > { \ > void (*handler)(unsigned long) = \ > (void *)((unsigned long)&fixup->to + fixup->to); \ > \ > if (trapnr != X86_TRAP_UD) \ > return false; \ > \ > regs->ip += 2; /* size of UD2 instruction */ \ > handler(regs->_reg); \ > return true; \ > } > > EX_REG_HANDLER(bx); > EX_REG_HANDLER(cx); > ... > EX_REG_HANDLER(ss); > > > asm ( > " .macro reg_to_handler r\n" > " .irp rs,bx,cx,...,ss\n" > " .ifc \\r, %\\rs\n" > " ex_handler_value_\\rs\n" > " .endif\n" " .ifc \\r, %e\\rs\n" " ex_handler_value_\\rs\n" " .endif\n" " .ifc \\r, %r\\rs\n" " ex_handler_value_\\rs\n" " .endif\n" > " .endr\n" > " .endm\n" > ); to match the 16, 32 and 64 bit names of the same registers. The byte registers will need additional magic :/ > #define EXCEPTION_VALUE(val, handler) \ > asm volatile ("1: ud2" \ > _ASM_EXTABLE_HANDLE(1b, handler, \ > reg_to_handler %0) \ > : : "r" (val)) > > > Where the generic version can simply be: > > #define EXCEPTION_VALUE(val, handler) handler((unsigned long)val) > > > Makes sense? From mboxrd@z Thu Jan 1 00:00:00 1970 Date: Wed, 8 Feb 2017 10:43:13 +0100 From: Peter Zijlstra Message-ID: <20170208094313.GI6536@twins.programming.kicks-ass.net> References: <20170207083405.GV6500@twins.programming.kicks-ass.net> <20170207111011.GB28790@leverpostej> <20170207123630.GR6515@twins.programming.kicks-ass.net> <20170207135020.GA26173@leverpostej> <20170207150737.GM25813@worktop.programming.kicks-ass.net> <20170207160300.GB26173@leverpostej> <20170207173036.GS6515@twins.programming.kicks-ass.net> <20170207175542.GC26173@leverpostej> <20170208091250.GT6515@twins.programming.kicks-ass.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170208091250.GT6515@twins.programming.kicks-ass.net> Subject: Re: [kernel-hardening] Re: [PATCH 4/4] refcount: Report failures through CHECK_DATA_CORRUPTION To: Mark Rutland Cc: Kees Cook , "Reshetova, Elena" , Greg KH , Arnd Bergmann , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , Will Deacon , David Windsor , Hans Liljestrand , David Howells , LKML , "kernel-hardening@lists.openwall.com" List-ID: On Wed, Feb 08, 2017 at 10:12:50AM +0100, Peter Zijlstra wrote: > Something like: > > #define EX_REG_HANDLER(_reg) \ > bool ex_handler_value_##_reg(const struct exception_table_entry *fixup, \ > struct pt_regs *regs, int trapnr) \ > { \ > void (*handler)(unsigned long) = \ > (void *)((unsigned long)&fixup->to + fixup->to); \ > \ > if (trapnr != X86_TRAP_UD) \ > return false; \ > \ > regs->ip += 2; /* size of UD2 instruction */ \ > handler(regs->_reg); \ > return true; \ > } > > EX_REG_HANDLER(bx); > EX_REG_HANDLER(cx); > ... > EX_REG_HANDLER(ss); > > > asm ( > " .macro reg_to_handler r\n" > " .irp rs,bx,cx,...,ss\n" > " .ifc \\r, %\\rs\n" > " ex_handler_value_\\rs\n" > " .endif\n" " .ifc \\r, %e\\rs\n" " ex_handler_value_\\rs\n" " .endif\n" " .ifc \\r, %r\\rs\n" " ex_handler_value_\\rs\n" " .endif\n" > " .endr\n" > " .endm\n" > ); to match the 16, 32 and 64 bit names of the same registers. The byte registers will need additional magic :/ > #define EXCEPTION_VALUE(val, handler) \ > asm volatile ("1: ud2" \ > _ASM_EXTABLE_HANDLE(1b, handler, \ > reg_to_handler %0) \ > : : "r" (val)) > > > Where the generic version can simply be: > > #define EXCEPTION_VALUE(val, handler) handler((unsigned long)val) > > > Makes sense?