From: Ken Lin <yungching0725@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2 2/2] board: ge: bx50v3: apply the proper register setting to fix the voltage peak issue
Date: Sat, 18 Feb 2017 07:14:11 +0800 [thread overview]
Message-ID: <20170217231411.14469-2-yungching0725@gmail.com> (raw)
In-Reply-To: <20170217231411.14469-1-yungching0725@gmail.com>
Apply the proper setting for the reserved bits in SetDes Test and System Mode Control register
to avoid the voltage peak issue while we do the IEEE PHY comformance test
Signed-off-by: Ken Lin <yungching0725@gmail.com>
---
Changes from v1
- New commit message
board/ge/bx50v3/bx50v3.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c
index 80b4ba1b8b..0acf655c0e 100644
--- a/board/ge/bx50v3/bx50v3.c
+++ b/board/ge/bx50v3/bx50v3.c
@@ -307,7 +307,8 @@ static int mx6_rgmii_rework(struct phy_device *phydev)
/* set debug port address: SerDes Test and System Mode Control */
phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
/* enable rgmii tx clock delay */
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
+ /* set the reserved bits to avoid board specific voltage peak issue*/
+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x3D47);
return 0;
}
--
2.11.0
next prev parent reply other threads:[~2017-02-17 23:14 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-17 23:14 [U-Boot] [PATCH v2 1/2] board: ge: bx50v3: fix AR8033 reset timing issue Ken Lin
2017-02-17 23:14 ` Ken Lin [this message]
2017-02-21 1:56 Ken Lin
2017-02-21 1:56 ` [U-Boot] [PATCH v2 2/2] board: ge: bx50v3: apply the proper register setting to fix the voltage peak issue Ken Lin
2017-02-21 15:30 ` Stefano Babic
[not found] ` <WM!d4437fdbd18b2dd0a2df87709b3a105a45c5459682f0b042170f9226efa82e75cf97bd21a255f60bc92f051ddbb225c9!@dg.advantech.com>
2017-03-21 12:57 ` Ray, Ian
2017-03-26 14:34 ` Joe Hershberger
2017-03-26 14:41 ` Stefano Babic
2017-03-26 14:49 ` Joe Hershberger
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