Re: [PATCH 17/19] x86/vmce, tools/libxl: expose LMCE capability in guest MSR_IA32_MCG_CAP

[Haozhong Zhang <haozhong.zhang@intel.com>]

On 02/22/17 08:55 -0700, Jan Beulich wrote:
> >>> On 17.02.17 at 07:39, <haozhong.zhang@intel.com> wrote:
> > --- a/xen/arch/x86/cpu/mcheck/vmce.c
> > +++ b/xen/arch/x86/cpu/mcheck/vmce.c
> > @@ -74,7 +74,7 @@ int vmce_restore_vcpu(struct vcpu *v, const struct 
> > hvm_vmce_vcpu *ctxt)
> >      unsigned long guest_mcg_cap;
> >  
> >      if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
> > -        guest_mcg_cap = INTEL_GUEST_MCG_CAP;
> > +        guest_mcg_cap = INTEL_GUEST_MCG_CAP | (lmce_support ? MCG_LMCE_P : 0);
> >      else
> >          guest_mcg_cap = AMD_GUEST_MCG_CAP;
> >  
> 
> Is it really a problem to restore a guest that has LMCE enabled on
> an LMCE-incapable host? I.e. doesn't the guest need to be aware
> of MCEs with the local bit clear anyway?

There should be no problem. I'll change it to
-        guest_mcg_cap = INTEL_GUEST_MCG_CAP;
+        guest_mcg_cap = INTEL_GUEST_MCG_CAP | MCG_LMCE_P;

> 
> > @@ -4185,6 +4186,12 @@ static int hvmop_set_param(
> >          }
> >          d->arch.x87_fip_width = a.value;
> >          break;
> > +    case HVM_PARAM_LMCE:
> > +        if ( a.value > 1 )
> > +            rc = -EINVAL;
> > +        else if ( a.value == 1 )
> > +            rc = vmce_enable_lmce(d);
> > +        break;
> 
> If you named the param slightly differently, and if you introduced
> a #define for the one bit you care about, it could be ready for use
> for further future flags right away.
>

Yes, I'll rename it to HVM_PARAM_MCE_CAP and reserve bit 0 for LMCE capability.

Thanks,
Haozhong

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