From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751894AbdBXM7d (ORCPT ); Fri, 24 Feb 2017 07:59:33 -0500 Received: from dougal.metanate.com ([90.155.101.14]:29105 "EHLO metanate.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751084AbdBXMz1 (ORCPT ); Fri, 24 Feb 2017 07:55:27 -0500 From: John Keeping To: Mark Yao Cc: Chris Zhong , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Sean Paul , John Keeping Subject: [PATCH v4 23/23] drm/rockchip: dw-mipi-dsi: add reset control Date: Fri, 24 Feb 2017 12:55:06 +0000 Message-Id: <20170224125506.21533-24-john@metanate.com> X-Mailer: git-send-email 2.12.0.rc0.230.gf625d4cdb9.dirty In-Reply-To: <20170224125506.21533-1-john@metanate.com> References: <20170224125506.21533-1-john@metanate.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In order to fully reset the state of the MIPI controller we must assert this reset. This is slightly more complicated than it could be in order to maintain compatibility with device trees that do not specify the reset property. Signed-off-by: John Keeping Reviewed-by: Chris Zhong --- v4: - Fix error check for devm_reset_control_get() to use ENOENT v3: - Add Chris' Reviewed-by Unchanged in v2 --- drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c index 0c4bae711e84..30da75667334 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -1144,6 +1145,7 @@ static int dw_mipi_dsi_bind(struct device *dev, struct device *master, of_match_device(dw_mipi_dsi_dt_ids, dev); const struct dw_mipi_dsi_plat_data *pdata = of_id->data; struct platform_device *pdev = to_platform_device(dev); + struct reset_control *apb_rst; struct drm_device *drm = data; struct dw_mipi_dsi *dsi; struct resource *res; @@ -1182,6 +1184,35 @@ static int dw_mipi_dsi_bind(struct device *dev, struct device *master, return ret; } + /* + * Note that the reset was not defined in the initial device tree, so + * we have to be prepared for it not being found. + */ + apb_rst = devm_reset_control_get(dev, "apb"); + if (IS_ERR(apb_rst)) { + ret = PTR_ERR(apb_rst); + if (ret == -ENOENT) { + apb_rst = NULL; + } else { + dev_err(dev, "Unable to get reset control: %d\n", ret); + return ret; + } + } + + if (apb_rst) { + ret = clk_prepare_enable(dsi->pclk); + if (ret) { + dev_err(dev, "%s: Failed to enable pclk\n", __func__); + return ret; + } + + reset_control_assert(apb_rst); + usleep_range(10, 20); + reset_control_deassert(apb_rst); + + clk_disable_unprepare(dsi->pclk); + } + ret = clk_prepare_enable(dsi->pllref_clk); if (ret) { dev_err(dev, "%s: Failed to enable pllref_clk\n", __func__); -- 2.12.0.rc0.230.gf625d4cdb9.dirty From mboxrd@z Thu Jan 1 00:00:00 1970 From: John Keeping Subject: [PATCH v4 23/23] drm/rockchip: dw-mipi-dsi: add reset control Date: Fri, 24 Feb 2017 12:55:06 +0000 Message-ID: <20170224125506.21533-24-john@metanate.com> References: <20170224125506.21533-1-john@metanate.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20170224125506.21533-1-john@metanate.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Mark Yao Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, Chris Zhong , linux-arm-kernel@lists.infradead.org List-Id: linux-rockchip.vger.kernel.org SW4gb3JkZXIgdG8gZnVsbHkgcmVzZXQgdGhlIHN0YXRlIG9mIHRoZSBNSVBJIGNvbnRyb2xsZXIg d2UgbXVzdCBhc3NlcnQKdGhpcyByZXNldC4KClRoaXMgaXMgc2xpZ2h0bHkgbW9yZSBjb21wbGlj YXRlZCB0aGFuIGl0IGNvdWxkIGJlIGluIG9yZGVyIHRvIG1haW50YWluCmNvbXBhdGliaWxpdHkg d2l0aCBkZXZpY2UgdHJlZXMgdGhhdCBkbyBub3Qgc3BlY2lmeSB0aGUgcmVzZXQgcHJvcGVydHku CgpTaWduZWQtb2ZmLWJ5OiBKb2huIEtlZXBpbmcgPGpvaG5AbWV0YW5hdGUuY29tPgpSZXZpZXdl ZC1ieTogQ2hyaXMgWmhvbmcgPHp5d0Byb2NrLWNoaXBzLmNvbT4KLS0tCnY0OgotIEZpeCBlcnJv ciBjaGVjayBmb3IgZGV2bV9yZXNldF9jb250cm9sX2dldCgpIHRvIHVzZSBFTk9FTlQKdjM6Ci0g QWRkIENocmlzJyBSZXZpZXdlZC1ieQpVbmNoYW5nZWQgaW4gdjIKLS0tCiBkcml2ZXJzL2dwdS9k cm0vcm9ja2NoaXAvZHctbWlwaS1kc2kuYyB8IDMxICsrKysrKysrKysrKysrKysrKysrKysrKysr KysrKysKIDEgZmlsZSBjaGFuZ2VkLCAzMSBpbnNlcnRpb25zKCspCgpkaWZmIC0tZ2l0IGEvZHJp dmVycy9ncHUvZHJtL3JvY2tjaGlwL2R3LW1pcGktZHNpLmMgYi9kcml2ZXJzL2dwdS9kcm0vcm9j a2NoaXAvZHctbWlwaS1kc2kuYwppbmRleCAwYzRiYWU3MTFlODQuLjMwZGE3NTY2NzMzNCAxMDA2 NDQKLS0tIGEvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL2R3LW1pcGktZHNpLmMKKysrIGIvZHJp dmVycy9ncHUvZHJtL3JvY2tjaGlwL2R3LW1pcGktZHNpLmMKQEAgLTEzLDYgKzEzLDcgQEAKICNp bmNsdWRlIDxsaW51eC9tb2R1bGUuaD4KICNpbmNsdWRlIDxsaW51eC9vZl9kZXZpY2UuaD4KICNp bmNsdWRlIDxsaW51eC9yZWdtYXAuaD4KKyNpbmNsdWRlIDxsaW51eC9yZXNldC5oPgogI2luY2x1 ZGUgPGxpbnV4L21mZC9zeXNjb24uaD4KICNpbmNsdWRlIDxkcm0vZHJtX2F0b21pY19oZWxwZXIu aD4KICNpbmNsdWRlIDxkcm0vZHJtX2NydGMuaD4KQEAgLTExNDQsNiArMTE0NSw3IEBAIHN0YXRp YyBpbnQgZHdfbWlwaV9kc2lfYmluZChzdHJ1Y3QgZGV2aWNlICpkZXYsIHN0cnVjdCBkZXZpY2Ug Km1hc3RlciwKIAkJCW9mX21hdGNoX2RldmljZShkd19taXBpX2RzaV9kdF9pZHMsIGRldik7CiAJ Y29uc3Qgc3RydWN0IGR3X21pcGlfZHNpX3BsYXRfZGF0YSAqcGRhdGEgPSBvZl9pZC0+ZGF0YTsK IAlzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNlICpwZGV2ID0gdG9fcGxhdGZvcm1fZGV2aWNlKGRldik7 CisJc3RydWN0IHJlc2V0X2NvbnRyb2wgKmFwYl9yc3Q7CiAJc3RydWN0IGRybV9kZXZpY2UgKmRy bSA9IGRhdGE7CiAJc3RydWN0IGR3X21pcGlfZHNpICpkc2k7CiAJc3RydWN0IHJlc291cmNlICpy ZXM7CkBAIC0xMTgyLDYgKzExODQsMzUgQEAgc3RhdGljIGludCBkd19taXBpX2RzaV9iaW5kKHN0 cnVjdCBkZXZpY2UgKmRldiwgc3RydWN0IGRldmljZSAqbWFzdGVyLAogCQlyZXR1cm4gcmV0Owog CX0KIAorCS8qCisJICogTm90ZSB0aGF0IHRoZSByZXNldCB3YXMgbm90IGRlZmluZWQgaW4gdGhl IGluaXRpYWwgZGV2aWNlIHRyZWUsIHNvCisJICogd2UgaGF2ZSB0byBiZSBwcmVwYXJlZCBmb3Ig aXQgbm90IGJlaW5nIGZvdW5kLgorCSAqLworCWFwYl9yc3QgPSBkZXZtX3Jlc2V0X2NvbnRyb2xf Z2V0KGRldiwgImFwYiIpOworCWlmIChJU19FUlIoYXBiX3JzdCkpIHsKKwkJcmV0ID0gUFRSX0VS UihhcGJfcnN0KTsKKwkJaWYgKHJldCA9PSAtRU5PRU5UKSB7CisJCQlhcGJfcnN0ID0gTlVMTDsK KwkJfSBlbHNlIHsKKwkJCWRldl9lcnIoZGV2LCAiVW5hYmxlIHRvIGdldCByZXNldCBjb250cm9s OiAlZFxuIiwgcmV0KTsKKwkJCXJldHVybiByZXQ7CisJCX0KKwl9CisKKwlpZiAoYXBiX3JzdCkg eworCQlyZXQgPSBjbGtfcHJlcGFyZV9lbmFibGUoZHNpLT5wY2xrKTsKKwkJaWYgKHJldCkgewor CQkJZGV2X2VycihkZXYsICIlczogRmFpbGVkIHRvIGVuYWJsZSBwY2xrXG4iLCBfX2Z1bmNfXyk7 CisJCQlyZXR1cm4gcmV0OworCQl9CisKKwkJcmVzZXRfY29udHJvbF9hc3NlcnQoYXBiX3JzdCk7 CisJCXVzbGVlcF9yYW5nZSgxMCwgMjApOworCQlyZXNldF9jb250cm9sX2RlYXNzZXJ0KGFwYl9y c3QpOworCisJCWNsa19kaXNhYmxlX3VucHJlcGFyZShkc2ktPnBjbGspOworCX0KKwogCXJldCA9 IGNsa19wcmVwYXJlX2VuYWJsZShkc2ktPnBsbHJlZl9jbGspOwogCWlmIChyZXQpIHsKIAkJZGV2 X2VycihkZXYsICIlczogRmFpbGVkIHRvIGVuYWJsZSBwbGxyZWZfY2xrXG4iLCBfX2Z1bmNfXyk7 Ci0tIAoyLjEyLjAucmMwLjIzMC5nZjYyNWQ0Y2RiOS5kaXJ0eQoKX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVsIG1haWxpbmcgbGlzdApkcmkt ZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3Jn L21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: john@metanate.com (John Keeping) Date: Fri, 24 Feb 2017 12:55:06 +0000 Subject: [PATCH v4 23/23] drm/rockchip: dw-mipi-dsi: add reset control In-Reply-To: <20170224125506.21533-1-john@metanate.com> References: <20170224125506.21533-1-john@metanate.com> Message-ID: <20170224125506.21533-24-john@metanate.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org In order to fully reset the state of the MIPI controller we must assert this reset. This is slightly more complicated than it could be in order to maintain compatibility with device trees that do not specify the reset property. Signed-off-by: John Keeping Reviewed-by: Chris Zhong --- v4: - Fix error check for devm_reset_control_get() to use ENOENT v3: - Add Chris' Reviewed-by Unchanged in v2 --- drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c index 0c4bae711e84..30da75667334 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -1144,6 +1145,7 @@ static int dw_mipi_dsi_bind(struct device *dev, struct device *master, of_match_device(dw_mipi_dsi_dt_ids, dev); const struct dw_mipi_dsi_plat_data *pdata = of_id->data; struct platform_device *pdev = to_platform_device(dev); + struct reset_control *apb_rst; struct drm_device *drm = data; struct dw_mipi_dsi *dsi; struct resource *res; @@ -1182,6 +1184,35 @@ static int dw_mipi_dsi_bind(struct device *dev, struct device *master, return ret; } + /* + * Note that the reset was not defined in the initial device tree, so + * we have to be prepared for it not being found. + */ + apb_rst = devm_reset_control_get(dev, "apb"); + if (IS_ERR(apb_rst)) { + ret = PTR_ERR(apb_rst); + if (ret == -ENOENT) { + apb_rst = NULL; + } else { + dev_err(dev, "Unable to get reset control: %d\n", ret); + return ret; + } + } + + if (apb_rst) { + ret = clk_prepare_enable(dsi->pclk); + if (ret) { + dev_err(dev, "%s: Failed to enable pclk\n", __func__); + return ret; + } + + reset_control_assert(apb_rst); + usleep_range(10, 20); + reset_control_deassert(apb_rst); + + clk_disable_unprepare(dsi->pclk); + } + ret = clk_prepare_enable(dsi->pllref_clk); if (ret) { dev_err(dev, "%s: Failed to enable pllref_clk\n", __func__); -- 2.12.0.rc0.230.gf625d4cdb9.dirty