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From: Mahesh Kumar <mahesh1.kumar@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: paulo.r.zanoni@intel.com, maarten.lankhorst@intel.com
Subject: [PATCH 5/8] drm/i915/skl+: ddb min requirement may exceed allocation
Date: Tue, 28 Feb 2017 17:01:40 +0530	[thread overview]
Message-ID: <20170228113143.8280-6-mahesh1.kumar@intel.com> (raw)
In-Reply-To: <20170228113143.8280-1-mahesh1.kumar@intel.com>

DDB minimum requirement may also exceed the allocated DDB for CRTC.
Instead of directly deducting from alloc_size, check against
total_min_ddb requirement. if exceeding fail the flip.

Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 76c986166664..24e9e5d69833 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3380,6 +3380,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
 	int num_active;
 	unsigned plane_data_rate[I915_MAX_PLANES] = {};
 	unsigned plane_y_data_rate[I915_MAX_PLANES] = {};
+	uint16_t total_min_blocks = 0;
 
 	/* Clear the partitioning for disabled planes. */
 	memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe]));
@@ -3407,10 +3408,18 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
 	 */
 
 	for_each_plane_id_on_crtc(intel_crtc, plane_id) {
-		alloc_size -= minimum[plane_id];
-		alloc_size -= y_minimum[plane_id];
+		total_min_blocks += minimum[plane_id];
+		total_min_blocks += y_minimum[plane_id];
 	}
 
+	if ((total_min_blocks > alloc_size)) {
+		DRM_DEBUG_KMS("Requested display configuration exceeds system DDB limitations");
+		DRM_DEBUG_KMS("minimum required %d/%d\n", total_min_blocks,
+							alloc_size);
+		return-EINVAL;
+	}
+
+	alloc_size -= total_min_blocks;
 	ddb->plane[pipe][PLANE_CURSOR].start = alloc->end - minimum[PLANE_CURSOR];
 	ddb->plane[pipe][PLANE_CURSOR].end = alloc->end;
 
-- 
2.11.0

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  parent reply	other threads:[~2017-02-28 11:29 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-28 11:31 [PATCH 0/8] Implement DDB algorithm and WM cleanup Mahesh Kumar
2017-02-28 11:31 ` [PATCH 1/8] drm/i915/skl+: calculate pixel_rate & relative_data_rate in fixed point Mahesh Kumar
2017-03-16 18:48   ` Paulo Zanoni
2017-02-28 11:31 ` [PATCH 2/8] drm/i915/skl+: use linetime latency if ddb size is not available Mahesh Kumar
2017-02-28 11:31 ` [PATCH 3/8] drm/i915/skl: Fail the flip if no FB for WM calculation Mahesh Kumar
2017-02-28 11:31 ` [PATCH 4/8] drm/i915/skl+: no need to memset again Mahesh Kumar
2017-02-28 11:31 ` Mahesh Kumar [this message]
2017-04-12  9:17   ` [PATCH 5/8] drm/i915/skl+: ddb min requirement may exceed allocation Ander Conselvan De Oliveira
2017-04-12 15:09     ` Mahesh Kumar
2017-02-28 11:31 ` [PATCH 6/8] drm/i915/skl+: Watermark calculation cleanup Mahesh Kumar
2017-02-28 11:31 ` [PATCH 7/8] drm/i915/skl: New ddb allocation algorithm Mahesh Kumar
2017-02-28 11:31 ` [PATCH 8/8] drm/i915/skl+: consider max supported plane pixel rate while scaling Mahesh Kumar
2017-02-28 15:52 ` ✗ Fi.CI.BAT: failure for Implement DDB algorithm and WM cleanup Patchwork

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