From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sean Paul Subject: [PATCH 05/41] drm/bridge: analogix_dp: set psr activate/deactivate when enable/disable bridge Date: Thu, 9 Mar 2017 23:32:20 -0500 Message-ID: <20170310043305.17216-6-seanpaul@chromium.org> References: <20170310043305.17216-1-seanpaul@chromium.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20170310043305.17216-1-seanpaul@chromium.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: linux-rockchip@lists.infradead.org, dri-devel@lists.freedesktop.org Cc: zain wang , =?UTF-8?q?St=C3=A9phane=20Marchesin?= , Caesar Wang , linux-arm-kernel@lists.infradead.org List-Id: linux-rockchip.vger.kernel.org RnJvbTogemFpbiB3YW5nIDx3enpAcm9jay1jaGlwcy5jb20+CgpUaGVyZSdzIGEgcmFjZSBiZXR3 ZWVuIHdoZW4gYnJpZGdlX2Rpc2FibGUgYW5kIHdoZW4gdm9wX2NydGNfZGlzYWJsZQphcmUgY2Fs bGVkLiBJZiB0aGUgZmx1c2ggdGltZXIgdHJpZ2dlcnMgYSBuZXcgcHNyIHdvcmsgYmV0d2VlbiB0 aGVzZSwKd2Ugd2lsbCBvcGVyYXRlIGVEUCB3aXRob3V0IHBvd2VyIHNodXRkb3duZWQgYnkgYnJp ZGdlX2Rpc2FibGUuIEluIHRoaXMKY2FzZSwgbW92aW5nIGFjdGl2YXRlL2RlYWN0aXZhdGUgdG8g ZW5hYmxlL2Rpc2FibGUgYnJpZGdlIHRvIGF2b2lkIGl0LgoKQ2M6IFN0w6lwaGFuZSBNYXJjaGVz aW4gPG1hcmNoZXVAY2hyb21pdW0ub3JnPgpTaWduZWQtb2ZmLWJ5OiB6YWluIHdhbmcgPHd6ekBy b2NrLWNoaXBzLmNvbT4KU2lnbmVkLW9mZi1ieTogQ2Flc2FyIFdhbmcgPHd4dEByb2NrLWNoaXBz LmNvbT4KU2lnbmVkLW9mZi1ieTogU2VhbiBQYXVsIDxzZWFucGF1bEBjaHJvbWl1bS5vcmc+Ci0t LQogZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL2FuYWxvZ2l4X2RwLXJvY2tjaGlwLmMgfCAgNyAr KysrKy0KIGRyaXZlcnMvZ3B1L2RybS9yb2NrY2hpcC9yb2NrY2hpcF9kcm1fcHNyLmMgICAgIHwg MzAgKysrKysrKysrKysrKysrKysrKystLS0tLQogZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL3Jv Y2tjaGlwX2RybV9wc3IuaCAgICAgfCAgNCArKy0tCiBkcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAv cm9ja2NoaXBfZHJtX3ZvcC5jICAgICB8ICA0IC0tLS0KIDQgZmlsZXMgY2hhbmdlZCwgMzIgaW5z ZXJ0aW9ucygrKSwgMTMgZGVsZXRpb25zKC0pCgpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJt L3JvY2tjaGlwL2FuYWxvZ2l4X2RwLXJvY2tjaGlwLmMgYi9kcml2ZXJzL2dwdS9kcm0vcm9ja2No aXAvYW5hbG9naXhfZHAtcm9ja2NoaXAuYwppbmRleCA4NTQ4ZTgyNzE2MzkuLjI4YzBkNDQwNjQ1 NCAxMDA2NDQKLS0tIGEvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL2FuYWxvZ2l4X2RwLXJvY2tj aGlwLmMKKysrIGIvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL2FuYWxvZ2l4X2RwLXJvY2tjaGlw LmMKQEAgLTE1OSwxMiArMTU5LDE3IEBAIHN0YXRpYyBpbnQgcm9ja2NoaXBfZHBfcG93ZXJvbihz dHJ1Y3QgYW5hbG9naXhfZHBfcGxhdF9kYXRhICpwbGF0X2RhdGEpCiAJCXJldHVybiByZXQ7CiAJ fQogCi0JcmV0dXJuIDA7CisJcmV0dXJuIHJvY2tjaGlwX2RybV9wc3JfYWN0aXZhdGUoJmRwLT5l bmNvZGVyKTsKIH0KIAogc3RhdGljIGludCByb2NrY2hpcF9kcF9wb3dlcmRvd24oc3RydWN0IGFu YWxvZ2l4X2RwX3BsYXRfZGF0YSAqcGxhdF9kYXRhKQogewogCXN0cnVjdCByb2NrY2hpcF9kcF9k ZXZpY2UgKmRwID0gdG9fZHAocGxhdF9kYXRhKTsKKwlpbnQgcmV0OworCisJcmV0ID0gcm9ja2No aXBfZHJtX3Bzcl9kZWFjdGl2YXRlKCZkcC0+ZW5jb2Rlcik7CisJaWYgKHJldCAhPSAwKQorCQly ZXR1cm4gcmV0OwogCiAJY2xrX2Rpc2FibGVfdW5wcmVwYXJlKGRwLT5wY2xrKTsKIApkaWZmIC0t Z2l0IGEvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL3JvY2tjaGlwX2RybV9wc3IuYyBiL2RyaXZl cnMvZ3B1L2RybS9yb2NrY2hpcC9yb2NrY2hpcF9kcm1fcHNyLmMKaW5kZXggYTU1M2UxODJmZjUz Li40YzM3OWU5MGIxNzggMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9yb2NrY2hpcC9yb2Nr Y2hpcF9kcm1fcHNyLmMKKysrIGIvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL3JvY2tjaGlwX2Ry bV9wc3IuYwpAQCAtNTcsNiArNTcsMjQgQEAgc3RhdGljIHN0cnVjdCBwc3JfZHJ2ICpmaW5kX3Bz cl9ieV9jcnRjKHN0cnVjdCBkcm1fY3J0YyAqY3J0YykKIAlyZXR1cm4gcHNyOwogfQogCitzdGF0 aWMgc3RydWN0IHBzcl9kcnYgKmZpbmRfcHNyX2J5X2VuY29kZXIoc3RydWN0IGRybV9lbmNvZGVy ICplbmNvZGVyKQoreworCXN0cnVjdCByb2NrY2hpcF9kcm1fcHJpdmF0ZSAqZHJtX2RydiA9IGVu Y29kZXItPmRldi0+ZGV2X3ByaXZhdGU7CisJc3RydWN0IHBzcl9kcnYgKnBzcjsKKwl1bnNpZ25l ZCBsb25nIGZsYWdzOworCisJc3Bpbl9sb2NrX2lycXNhdmUoJmRybV9kcnYtPnBzcl9saXN0X2xv Y2ssIGZsYWdzKTsKKwlsaXN0X2Zvcl9lYWNoX2VudHJ5KHBzciwgJmRybV9kcnYtPnBzcl9saXN0 LCBsaXN0KSB7CisJCWlmIChwc3ItPmVuY29kZXIgPT0gZW5jb2RlcikKKwkJCWdvdG8gb3V0Owor CX0KKwlwc3IgPSBFUlJfUFRSKC1FTk9ERVYpOworCitvdXQ6CisJc3Bpbl91bmxvY2tfaXJxcmVz dG9yZSgmZHJtX2Rydi0+cHNyX2xpc3RfbG9jaywgZmxhZ3MpOworCXJldHVybiBwc3I7Cit9CisK IHN0YXRpYyB2b2lkIHBzcl9zZXRfc3RhdGVfbG9ja2VkKHN0cnVjdCBwc3JfZHJ2ICpwc3IsIGVu dW0gcHNyX3N0YXRlIHN0YXRlKQogewogCS8qCkBAIC0xMTUsMTQgKzEzMywxNCBAQCBzdGF0aWMg dm9pZCBwc3JfZmx1c2hfaGFuZGxlcih1bnNpZ25lZCBsb25nIGRhdGEpCiAKIC8qKgogICogcm9j a2NoaXBfZHJtX3Bzcl9hY3RpdmF0ZSAtIGFjdGl2YXRlIFBTUiBvbiB0aGUgZ2l2ZW4gcGlwZQot ICogQGNydGM6IENSVEMgdG8gb2J0YWluIHRoZSBQU1IgZW5jb2RlcgorICogQGVuY29kZXI6IGVu Y29kZXIgdG8gb2J0YWluIHRoZSBQU1IgZW5jb2RlcgogICoKICAqIFJldHVybnM6CiAgKiBaZXJv IG9uIHN1Y2Nlc3MsIG5lZ2F0aXZlIGVycm5vIG9uIGZhaWx1cmUuCiAgKi8KLWludCByb2NrY2hp cF9kcm1fcHNyX2FjdGl2YXRlKHN0cnVjdCBkcm1fY3J0YyAqY3J0YykKK2ludCByb2NrY2hpcF9k cm1fcHNyX2FjdGl2YXRlKHN0cnVjdCBkcm1fZW5jb2RlciAqZW5jb2RlcikKIHsKLQlzdHJ1Y3Qg cHNyX2RydiAqcHNyID0gZmluZF9wc3JfYnlfY3J0YyhjcnRjKTsKKwlzdHJ1Y3QgcHNyX2RydiAq cHNyID0gZmluZF9wc3JfYnlfZW5jb2RlcihlbmNvZGVyKTsKIAl1bnNpZ25lZCBsb25nIGZsYWdz OwogCiAJaWYgKElTX0VSUihwc3IpKQpAQCAtMTM4LDE0ICsxNTYsMTQgQEAgRVhQT1JUX1NZTUJP TChyb2NrY2hpcF9kcm1fcHNyX2FjdGl2YXRlKTsKIAogLyoqCiAgKiByb2NrY2hpcF9kcm1fcHNy X2RlYWN0aXZhdGUgLSBkZWFjdGl2YXRlIFBTUiBvbiB0aGUgZ2l2ZW4gcGlwZQotICogQGNydGM6 IENSVEMgdG8gb2J0YWluIHRoZSBQU1IgZW5jb2RlcgorICogQGVuY29kZXI6IGVuY29kZXIgdG8g b2J0YWluIHRoZSBQU1IgZW5jb2RlcgogICoKICAqIFJldHVybnM6CiAgKiBaZXJvIG9uIHN1Y2Nl c3MsIG5lZ2F0aXZlIGVycm5vIG9uIGZhaWx1cmUuCiAgKi8KLWludCByb2NrY2hpcF9kcm1fcHNy X2RlYWN0aXZhdGUoc3RydWN0IGRybV9jcnRjICpjcnRjKQoraW50IHJvY2tjaGlwX2RybV9wc3Jf ZGVhY3RpdmF0ZShzdHJ1Y3QgZHJtX2VuY29kZXIgKmVuY29kZXIpCiB7Ci0Jc3RydWN0IHBzcl9k cnYgKnBzciA9IGZpbmRfcHNyX2J5X2NydGMoY3J0Yyk7CisJc3RydWN0IHBzcl9kcnYgKnBzciA9 IGZpbmRfcHNyX2J5X2VuY29kZXIoZW5jb2Rlcik7CiAJdW5zaWduZWQgbG9uZyBmbGFnczsKIAog CWlmIChJU19FUlIocHNyKSkKZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9yb2NrY2hpcC9y b2NrY2hpcF9kcm1fcHNyLmggYi9kcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAvcm9ja2NoaXBfZHJt X3Bzci5oCmluZGV4IGI0MjBjZjFiZjkwMi4uYjFlYTAxNTVlNTdjIDEwMDY0NAotLS0gYS9kcml2 ZXJzL2dwdS9kcm0vcm9ja2NoaXAvcm9ja2NoaXBfZHJtX3Bzci5oCisrKyBiL2RyaXZlcnMvZ3B1 L2RybS9yb2NrY2hpcC9yb2NrY2hpcF9kcm1fcHNyLmgKQEAgLTE4LDggKzE4LDggQEAKIHZvaWQg cm9ja2NoaXBfZHJtX3Bzcl9mbHVzaF9hbGwoc3RydWN0IGRybV9kZXZpY2UgKmRldik7CiBpbnQg cm9ja2NoaXBfZHJtX3Bzcl9mbHVzaChzdHJ1Y3QgZHJtX2NydGMgKmNydGMpOwogCi1pbnQgcm9j a2NoaXBfZHJtX3Bzcl9hY3RpdmF0ZShzdHJ1Y3QgZHJtX2NydGMgKmNydGMpOwotaW50IHJvY2tj aGlwX2RybV9wc3JfZGVhY3RpdmF0ZShzdHJ1Y3QgZHJtX2NydGMgKmNydGMpOworaW50IHJvY2tj aGlwX2RybV9wc3JfYWN0aXZhdGUoc3RydWN0IGRybV9lbmNvZGVyICplbmNvZGVyKTsKK2ludCBy b2NrY2hpcF9kcm1fcHNyX2RlYWN0aXZhdGUoc3RydWN0IGRybV9lbmNvZGVyICplbmNvZGVyKTsK IAogaW50IHJvY2tjaGlwX2RybV9wc3JfcmVnaXN0ZXIoc3RydWN0IGRybV9lbmNvZGVyICplbmNv ZGVyLAogCQkJdm9pZCAoKnBzcl9zZXQpKHN0cnVjdCBkcm1fZW5jb2RlciAqLCBib29sIGVuYWJs ZSkpOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL3JvY2tjaGlwX2RybV92 b3AuYyBiL2RyaXZlcnMvZ3B1L2RybS9yb2NrY2hpcC9yb2NrY2hpcF9kcm1fdm9wLmMKaW5kZXgg MDUzOWFmYjZiN2M4Li4xYzFlODUzNWFkMjggMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9y b2NrY2hpcC9yb2NrY2hpcF9kcm1fdm9wLmMKKysrIGIvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlw L3JvY2tjaGlwX2RybV92b3AuYwpAQCAtNTY4LDggKzU2OCw2IEBAIHN0YXRpYyB2b2lkIHZvcF9j cnRjX2Rpc2FibGUoc3RydWN0IGRybV9jcnRjICpjcnRjKQogCiAJV0FSTl9PTih2b3AtPmV2ZW50 KTsKIAotCXJvY2tjaGlwX2RybV9wc3JfZGVhY3RpdmF0ZSgmdm9wLT5jcnRjKTsKLQogCS8qCiAJ ICogV2UgbmVlZCB0byBtYWtlIHN1cmUgdGhhdCBhbGwgd2luZG93cyBhcmUgZGlzYWJsZWQgYmVm b3JlIHdlCiAJICogZGlzYWJsZSB0aGF0IGNydGMuIE90aGVyd2lzZSB3ZSBtaWdodCB0cnkgdG8g c2NhbiBmcm9tIGEgZGVzdHJveWVkCkBAIC05ODEsOCArOTc5LDYgQEAgc3RhdGljIHZvaWQgdm9w X2NydGNfZW5hYmxlKHN0cnVjdCBkcm1fY3J0YyAqY3J0YykKIAljbGtfc2V0X3JhdGUodm9wLT5k Y2xrLCBhZGp1c3RlZF9tb2RlLT5jbG9jayAqIDEwMDApOwogCiAJVk9QX0NUUkxfU0VUKHZvcCwg c3RhbmRieSwgMCk7Ci0KLQlyb2NrY2hpcF9kcm1fcHNyX2FjdGl2YXRlKCZ2b3AtPmNydGMpOwog fQogCiBzdGF0aWMgYm9vbCB2b3BfZnNfaXJxX2lzX3BlbmRpbmcoc3RydWN0IHZvcCAqdm9wKQot LSAKMi4xMi4wLjI0Ni5nYTJlY2M4NDg2Ni1nb29nCgpfX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fXwpkcmktZGV2ZWwgbWFpbGluZyBsaXN0CmRyaS1kZXZlbEBs aXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1h bi9saXN0aW5mby9kcmktZGV2ZWwK From mboxrd@z Thu Jan 1 00:00:00 1970 From: seanpaul@chromium.org (Sean Paul) Date: Thu, 9 Mar 2017 23:32:20 -0500 Subject: [PATCH 05/41] drm/bridge: analogix_dp: set psr activate/deactivate when enable/disable bridge In-Reply-To: <20170310043305.17216-1-seanpaul@chromium.org> References: <20170310043305.17216-1-seanpaul@chromium.org> Message-ID: <20170310043305.17216-6-seanpaul@chromium.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org From: zain wang There's a race between when bridge_disable and when vop_crtc_disable are called. If the flush timer triggers a new psr work between these, we will operate eDP without power shutdowned by bridge_disable. In this case, moving activate/deactivate to enable/disable bridge to avoid it. Cc: St?phane Marchesin Signed-off-by: zain wang Signed-off-by: Caesar Wang Signed-off-by: Sean Paul --- drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 7 +++++- drivers/gpu/drm/rockchip/rockchip_drm_psr.c | 30 ++++++++++++++++++++----- drivers/gpu/drm/rockchip/rockchip_drm_psr.h | 4 ++-- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 4 ---- 4 files changed, 32 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c index 8548e8271639..28c0d4406454 100644 --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c @@ -159,12 +159,17 @@ static int rockchip_dp_poweron(struct analogix_dp_plat_data *plat_data) return ret; } - return 0; + return rockchip_drm_psr_activate(&dp->encoder); } static int rockchip_dp_powerdown(struct analogix_dp_plat_data *plat_data) { struct rockchip_dp_device *dp = to_dp(plat_data); + int ret; + + ret = rockchip_drm_psr_deactivate(&dp->encoder); + if (ret != 0) + return ret; clk_disable_unprepare(dp->pclk); diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c index a553e182ff53..4c379e90b178 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c @@ -57,6 +57,24 @@ static struct psr_drv *find_psr_by_crtc(struct drm_crtc *crtc) return psr; } +static struct psr_drv *find_psr_by_encoder(struct drm_encoder *encoder) +{ + struct rockchip_drm_private *drm_drv = encoder->dev->dev_private; + struct psr_drv *psr; + unsigned long flags; + + spin_lock_irqsave(&drm_drv->psr_list_lock, flags); + list_for_each_entry(psr, &drm_drv->psr_list, list) { + if (psr->encoder == encoder) + goto out; + } + psr = ERR_PTR(-ENODEV); + +out: + spin_unlock_irqrestore(&drm_drv->psr_list_lock, flags); + return psr; +} + static void psr_set_state_locked(struct psr_drv *psr, enum psr_state state) { /* @@ -115,14 +133,14 @@ static void psr_flush_handler(unsigned long data) /** * rockchip_drm_psr_activate - activate PSR on the given pipe - * @crtc: CRTC to obtain the PSR encoder + * @encoder: encoder to obtain the PSR encoder * * Returns: * Zero on success, negative errno on failure. */ -int rockchip_drm_psr_activate(struct drm_crtc *crtc) +int rockchip_drm_psr_activate(struct drm_encoder *encoder) { - struct psr_drv *psr = find_psr_by_crtc(crtc); + struct psr_drv *psr = find_psr_by_encoder(encoder); unsigned long flags; if (IS_ERR(psr)) @@ -138,14 +156,14 @@ EXPORT_SYMBOL(rockchip_drm_psr_activate); /** * rockchip_drm_psr_deactivate - deactivate PSR on the given pipe - * @crtc: CRTC to obtain the PSR encoder + * @encoder: encoder to obtain the PSR encoder * * Returns: * Zero on success, negative errno on failure. */ -int rockchip_drm_psr_deactivate(struct drm_crtc *crtc) +int rockchip_drm_psr_deactivate(struct drm_encoder *encoder) { - struct psr_drv *psr = find_psr_by_crtc(crtc); + struct psr_drv *psr = find_psr_by_encoder(encoder); unsigned long flags; if (IS_ERR(psr)) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.h b/drivers/gpu/drm/rockchip/rockchip_drm_psr.h index b420cf1bf902..b1ea0155e57c 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_psr.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.h @@ -18,8 +18,8 @@ void rockchip_drm_psr_flush_all(struct drm_device *dev); int rockchip_drm_psr_flush(struct drm_crtc *crtc); -int rockchip_drm_psr_activate(struct drm_crtc *crtc); -int rockchip_drm_psr_deactivate(struct drm_crtc *crtc); +int rockchip_drm_psr_activate(struct drm_encoder *encoder); +int rockchip_drm_psr_deactivate(struct drm_encoder *encoder); int rockchip_drm_psr_register(struct drm_encoder *encoder, void (*psr_set)(struct drm_encoder *, bool enable)); diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 0539afb6b7c8..1c1e8535ad28 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -568,8 +568,6 @@ static void vop_crtc_disable(struct drm_crtc *crtc) WARN_ON(vop->event); - rockchip_drm_psr_deactivate(&vop->crtc); - /* * We need to make sure that all windows are disabled before we * disable that crtc. Otherwise we might try to scan from a destroyed @@ -981,8 +979,6 @@ static void vop_crtc_enable(struct drm_crtc *crtc) clk_set_rate(vop->dclk, adjusted_mode->clock * 1000); VOP_CTRL_SET(vop, standby, 0); - - rockchip_drm_psr_activate(&vop->crtc); } static bool vop_fs_irq_is_pending(struct vop *vop) -- 2.12.0.246.ga2ecc84866-goog