From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752873AbdC0XKt (ORCPT ); Mon, 27 Mar 2017 19:10:49 -0400 Received: from anholt.net ([50.246.234.109]:35022 "EHLO anholt.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752657AbdC0XKq (ORCPT ); Mon, 27 Mar 2017 19:10:46 -0400 From: Eric Anholt To: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org, Eric Anholt Subject: [PATCH] drm/vc4: Allow using more than 256MB of CMA memory. Date: Mon, 27 Mar 2017 16:10:25 -0700 Message-Id: <20170327231025.19391-1-eric@anholt.net> X-Mailer: git-send-email 2.11.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Until now, we've had to limit Raspberry Pi to 256MB of CMA memory to keep from triggering the hardware addressing bug between of the tile binner of the tile alloc memory (where the top 4 bits come from the tile state data array's address). To work around that and allow more memory to be reserved for graphics, allocate a single BO to store tile state data arrays and tile alloc/overflow memory while the GPU is active, and make sure that that one BO doesn't happen to cross a 256MB boundary. With that in place, we can allocate textures and shaders anywhere in system memory (still contiguous, of course). Signed-off-by: Eric Anholt --- drivers/gpu/drm/vc4/vc4_drv.h | 28 +++++-- drivers/gpu/drm/vc4/vc4_gem.c | 12 ++- drivers/gpu/drm/vc4/vc4_irq.c | 61 +++++++-------- drivers/gpu/drm/vc4/vc4_render_cl.c | 3 +- drivers/gpu/drm/vc4/vc4_v3d.c | 150 ++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/vc4/vc4_validate.c | 54 ++++++------- 6 files changed, 234 insertions(+), 74 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h index dffce6293d87..5d9532163cbe 100644 --- a/drivers/gpu/drm/vc4/vc4_drv.h +++ b/drivers/gpu/drm/vc4/vc4_drv.h @@ -95,12 +95,23 @@ struct vc4_dev { */ struct list_head seqno_cb_list; - /* The binner overflow memory that's currently set up in - * BPOA/BPOS registers. When overflow occurs and a new one is - * allocated, the previous one will be moved to - * vc4->current_exec's free list. + /* The memory used for storing binner tile alloc, tile state, + * and overflow memory allocations. This is freed when V3D + * powers down. */ - struct vc4_bo *overflow_mem; + struct vc4_bo *bin_bo; + + /* Size of blocks allocated within bin_bo. */ + uint32_t bin_alloc_size; + + /* Bitmask of the bin_alloc_size chunks in bin_bo that are + * used. + */ + uint32_t bin_alloc_used; + + /* Bitmask of the current bin_alloc used for overflow memory. */ + uint32_t bin_alloc_overflow; + struct work_struct overflow_mem_work; int power_refcount; @@ -293,8 +304,12 @@ struct vc4_exec_info { bool found_increment_semaphore_packet; bool found_flush; uint8_t bin_tiles_x, bin_tiles_y; - struct drm_gem_cma_object *tile_bo; + /* Physical address of the start of the tile alloc array + * (where each tile's binned CL will start) + */ uint32_t tile_alloc_offset; + /* Bitmask of which binner slots are freed when this job completes. */ + uint32_t bin_slots; /** * Computed addresses pointing into exec_bo where we start the @@ -522,6 +537,7 @@ void vc4_plane_async_set_fb(struct drm_plane *plane, extern struct platform_driver vc4_v3d_driver; int vc4_v3d_debugfs_ident(struct seq_file *m, void *unused); int vc4_v3d_debugfs_regs(struct seq_file *m, void *unused); +int vc4_v3d_get_bin_slot(struct vc4_dev *vc4); /* vc4_validate.c */ int diff --git a/drivers/gpu/drm/vc4/vc4_gem.c b/drivers/gpu/drm/vc4/vc4_gem.c index e9c381c42139..3ecd1ba7af75 100644 --- a/drivers/gpu/drm/vc4/vc4_gem.c +++ b/drivers/gpu/drm/vc4/vc4_gem.c @@ -705,6 +705,7 @@ static void vc4_complete_exec(struct drm_device *dev, struct vc4_exec_info *exec) { struct vc4_dev *vc4 = to_vc4_dev(dev); + unsigned long irqflags; unsigned i; if (exec->bo) { @@ -720,6 +721,11 @@ vc4_complete_exec(struct drm_device *dev, struct vc4_exec_info *exec) drm_gem_object_unreference_unlocked(&bo->base.base); } + /* Free up the allocation of any bin slots we used. */ + spin_lock_irqsave(&vc4->job_lock, irqflags); + vc4->bin_alloc_used &= ~exec->bin_slots; + spin_unlock_irqrestore(&vc4->job_lock, irqflags); + mutex_lock(&vc4->power_lock); if (--vc4->power_refcount == 0) { pm_runtime_mark_last_busy(&vc4->v3d->pdev->dev); @@ -968,9 +974,9 @@ vc4_gem_destroy(struct drm_device *dev) /* V3D should already have disabled its interrupt and cleared * the overflow allocation registers. Now free the object. */ - if (vc4->overflow_mem) { - drm_gem_object_unreference_unlocked(&vc4->overflow_mem->base.base); - vc4->overflow_mem = NULL; + if (vc4->bin_bo) { + drm_gem_object_put_unlocked(&vc4->bin_bo->base.base); + vc4->bin_bo = NULL; } if (vc4->hang_state) diff --git a/drivers/gpu/drm/vc4/vc4_irq.c b/drivers/gpu/drm/vc4/vc4_irq.c index cdc6e6760705..47bbec962f45 100644 --- a/drivers/gpu/drm/vc4/vc4_irq.c +++ b/drivers/gpu/drm/vc4/vc4_irq.c @@ -59,50 +59,45 @@ vc4_overflow_mem_work(struct work_struct *work) { struct vc4_dev *vc4 = container_of(work, struct vc4_dev, overflow_mem_work); - struct drm_device *dev = vc4->dev; - struct vc4_bo *bo; + struct vc4_bo *bo = vc4->bin_bo; + int bin_bo_slot; + struct vc4_exec_info *exec; + unsigned long irqflags; - bo = vc4_bo_create(dev, 256 * 1024, true); - if (IS_ERR(bo)) { + bin_bo_slot = vc4_v3d_get_bin_slot(vc4); + if (bin_bo_slot < 0) { DRM_ERROR("Couldn't allocate binner overflow mem\n"); return; } - /* If there's a job executing currently, then our previous - * overflow allocation is getting used in that job and we need - * to queue it to be released when the job is done. But if no - * job is executing at all, then we can free the old overflow - * object direcctly. - * - * No lock necessary for this pointer since we're the only - * ones that update the pointer, and our workqueue won't - * reenter. - */ - if (vc4->overflow_mem) { - struct vc4_exec_info *current_exec; - unsigned long irqflags; - - spin_lock_irqsave(&vc4->job_lock, irqflags); - current_exec = vc4_first_bin_job(vc4); - if (!current_exec) - current_exec = vc4_last_render_job(vc4); - if (current_exec) { - vc4->overflow_mem->seqno = current_exec->seqno; - list_add_tail(&vc4->overflow_mem->unref_head, - ¤t_exec->unref_list); - vc4->overflow_mem = NULL; + spin_lock_irqsave(&vc4->job_lock, irqflags); + + if (vc4->bin_alloc_overflow) { + /* If we had overflow memory allocated previously, + * then that chunk will free when the current bin job + * is done. If we don't have a bin job running, then + * the chunk will be done whenever the list of render + * jobs has drained. + */ + exec = vc4_first_bin_job(vc4); + if (!exec) + exec = vc4_last_render_job(vc4); + if (exec) { + exec->bin_slots |= vc4->bin_alloc_overflow; + } else { + /* There's nothing queued in the hardware, so + * the old slot is free immediately. + */ + vc4->bin_alloc_used &= ~vc4->bin_alloc_overflow; } - spin_unlock_irqrestore(&vc4->job_lock, irqflags); } + vc4->bin_alloc_overflow = BIT(bin_bo_slot); - if (vc4->overflow_mem) - drm_gem_object_unreference_unlocked(&vc4->overflow_mem->base.base); - vc4->overflow_mem = bo; - - V3D_WRITE(V3D_BPOA, bo->base.paddr); + V3D_WRITE(V3D_BPOA, bo->base.paddr + bin_bo_slot * vc4->bin_alloc_size); V3D_WRITE(V3D_BPOS, bo->base.base.size); V3D_WRITE(V3D_INTCTL, V3D_INT_OUTOMEM); V3D_WRITE(V3D_INTENA, V3D_INT_OUTOMEM); + spin_unlock_irqrestore(&vc4->job_lock, irqflags); } static void diff --git a/drivers/gpu/drm/vc4/vc4_render_cl.c b/drivers/gpu/drm/vc4/vc4_render_cl.c index 4339471f517f..5dc19429d4ae 100644 --- a/drivers/gpu/drm/vc4/vc4_render_cl.c +++ b/drivers/gpu/drm/vc4/vc4_render_cl.c @@ -182,8 +182,7 @@ static void emit_tile(struct vc4_exec_info *exec, if (has_bin) { rcl_u8(setup, VC4_PACKET_BRANCH_TO_SUB_LIST); - rcl_u32(setup, (exec->tile_bo->paddr + - exec->tile_alloc_offset + + rcl_u32(setup, (exec->tile_alloc_offset + (y * exec->bin_tiles_x + x) * 32)); } diff --git a/drivers/gpu/drm/vc4/vc4_v3d.c b/drivers/gpu/drm/vc4/vc4_v3d.c index 7cc346ad9b0b..a88078d7c9d1 100644 --- a/drivers/gpu/drm/vc4/vc4_v3d.c +++ b/drivers/gpu/drm/vc4/vc4_v3d.c @@ -156,6 +156,144 @@ static void vc4_v3d_init_hw(struct drm_device *dev) V3D_WRITE(V3D_VPMBASE, 0); } +int vc4_v3d_get_bin_slot(struct vc4_dev *vc4) +{ + struct drm_device *dev = vc4->dev; + unsigned long irqflags; + int slot; + uint64_t seqno = 0; + struct vc4_exec_info *exec; + +try_again: + spin_lock_irqsave(&vc4->job_lock, irqflags); + slot = ffs(~vc4->bin_alloc_used); + if (slot != 0) { + /* Switch from ffs() bit index to a 0-based index. */ + slot--; + vc4->bin_alloc_used |= BIT(slot); + spin_unlock_irqrestore(&vc4->job_lock, irqflags); + return slot; + } + + /* Couldn't find an open slot. Wait for render to complete + * and try again. + */ + exec = vc4_last_render_job(vc4); + if (exec) + seqno = exec->seqno; + spin_unlock_irqrestore(&vc4->job_lock, irqflags); + + if (seqno) { + int ret = vc4_wait_for_seqno(dev, seqno, ~0ull, true); + + if (ret == 0) + goto try_again; + + return ret; + } + + return -ENOMEM; +} + +/** + * vc4_allocate_bin_bo() - allocates the memory that will be used for + * tile binning. + * + * The binner has a limitation that the addresses in the tile state + * buffer that point into the tile alloc buffer or binner overflow + * memory only have 28 bits (256MB), and the top 4 on the bus for + * tile alloc references end up coming from the tile state buffer's + * address. + * + * To work around this, we allocate a single large buffer while V3D is + * in use, make sure that it has the top 4 bits constant across its + * entire extent, and then put the tile state, tile alloc, and binner + * overflow memory inside that buffer. + * + * This creates a limitation where we may not be able to execute a job + * if it doesn't fit within the buffer that we allocated up front. + * However, it turns out that 16MB is "enough for anybody", and + * real-world applications run into allocation failures from the + * overall CMA pool before they make scenes complicated enough to run + * out of bin space. + */ +int +vc4_allocate_bin_bo(struct drm_device *drm) +{ + struct vc4_dev *vc4 = to_vc4_dev(drm); + struct vc4_v3d *v3d = vc4->v3d; + uint32_t size = 16 * 1024 * 1024; + int ret = 0; + struct list_head list; + + /* We may need to try allocating more than once to get a BO + * that doesn't cross 256MB. Track the ones we've allocated + * that failed so far, so that we can free them when we've got + * one that succeeded (if we freed them right away, our next + * allocation would probably be the same chunk of memory). + */ + INIT_LIST_HEAD(&list); + + while (true) { + struct vc4_bo *bo = vc4_bo_create(drm, size, true); + + if (IS_ERR(bo)) { + ret = PTR_ERR(bo); + + dev_err(&v3d->pdev->dev, + "Failed to allocate memory for tile binning: " + "%d. You may need to enable CMA or give it " + "more memory.", + ret); + break; + } + + /* Check if this BO won't trigger the addressing bug. */ + if ((bo->base.paddr & 0xf0000000) == + ((bo->base.paddr + bo->base.base.size - 1) & 0xf0000000)) { + vc4->bin_bo = bo; + + /* Set up for allocating 512KB chunks of + * binner memory. The biggest allocation we + * need to do is for the initial tile alloc + + * tile state buffer. We can render to a + * maximum of ((2048*2048) / (32*32) = 4096 + * tiles in a frame (until we do floating + * point rendering, at which point it would be + * 8192). Tile state is 48b/tile (rounded to + * a page), and tile alloc is 32b/tile + * (rounded to a page), plus a page of extra, + * for a total of 320kb for our worst-case. + * We choose 512kb so that it divides evenly + * into our 16MB, and the rest of the 512kb + * will be used as storage for the overflow + * from the initial 32b CL per bin. + */ + vc4->bin_alloc_size = 512 * 1024; + vc4->bin_alloc_used = 0; + vc4->bin_alloc_overflow = 0; + WARN_ON_ONCE(sizeof(vc4->bin_alloc_used) * 8 != + bo->base.base.size / vc4->bin_alloc_size); + + break; + } + + /* Put it on the list to free later, and try again. */ + list_add(&bo->unref_head, &list); + } + + /* Free all the BOs we allocated but didn't choose. */ + while (!list_empty(&list)) { + struct vc4_bo *bo = list_last_entry(&list, + struct vc4_bo, unref_head); + + list_del(&bo->unref_head); + drm_gem_object_put_unlocked(&bo->base.base); + } + + return ret; +} + #ifdef CONFIG_PM static int vc4_v3d_runtime_suspend(struct device *dev) { @@ -164,6 +302,9 @@ static int vc4_v3d_runtime_suspend(struct device *dev) vc4_irq_uninstall(vc4->dev); + drm_gem_object_put_unlocked(&vc4->bin_bo->base.base); + vc4->bin_bo = NULL; + return 0; } @@ -171,6 +312,11 @@ static int vc4_v3d_runtime_resume(struct device *dev) { struct vc4_v3d *v3d = dev_get_drvdata(dev); struct vc4_dev *vc4 = v3d->vc4; + int ret; + + ret = vc4_allocate_bin_bo(vc4->dev); + if (ret) + return ret; vc4_v3d_init_hw(vc4->dev); vc4_irq_postinstall(vc4->dev); @@ -208,6 +354,10 @@ static int vc4_v3d_bind(struct device *dev, struct device *master, void *data) return -EINVAL; } + ret = vc4_allocate_bin_bo(drm); + if (ret) + return ret; + /* Reset the binner overflow address/size at setup, to be sure * we don't reuse an old one. */ diff --git a/drivers/gpu/drm/vc4/vc4_validate.c b/drivers/gpu/drm/vc4/vc4_validate.c index da6f1e138e8d..3de8f11595c0 100644 --- a/drivers/gpu/drm/vc4/vc4_validate.c +++ b/drivers/gpu/drm/vc4/vc4_validate.c @@ -348,10 +348,11 @@ static int validate_tile_binning_config(VALIDATE_ARGS) { struct drm_device *dev = exec->exec_bo->base.dev; - struct vc4_bo *tile_bo; + struct vc4_dev *vc4 = to_vc4_dev(dev); uint8_t flags; - uint32_t tile_state_size, tile_alloc_size; - uint32_t tile_count; + uint32_t tile_state_size; + uint32_t tile_count, bin_addr; + int bin_slot; if (exec->found_tile_binning_mode_config_packet) { DRM_ERROR("Duplicate VC4_PACKET_TILE_BINNING_MODE_CONFIG\n"); @@ -377,13 +378,28 @@ validate_tile_binning_config(VALIDATE_ARGS) return -EINVAL; } + bin_slot = vc4_v3d_get_bin_slot(vc4); + if (bin_slot < 0) { + if (bin_slot != -EINTR && bin_slot != -ERESTARTSYS) { + DRM_ERROR("Failed to allocate binner memory: %d\n", + bin_slot); + } + return bin_slot; + } + + /* The slot we allocated will only be used by this job, and is + * free when the job completes rendering. + */ + exec->bin_slots |= BIT(bin_slot); + bin_addr = vc4->bin_bo->base.paddr + bin_slot * vc4->bin_alloc_size; + /* The tile state data array is 48 bytes per tile, and we put it at * the start of a BO containing both it and the tile alloc. */ tile_state_size = 48 * tile_count; /* Since the tile alloc array will follow us, align. */ - exec->tile_alloc_offset = roundup(tile_state_size, 4096); + exec->tile_alloc_offset = bin_addr + roundup(tile_state_size, 4096); *(uint8_t *)(validated + 14) = ((flags & ~(VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_MASK | @@ -394,35 +410,13 @@ validate_tile_binning_config(VALIDATE_ARGS) VC4_SET_FIELD(VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_128, VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE)); - /* Initial block size. */ - tile_alloc_size = 32 * tile_count; - - /* - * The initial allocation gets rounded to the next 256 bytes before - * the hardware starts fulfilling further allocations. - */ - tile_alloc_size = roundup(tile_alloc_size, 256); - - /* Add space for the extra allocations. This is what gets used first, - * before overflow memory. It must have at least 4096 bytes, but we - * want to avoid overflow memory usage if possible. - */ - tile_alloc_size += 1024 * 1024; - - tile_bo = vc4_bo_create(dev, exec->tile_alloc_offset + tile_alloc_size, - true); - exec->tile_bo = &tile_bo->base; - if (IS_ERR(exec->tile_bo)) - return PTR_ERR(exec->tile_bo); - list_add_tail(&tile_bo->unref_head, &exec->unref_list); - /* tile alloc address. */ - *(uint32_t *)(validated + 0) = (exec->tile_bo->paddr + - exec->tile_alloc_offset); + *(uint32_t *)(validated + 0) = exec->tile_alloc_offset; /* tile alloc size. */ - *(uint32_t *)(validated + 4) = tile_alloc_size; + *(uint32_t *)(validated + 4) = (bin_addr + vc4->bin_alloc_size - + exec->tile_alloc_offset); /* tile state address. */ - *(uint32_t *)(validated + 8) = exec->tile_bo->paddr; + *(uint32_t *)(validated + 8) = bin_addr; return 0; } -- 2.11.0 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eric Anholt Subject: [PATCH] drm/vc4: Allow using more than 256MB of CMA memory. Date: Mon, 27 Mar 2017 16:10:25 -0700 Message-ID: <20170327231025.19391-1-eric@anholt.net> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from anholt.net (anholt.net [50.246.234.109]) by gabe.freedesktop.org (Postfix) with ESMTP id D491B6E391 for ; Mon, 27 Mar 2017 23:10:30 +0000 (UTC) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org List-Id: dri-devel@lists.freedesktop.org VW50aWwgbm93LCB3ZSd2ZSBoYWQgdG8gbGltaXQgUmFzcGJlcnJ5IFBpIHRvIDI1Nk1CIG9mIENN QSBtZW1vcnkgdG8Ka2VlcCBmcm9tIHRyaWdnZXJpbmcgdGhlIGhhcmR3YXJlIGFkZHJlc3Npbmcg YnVnIGJldHdlZW4gb2YgdGhlIHRpbGUKYmlubmVyIG9mIHRoZSB0aWxlIGFsbG9jIG1lbW9yeSAo d2hlcmUgdGhlIHRvcCA0IGJpdHMgY29tZSBmcm9tIHRoZQp0aWxlIHN0YXRlIGRhdGEgYXJyYXkn cyBhZGRyZXNzKS4KClRvIHdvcmsgYXJvdW5kIHRoYXQgYW5kIGFsbG93IG1vcmUgbWVtb3J5IHRv IGJlIHJlc2VydmVkIGZvciBncmFwaGljcywKYWxsb2NhdGUgYSBzaW5nbGUgQk8gdG8gc3RvcmUg dGlsZSBzdGF0ZSBkYXRhIGFycmF5cyBhbmQgdGlsZQphbGxvYy9vdmVyZmxvdyBtZW1vcnkgd2hp bGUgdGhlIEdQVSBpcyBhY3RpdmUsIGFuZCBtYWtlIHN1cmUgdGhhdCB0aGF0Cm9uZSBCTyBkb2Vz bid0IGhhcHBlbiB0byBjcm9zcyBhIDI1Nk1CIGJvdW5kYXJ5LiAgV2l0aCB0aGF0IGluIHBsYWNl LAp3ZSBjYW4gYWxsb2NhdGUgdGV4dHVyZXMgYW5kIHNoYWRlcnMgYW55d2hlcmUgaW4gc3lzdGVt IG1lbW9yeSAoc3RpbGwKY29udGlndW91cywgb2YgY291cnNlKS4KClNpZ25lZC1vZmYtYnk6IEVy aWMgQW5ob2x0IDxlcmljQGFuaG9sdC5uZXQ+Ci0tLQogZHJpdmVycy9ncHUvZHJtL3ZjNC92YzRf ZHJ2LmggICAgICAgfCAgMjggKysrKystLQogZHJpdmVycy9ncHUvZHJtL3ZjNC92YzRfZ2VtLmMg ICAgICAgfCAgMTIgKystCiBkcml2ZXJzL2dwdS9kcm0vdmM0L3ZjNF9pcnEuYyAgICAgICB8ICA2 MSArKysrKysrLS0tLS0tLS0KIGRyaXZlcnMvZ3B1L2RybS92YzQvdmM0X3JlbmRlcl9jbC5jIHwg ICAzICstCiBkcml2ZXJzL2dwdS9kcm0vdmM0L3ZjNF92M2QuYyAgICAgICB8IDE1MCArKysrKysr KysrKysrKysrKysrKysrKysrKysrKysrKysrKysKIGRyaXZlcnMvZ3B1L2RybS92YzQvdmM0X3Zh bGlkYXRlLmMgIHwgIDU0ICsrKysrKy0tLS0tLS0KIDYgZmlsZXMgY2hhbmdlZCwgMjM0IGluc2Vy dGlvbnMoKyksIDc0IGRlbGV0aW9ucygtKQoKZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS92 YzQvdmM0X2Rydi5oIGIvZHJpdmVycy9ncHUvZHJtL3ZjNC92YzRfZHJ2LmgKaW5kZXggZGZmY2U2 MjkzZDg3Li41ZDk1MzIxNjNjYmUgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS92YzQvdmM0 X2Rydi5oCisrKyBiL2RyaXZlcnMvZ3B1L2RybS92YzQvdmM0X2Rydi5oCkBAIC05NSwxMiArOTUs MjMgQEAgc3RydWN0IHZjNF9kZXYgewogCSAqLwogCXN0cnVjdCBsaXN0X2hlYWQgc2Vxbm9fY2Jf bGlzdDsKIAotCS8qIFRoZSBiaW5uZXIgb3ZlcmZsb3cgbWVtb3J5IHRoYXQncyBjdXJyZW50bHkg c2V0IHVwIGluCi0JICogQlBPQS9CUE9TIHJlZ2lzdGVycy4gIFdoZW4gb3ZlcmZsb3cgb2NjdXJz IGFuZCBhIG5ldyBvbmUgaXMKLQkgKiBhbGxvY2F0ZWQsIHRoZSBwcmV2aW91cyBvbmUgd2lsbCBi ZSBtb3ZlZCB0bwotCSAqIHZjNC0+Y3VycmVudF9leGVjJ3MgZnJlZSBsaXN0LgorCS8qIFRoZSBt ZW1vcnkgdXNlZCBmb3Igc3RvcmluZyBiaW5uZXIgdGlsZSBhbGxvYywgdGlsZSBzdGF0ZSwKKwkg KiBhbmQgb3ZlcmZsb3cgbWVtb3J5IGFsbG9jYXRpb25zLiAgVGhpcyBpcyBmcmVlZCB3aGVuIFYz RAorCSAqIHBvd2VycyBkb3duLgogCSAqLwotCXN0cnVjdCB2YzRfYm8gKm92ZXJmbG93X21lbTsK KwlzdHJ1Y3QgdmM0X2JvICpiaW5fYm87CisKKwkvKiBTaXplIG9mIGJsb2NrcyBhbGxvY2F0ZWQg d2l0aGluIGJpbl9iby4gKi8KKwl1aW50MzJfdCBiaW5fYWxsb2Nfc2l6ZTsKKworCS8qIEJpdG1h c2sgb2YgdGhlIGJpbl9hbGxvY19zaXplIGNodW5rcyBpbiBiaW5fYm8gdGhhdCBhcmUKKwkgKiB1 c2VkLgorCSAqLworCXVpbnQzMl90IGJpbl9hbGxvY191c2VkOworCisJLyogQml0bWFzayBvZiB0 aGUgY3VycmVudCBiaW5fYWxsb2MgdXNlZCBmb3Igb3ZlcmZsb3cgbWVtb3J5LiAqLworCXVpbnQz Ml90IGJpbl9hbGxvY19vdmVyZmxvdzsKKwogCXN0cnVjdCB3b3JrX3N0cnVjdCBvdmVyZmxvd19t ZW1fd29yazsKIAogCWludCBwb3dlcl9yZWZjb3VudDsKQEAgLTI5Myw4ICszMDQsMTIgQEAgc3Ry dWN0IHZjNF9leGVjX2luZm8gewogCWJvb2wgZm91bmRfaW5jcmVtZW50X3NlbWFwaG9yZV9wYWNr ZXQ7CiAJYm9vbCBmb3VuZF9mbHVzaDsKIAl1aW50OF90IGJpbl90aWxlc194LCBiaW5fdGlsZXNf eTsKLQlzdHJ1Y3QgZHJtX2dlbV9jbWFfb2JqZWN0ICp0aWxlX2JvOworCS8qIFBoeXNpY2FsIGFk ZHJlc3Mgb2YgdGhlIHN0YXJ0IG9mIHRoZSB0aWxlIGFsbG9jIGFycmF5CisJICogKHdoZXJlIGVh Y2ggdGlsZSdzIGJpbm5lZCBDTCB3aWxsIHN0YXJ0KQorCSAqLwogCXVpbnQzMl90IHRpbGVfYWxs b2Nfb2Zmc2V0OworCS8qIEJpdG1hc2sgb2Ygd2hpY2ggYmlubmVyIHNsb3RzIGFyZSBmcmVlZCB3 aGVuIHRoaXMgam9iIGNvbXBsZXRlcy4gKi8KKwl1aW50MzJfdCBiaW5fc2xvdHM7CiAKIAkvKioK IAkgKiBDb21wdXRlZCBhZGRyZXNzZXMgcG9pbnRpbmcgaW50byBleGVjX2JvIHdoZXJlIHdlIHN0 YXJ0IHRoZQpAQCAtNTIyLDYgKzUzNyw3IEBAIHZvaWQgdmM0X3BsYW5lX2FzeW5jX3NldF9mYihz dHJ1Y3QgZHJtX3BsYW5lICpwbGFuZSwKIGV4dGVybiBzdHJ1Y3QgcGxhdGZvcm1fZHJpdmVyIHZj NF92M2RfZHJpdmVyOwogaW50IHZjNF92M2RfZGVidWdmc19pZGVudChzdHJ1Y3Qgc2VxX2ZpbGUg Km0sIHZvaWQgKnVudXNlZCk7CiBpbnQgdmM0X3YzZF9kZWJ1Z2ZzX3JlZ3Moc3RydWN0IHNlcV9m aWxlICptLCB2b2lkICp1bnVzZWQpOworaW50IHZjNF92M2RfZ2V0X2Jpbl9zbG90KHN0cnVjdCB2 YzRfZGV2ICp2YzQpOwogCiAvKiB2YzRfdmFsaWRhdGUuYyAqLwogaW50CmRpZmYgLS1naXQgYS9k cml2ZXJzL2dwdS9kcm0vdmM0L3ZjNF9nZW0uYyBiL2RyaXZlcnMvZ3B1L2RybS92YzQvdmM0X2dl bS5jCmluZGV4IGU5YzM4MWM0MjEzOS4uM2VjZDFiYTdhZjc1IDEwMDY0NAotLS0gYS9kcml2ZXJz L2dwdS9kcm0vdmM0L3ZjNF9nZW0uYworKysgYi9kcml2ZXJzL2dwdS9kcm0vdmM0L3ZjNF9nZW0u YwpAQCAtNzA1LDYgKzcwNSw3IEBAIHN0YXRpYyB2b2lkCiB2YzRfY29tcGxldGVfZXhlYyhzdHJ1 Y3QgZHJtX2RldmljZSAqZGV2LCBzdHJ1Y3QgdmM0X2V4ZWNfaW5mbyAqZXhlYykKIHsKIAlzdHJ1 Y3QgdmM0X2RldiAqdmM0ID0gdG9fdmM0X2RldihkZXYpOworCXVuc2lnbmVkIGxvbmcgaXJxZmxh Z3M7CiAJdW5zaWduZWQgaTsKIAogCWlmIChleGVjLT5ibykgewpAQCAtNzIwLDYgKzcyMSwxMSBA QCB2YzRfY29tcGxldGVfZXhlYyhzdHJ1Y3QgZHJtX2RldmljZSAqZGV2LCBzdHJ1Y3QgdmM0X2V4 ZWNfaW5mbyAqZXhlYykKIAkJZHJtX2dlbV9vYmplY3RfdW5yZWZlcmVuY2VfdW5sb2NrZWQoJmJv LT5iYXNlLmJhc2UpOwogCX0KIAorCS8qIEZyZWUgdXAgdGhlIGFsbG9jYXRpb24gb2YgYW55IGJp biBzbG90cyB3ZSB1c2VkLiAqLworCXNwaW5fbG9ja19pcnFzYXZlKCZ2YzQtPmpvYl9sb2NrLCBp cnFmbGFncyk7CisJdmM0LT5iaW5fYWxsb2NfdXNlZCAmPSB+ZXhlYy0+YmluX3Nsb3RzOworCXNw aW5fdW5sb2NrX2lycXJlc3RvcmUoJnZjNC0+am9iX2xvY2ssIGlycWZsYWdzKTsKKwogCW11dGV4 X2xvY2soJnZjNC0+cG93ZXJfbG9jayk7CiAJaWYgKC0tdmM0LT5wb3dlcl9yZWZjb3VudCA9PSAw KSB7CiAJCXBtX3J1bnRpbWVfbWFya19sYXN0X2J1c3koJnZjNC0+djNkLT5wZGV2LT5kZXYpOwpA QCAtOTY4LDkgKzk3NCw5IEBAIHZjNF9nZW1fZGVzdHJveShzdHJ1Y3QgZHJtX2RldmljZSAqZGV2 KQogCS8qIFYzRCBzaG91bGQgYWxyZWFkeSBoYXZlIGRpc2FibGVkIGl0cyBpbnRlcnJ1cHQgYW5k IGNsZWFyZWQKIAkgKiB0aGUgb3ZlcmZsb3cgYWxsb2NhdGlvbiByZWdpc3RlcnMuICBOb3cgZnJl ZSB0aGUgb2JqZWN0LgogCSAqLwotCWlmICh2YzQtPm92ZXJmbG93X21lbSkgewotCQlkcm1fZ2Vt X29iamVjdF91bnJlZmVyZW5jZV91bmxvY2tlZCgmdmM0LT5vdmVyZmxvd19tZW0tPmJhc2UuYmFz ZSk7Ci0JCXZjNC0+b3ZlcmZsb3dfbWVtID0gTlVMTDsKKwlpZiAodmM0LT5iaW5fYm8pIHsKKwkJ ZHJtX2dlbV9vYmplY3RfcHV0X3VubG9ja2VkKCZ2YzQtPmJpbl9iby0+YmFzZS5iYXNlKTsKKwkJ dmM0LT5iaW5fYm8gPSBOVUxMOwogCX0KIAogCWlmICh2YzQtPmhhbmdfc3RhdGUpCmRpZmYgLS1n aXQgYS9kcml2ZXJzL2dwdS9kcm0vdmM0L3ZjNF9pcnEuYyBiL2RyaXZlcnMvZ3B1L2RybS92YzQv dmM0X2lycS5jCmluZGV4IGNkYzZlNjc2MDcwNS4uNDdiYmVjOTYyZjQ1IDEwMDY0NAotLS0gYS9k cml2ZXJzL2dwdS9kcm0vdmM0L3ZjNF9pcnEuYworKysgYi9kcml2ZXJzL2dwdS9kcm0vdmM0L3Zj NF9pcnEuYwpAQCAtNTksNTAgKzU5LDQ1IEBAIHZjNF9vdmVyZmxvd19tZW1fd29yayhzdHJ1Y3Qg d29ya19zdHJ1Y3QgKndvcmspCiB7CiAJc3RydWN0IHZjNF9kZXYgKnZjNCA9CiAJCWNvbnRhaW5l cl9vZih3b3JrLCBzdHJ1Y3QgdmM0X2Rldiwgb3ZlcmZsb3dfbWVtX3dvcmspOwotCXN0cnVjdCBk cm1fZGV2aWNlICpkZXYgPSB2YzQtPmRldjsKLQlzdHJ1Y3QgdmM0X2JvICpibzsKKwlzdHJ1Y3Qg dmM0X2JvICpibyA9IHZjNC0+YmluX2JvOworCWludCBiaW5fYm9fc2xvdDsKKwlzdHJ1Y3QgdmM0 X2V4ZWNfaW5mbyAqZXhlYzsKKwl1bnNpZ25lZCBsb25nIGlycWZsYWdzOwogCi0JYm8gPSB2YzRf Ym9fY3JlYXRlKGRldiwgMjU2ICogMTAyNCwgdHJ1ZSk7Ci0JaWYgKElTX0VSUihibykpIHsKKwli aW5fYm9fc2xvdCA9IHZjNF92M2RfZ2V0X2Jpbl9zbG90KHZjNCk7CisJaWYgKGJpbl9ib19zbG90 IDwgMCkgewogCQlEUk1fRVJST1IoIkNvdWxkbid0IGFsbG9jYXRlIGJpbm5lciBvdmVyZmxvdyBt ZW1cbiIpOwogCQlyZXR1cm47CiAJfQogCi0JLyogSWYgdGhlcmUncyBhIGpvYiBleGVjdXRpbmcg Y3VycmVudGx5LCB0aGVuIG91ciBwcmV2aW91cwotCSAqIG92ZXJmbG93IGFsbG9jYXRpb24gaXMg Z2V0dGluZyB1c2VkIGluIHRoYXQgam9iIGFuZCB3ZSBuZWVkCi0JICogdG8gcXVldWUgaXQgdG8g YmUgcmVsZWFzZWQgd2hlbiB0aGUgam9iIGlzIGRvbmUuICBCdXQgaWYgbm8KLQkgKiBqb2IgaXMg ZXhlY3V0aW5nIGF0IGFsbCwgdGhlbiB3ZSBjYW4gZnJlZSB0aGUgb2xkIG92ZXJmbG93Ci0JICog b2JqZWN0IGRpcmVjY3RseS4KLQkgKgotCSAqIE5vIGxvY2sgbmVjZXNzYXJ5IGZvciB0aGlzIHBv aW50ZXIgc2luY2Ugd2UncmUgdGhlIG9ubHkKLQkgKiBvbmVzIHRoYXQgdXBkYXRlIHRoZSBwb2lu dGVyLCBhbmQgb3VyIHdvcmtxdWV1ZSB3b24ndAotCSAqIHJlZW50ZXIuCi0JICovCi0JaWYgKHZj NC0+b3ZlcmZsb3dfbWVtKSB7Ci0JCXN0cnVjdCB2YzRfZXhlY19pbmZvICpjdXJyZW50X2V4ZWM7 Ci0JCXVuc2lnbmVkIGxvbmcgaXJxZmxhZ3M7Ci0KLQkJc3Bpbl9sb2NrX2lycXNhdmUoJnZjNC0+ am9iX2xvY2ssIGlycWZsYWdzKTsKLQkJY3VycmVudF9leGVjID0gdmM0X2ZpcnN0X2Jpbl9qb2Io dmM0KTsKLQkJaWYgKCFjdXJyZW50X2V4ZWMpCi0JCQljdXJyZW50X2V4ZWMgPSB2YzRfbGFzdF9y ZW5kZXJfam9iKHZjNCk7Ci0JCWlmIChjdXJyZW50X2V4ZWMpIHsKLQkJCXZjNC0+b3ZlcmZsb3df bWVtLT5zZXFubyA9IGN1cnJlbnRfZXhlYy0+c2Vxbm87Ci0JCQlsaXN0X2FkZF90YWlsKCZ2YzQt Pm92ZXJmbG93X21lbS0+dW5yZWZfaGVhZCwKLQkJCQkgICAgICAmY3VycmVudF9leGVjLT51bnJl Zl9saXN0KTsKLQkJCXZjNC0+b3ZlcmZsb3dfbWVtID0gTlVMTDsKKwlzcGluX2xvY2tfaXJxc2F2 ZSgmdmM0LT5qb2JfbG9jaywgaXJxZmxhZ3MpOworCisJaWYgKHZjNC0+YmluX2FsbG9jX292ZXJm bG93KSB7CisJCS8qIElmIHdlIGhhZCBvdmVyZmxvdyBtZW1vcnkgYWxsb2NhdGVkIHByZXZpb3Vz bHksCisJCSAqIHRoZW4gdGhhdCBjaHVuayB3aWxsIGZyZWUgd2hlbiB0aGUgY3VycmVudCBiaW4g am9iCisJCSAqIGlzIGRvbmUuICBJZiB3ZSBkb24ndCBoYXZlIGEgYmluIGpvYiBydW5uaW5nLCB0 aGVuCisJCSAqIHRoZSBjaHVuayB3aWxsIGJlIGRvbmUgd2hlbmV2ZXIgdGhlIGxpc3Qgb2YgcmVu ZGVyCisJCSAqIGpvYnMgaGFzIGRyYWluZWQuCisJCSAqLworCQlleGVjID0gdmM0X2ZpcnN0X2Jp bl9qb2IodmM0KTsKKwkJaWYgKCFleGVjKQorCQkJZXhlYyA9IHZjNF9sYXN0X3JlbmRlcl9qb2Io dmM0KTsKKwkJaWYgKGV4ZWMpIHsKKwkJCWV4ZWMtPmJpbl9zbG90cyB8PSB2YzQtPmJpbl9hbGxv Y19vdmVyZmxvdzsKKwkJfSBlbHNlIHsKKwkJCS8qIFRoZXJlJ3Mgbm90aGluZyBxdWV1ZWQgaW4g dGhlIGhhcmR3YXJlLCBzbworCQkJICogdGhlIG9sZCBzbG90IGlzIGZyZWUgaW1tZWRpYXRlbHku CisJCQkgKi8KKwkJCXZjNC0+YmluX2FsbG9jX3VzZWQgJj0gfnZjNC0+YmluX2FsbG9jX292ZXJm bG93OwogCQl9Ci0JCXNwaW5fdW5sb2NrX2lycXJlc3RvcmUoJnZjNC0+am9iX2xvY2ssIGlycWZs YWdzKTsKIAl9CisJdmM0LT5iaW5fYWxsb2Nfb3ZlcmZsb3cgPSBCSVQoYmluX2JvX3Nsb3QpOwog Ci0JaWYgKHZjNC0+b3ZlcmZsb3dfbWVtKQotCQlkcm1fZ2VtX29iamVjdF91bnJlZmVyZW5jZV91 bmxvY2tlZCgmdmM0LT5vdmVyZmxvd19tZW0tPmJhc2UuYmFzZSk7Ci0JdmM0LT5vdmVyZmxvd19t ZW0gPSBibzsKLQotCVYzRF9XUklURShWM0RfQlBPQSwgYm8tPmJhc2UucGFkZHIpOworCVYzRF9X UklURShWM0RfQlBPQSwgYm8tPmJhc2UucGFkZHIgKyBiaW5fYm9fc2xvdCAqIHZjNC0+YmluX2Fs bG9jX3NpemUpOwogCVYzRF9XUklURShWM0RfQlBPUywgYm8tPmJhc2UuYmFzZS5zaXplKTsKIAlW M0RfV1JJVEUoVjNEX0lOVENUTCwgVjNEX0lOVF9PVVRPTUVNKTsKIAlWM0RfV1JJVEUoVjNEX0lO VEVOQSwgVjNEX0lOVF9PVVRPTUVNKTsKKwlzcGluX3VubG9ja19pcnFyZXN0b3JlKCZ2YzQtPmpv Yl9sb2NrLCBpcnFmbGFncyk7CiB9CiAKIHN0YXRpYyB2b2lkCmRpZmYgLS1naXQgYS9kcml2ZXJz L2dwdS9kcm0vdmM0L3ZjNF9yZW5kZXJfY2wuYyBiL2RyaXZlcnMvZ3B1L2RybS92YzQvdmM0X3Jl bmRlcl9jbC5jCmluZGV4IDQzMzk0NzFmNTE3Zi4uNWRjMTk0MjlkNGFlIDEwMDY0NAotLS0gYS9k cml2ZXJzL2dwdS9kcm0vdmM0L3ZjNF9yZW5kZXJfY2wuYworKysgYi9kcml2ZXJzL2dwdS9kcm0v dmM0L3ZjNF9yZW5kZXJfY2wuYwpAQCAtMTgyLDggKzE4Miw3IEBAIHN0YXRpYyB2b2lkIGVtaXRf dGlsZShzdHJ1Y3QgdmM0X2V4ZWNfaW5mbyAqZXhlYywKIAogCWlmIChoYXNfYmluKSB7CiAJCXJj bF91OChzZXR1cCwgVkM0X1BBQ0tFVF9CUkFOQ0hfVE9fU1VCX0xJU1QpOwotCQlyY2xfdTMyKHNl dHVwLCAoZXhlYy0+dGlsZV9iby0+cGFkZHIgKwotCQkJCWV4ZWMtPnRpbGVfYWxsb2Nfb2Zmc2V0 ICsKKwkJcmNsX3UzMihzZXR1cCwgKGV4ZWMtPnRpbGVfYWxsb2Nfb2Zmc2V0ICsKIAkJCQkoeSAq IGV4ZWMtPmJpbl90aWxlc194ICsgeCkgKiAzMikpOwogCX0KIApkaWZmIC0tZ2l0IGEvZHJpdmVy cy9ncHUvZHJtL3ZjNC92YzRfdjNkLmMgYi9kcml2ZXJzL2dwdS9kcm0vdmM0L3ZjNF92M2QuYwpp bmRleCA3Y2MzNDZhZDliMGIuLmE4ODA3OGQ3YzlkMSAxMDA2NDQKLS0tIGEvZHJpdmVycy9ncHUv ZHJtL3ZjNC92YzRfdjNkLmMKKysrIGIvZHJpdmVycy9ncHUvZHJtL3ZjNC92YzRfdjNkLmMKQEAg LTE1Niw2ICsxNTYsMTQ0IEBAIHN0YXRpYyB2b2lkIHZjNF92M2RfaW5pdF9odyhzdHJ1Y3QgZHJt X2RldmljZSAqZGV2KQogCVYzRF9XUklURShWM0RfVlBNQkFTRSwgMCk7CiB9CiAKK2ludCB2YzRf djNkX2dldF9iaW5fc2xvdChzdHJ1Y3QgdmM0X2RldiAqdmM0KQoreworCXN0cnVjdCBkcm1fZGV2 aWNlICpkZXYgPSB2YzQtPmRldjsKKwl1bnNpZ25lZCBsb25nIGlycWZsYWdzOworCWludCBzbG90 OworCXVpbnQ2NF90IHNlcW5vID0gMDsKKwlzdHJ1Y3QgdmM0X2V4ZWNfaW5mbyAqZXhlYzsKKwor dHJ5X2FnYWluOgorCXNwaW5fbG9ja19pcnFzYXZlKCZ2YzQtPmpvYl9sb2NrLCBpcnFmbGFncyk7 CisJc2xvdCA9IGZmcyh+dmM0LT5iaW5fYWxsb2NfdXNlZCk7CisJaWYgKHNsb3QgIT0gMCkgewor CQkvKiBTd2l0Y2ggZnJvbSBmZnMoKSBiaXQgaW5kZXggdG8gYSAwLWJhc2VkIGluZGV4LiAqLwor CQlzbG90LS07CisJCXZjNC0+YmluX2FsbG9jX3VzZWQgfD0gQklUKHNsb3QpOworCQlzcGluX3Vu bG9ja19pcnFyZXN0b3JlKCZ2YzQtPmpvYl9sb2NrLCBpcnFmbGFncyk7CisJCXJldHVybiBzbG90 OworCX0KKworCS8qIENvdWxkbid0IGZpbmQgYW4gb3BlbiBzbG90LiAgV2FpdCBmb3IgcmVuZGVy IHRvIGNvbXBsZXRlCisJICogYW5kIHRyeSBhZ2Fpbi4KKwkgKi8KKwlleGVjID0gdmM0X2xhc3Rf cmVuZGVyX2pvYih2YzQpOworCWlmIChleGVjKQorCQlzZXFubyA9IGV4ZWMtPnNlcW5vOworCXNw aW5fdW5sb2NrX2lycXJlc3RvcmUoJnZjNC0+am9iX2xvY2ssIGlycWZsYWdzKTsKKworCWlmIChz ZXFubykgeworCQlpbnQgcmV0ID0gdmM0X3dhaXRfZm9yX3NlcW5vKGRldiwgc2Vxbm8sIH4wdWxs LCB0cnVlKTsKKworCQlpZiAocmV0ID09IDApCisJCQlnb3RvIHRyeV9hZ2FpbjsKKworCQlyZXR1 cm4gcmV0OworCX0KKworCXJldHVybiAtRU5PTUVNOworfQorCisvKioKKyAqIHZjNF9hbGxvY2F0 ZV9iaW5fYm8oKSAtIGFsbG9jYXRlcyB0aGUgbWVtb3J5IHRoYXQgd2lsbCBiZSB1c2VkIGZvcgor ICogdGlsZSBiaW5uaW5nLgorICoKKyAqIFRoZSBiaW5uZXIgaGFzIGEgbGltaXRhdGlvbiB0aGF0 IHRoZSBhZGRyZXNzZXMgaW4gdGhlIHRpbGUgc3RhdGUKKyAqIGJ1ZmZlciB0aGF0IHBvaW50IGlu dG8gdGhlIHRpbGUgYWxsb2MgYnVmZmVyIG9yIGJpbm5lciBvdmVyZmxvdworICogbWVtb3J5IG9u bHkgaGF2ZSAyOCBiaXRzICgyNTZNQiksIGFuZCB0aGUgdG9wIDQgb24gdGhlIGJ1cyBmb3IKKyAq IHRpbGUgYWxsb2MgcmVmZXJlbmNlcyBlbmQgdXAgY29taW5nIGZyb20gdGhlIHRpbGUgc3RhdGUg YnVmZmVyJ3MKKyAqIGFkZHJlc3MuCisgKgorICogVG8gd29yayBhcm91bmQgdGhpcywgd2UgYWxs b2NhdGUgYSBzaW5nbGUgbGFyZ2UgYnVmZmVyIHdoaWxlIFYzRCBpcworICogaW4gdXNlLCBtYWtl IHN1cmUgdGhhdCBpdCBoYXMgdGhlIHRvcCA0IGJpdHMgY29uc3RhbnQgYWNyb3NzIGl0cworICog ZW50aXJlIGV4dGVudCwgYW5kIHRoZW4gcHV0IHRoZSB0aWxlIHN0YXRlLCB0aWxlIGFsbG9jLCBh bmQgYmlubmVyCisgKiBvdmVyZmxvdyBtZW1vcnkgaW5zaWRlIHRoYXQgYnVmZmVyLgorICoKKyAq IFRoaXMgY3JlYXRlcyBhIGxpbWl0YXRpb24gd2hlcmUgd2UgbWF5IG5vdCBiZSBhYmxlIHRvIGV4 ZWN1dGUgYSBqb2IKKyAqIGlmIGl0IGRvZXNuJ3QgZml0IHdpdGhpbiB0aGUgYnVmZmVyIHRoYXQg d2UgYWxsb2NhdGVkIHVwIGZyb250LgorICogSG93ZXZlciwgaXQgdHVybnMgb3V0IHRoYXQgMTZN QiBpcyAiZW5vdWdoIGZvciBhbnlib2R5IiwgYW5kCisgKiByZWFsLXdvcmxkIGFwcGxpY2F0aW9u cyBydW4gaW50byBhbGxvY2F0aW9uIGZhaWx1cmVzIGZyb20gdGhlCisgKiBvdmVyYWxsIENNQSBw b29sIGJlZm9yZSB0aGV5IG1ha2Ugc2NlbmVzIGNvbXBsaWNhdGVkIGVub3VnaCB0byBydW4KKyAq IG91dCBvZiBiaW4gc3BhY2UuCisgKi8KK2ludAordmM0X2FsbG9jYXRlX2Jpbl9ibyhzdHJ1Y3Qg ZHJtX2RldmljZSAqZHJtKQoreworCXN0cnVjdCB2YzRfZGV2ICp2YzQgPSB0b192YzRfZGV2KGRy bSk7CisJc3RydWN0IHZjNF92M2QgKnYzZCA9IHZjNC0+djNkOworCXVpbnQzMl90IHNpemUgPSAx NiAqIDEwMjQgKiAxMDI0OworCWludCByZXQgPSAwOworCXN0cnVjdCBsaXN0X2hlYWQgbGlzdDsK KworCS8qIFdlIG1heSBuZWVkIHRvIHRyeSBhbGxvY2F0aW5nIG1vcmUgdGhhbiBvbmNlIHRvIGdl dCBhIEJPCisJICogdGhhdCBkb2Vzbid0IGNyb3NzIDI1Nk1CLiAgVHJhY2sgdGhlIG9uZXMgd2Un dmUgYWxsb2NhdGVkCisJICogdGhhdCBmYWlsZWQgc28gZmFyLCBzbyB0aGF0IHdlIGNhbiBmcmVl IHRoZW0gd2hlbiB3ZSd2ZSBnb3QKKwkgKiBvbmUgdGhhdCBzdWNjZWVkZWQgKGlmIHdlIGZyZWVk IHRoZW0gcmlnaHQgYXdheSwgb3VyIG5leHQKKwkgKiBhbGxvY2F0aW9uIHdvdWxkIHByb2JhYmx5 IGJlIHRoZSBzYW1lIGNodW5rIG9mIG1lbW9yeSkuCisJICovCisJSU5JVF9MSVNUX0hFQUQoJmxp c3QpOworCisJd2hpbGUgKHRydWUpIHsKKwkJc3RydWN0IHZjNF9ibyAqYm8gPSB2YzRfYm9fY3Jl YXRlKGRybSwgc2l6ZSwgdHJ1ZSk7CisKKwkJaWYgKElTX0VSUihibykpIHsKKwkJCXJldCA9IFBU Ul9FUlIoYm8pOworCisJCQlkZXZfZXJyKCZ2M2QtPnBkZXYtPmRldiwKKwkJCQkiRmFpbGVkIHRv IGFsbG9jYXRlIG1lbW9yeSBmb3IgdGlsZSBiaW5uaW5nOiAiCisJCQkJIiVkLiBZb3UgbWF5IG5l ZWQgdG8gZW5hYmxlIENNQSBvciBnaXZlIGl0ICIKKwkJCQkibW9yZSBtZW1vcnkuIiwKKwkJCQly ZXQpOworCQkJYnJlYWs7CisJCX0KKworCQkvKiBDaGVjayBpZiB0aGlzIEJPIHdvbid0IHRyaWdn ZXIgdGhlIGFkZHJlc3NpbmcgYnVnLiAqLworCQlpZiAoKGJvLT5iYXNlLnBhZGRyICYgMHhmMDAw MDAwMCkgPT0KKwkJICAgICgoYm8tPmJhc2UucGFkZHIgKyBiby0+YmFzZS5iYXNlLnNpemUgLSAx KSAmIDB4ZjAwMDAwMDApKSB7CisJCQl2YzQtPmJpbl9ibyA9IGJvOworCisJCQkvKiBTZXQgdXAg Zm9yIGFsbG9jYXRpbmcgNTEyS0IgY2h1bmtzIG9mCisJCQkgKiBiaW5uZXIgbWVtb3J5LiAgVGhl IGJpZ2dlc3QgYWxsb2NhdGlvbiB3ZQorCQkJICogbmVlZCB0byBkbyBpcyBmb3IgdGhlIGluaXRp YWwgdGlsZSBhbGxvYyArCisJCQkgKiB0aWxlIHN0YXRlIGJ1ZmZlci4gIFdlIGNhbiByZW5kZXIg dG8gYQorCQkJICogbWF4aW11bSBvZiAoKDIwNDgqMjA0OCkgLyAoMzIqMzIpID0gNDA5NgorCQkJ ICogdGlsZXMgaW4gYSBmcmFtZSAodW50aWwgd2UgZG8gZmxvYXRpbmcKKwkJCSAqIHBvaW50IHJl bmRlcmluZywgYXQgd2hpY2ggcG9pbnQgaXQgd291bGQgYmUKKwkJCSAqIDgxOTIpLiAgVGlsZSBz dGF0ZSBpcyA0OGIvdGlsZSAocm91bmRlZCB0bworCQkJICogYSBwYWdlKSwgYW5kIHRpbGUgYWxs b2MgaXMgMzJiL3RpbGUKKwkJCSAqIChyb3VuZGVkIHRvIGEgcGFnZSksIHBsdXMgYSBwYWdlIG9m IGV4dHJhLAorCQkJICogZm9yIGEgdG90YWwgb2YgMzIwa2IgZm9yIG91ciB3b3JzdC1jYXNlLgor CQkJICogV2UgY2hvb3NlIDUxMmtiIHNvIHRoYXQgaXQgZGl2aWRlcyBldmVubHkKKwkJCSAqIGlu dG8gb3VyIDE2TUIsIGFuZCB0aGUgcmVzdCBvZiB0aGUgNTEya2IKKwkJCSAqIHdpbGwgYmUgdXNl ZCBhcyBzdG9yYWdlIGZvciB0aGUgb3ZlcmZsb3cKKwkJCSAqIGZyb20gdGhlIGluaXRpYWwgMzJi IENMIHBlciBiaW4uCisJCQkgKi8KKwkJCXZjNC0+YmluX2FsbG9jX3NpemUgPSA1MTIgKiAxMDI0 OworCQkJdmM0LT5iaW5fYWxsb2NfdXNlZCA9IDA7CisJCQl2YzQtPmJpbl9hbGxvY19vdmVyZmxv dyA9IDA7CisJCQlXQVJOX09OX09OQ0Uoc2l6ZW9mKHZjNC0+YmluX2FsbG9jX3VzZWQpICogOCAh PQorCQkJCSAgICAgYm8tPmJhc2UuYmFzZS5zaXplIC8gdmM0LT5iaW5fYWxsb2Nfc2l6ZSk7CisK KwkJCWJyZWFrOworCQl9CisKKwkJLyogUHV0IGl0IG9uIHRoZSBsaXN0IHRvIGZyZWUgbGF0ZXIs IGFuZCB0cnkgYWdhaW4uICovCisJCWxpc3RfYWRkKCZiby0+dW5yZWZfaGVhZCwgJmxpc3QpOwor CX0KKworCS8qIEZyZWUgYWxsIHRoZSBCT3Mgd2UgYWxsb2NhdGVkIGJ1dCBkaWRuJ3QgY2hvb3Nl LiAqLworCXdoaWxlICghbGlzdF9lbXB0eSgmbGlzdCkpIHsKKwkJc3RydWN0IHZjNF9ibyAqYm8g PSBsaXN0X2xhc3RfZW50cnkoJmxpc3QsCisJCQkJCQkgICAgc3RydWN0IHZjNF9ibywgdW5yZWZf aGVhZCk7CisKKwkJbGlzdF9kZWwoJmJvLT51bnJlZl9oZWFkKTsKKwkJZHJtX2dlbV9vYmplY3Rf cHV0X3VubG9ja2VkKCZiby0+YmFzZS5iYXNlKTsKKwl9CisKKwlyZXR1cm4gcmV0OworfQorCiAj aWZkZWYgQ09ORklHX1BNCiBzdGF0aWMgaW50IHZjNF92M2RfcnVudGltZV9zdXNwZW5kKHN0cnVj dCBkZXZpY2UgKmRldikKIHsKQEAgLTE2NCw2ICszMDIsOSBAQCBzdGF0aWMgaW50IHZjNF92M2Rf cnVudGltZV9zdXNwZW5kKHN0cnVjdCBkZXZpY2UgKmRldikKIAogCXZjNF9pcnFfdW5pbnN0YWxs KHZjNC0+ZGV2KTsKIAorCWRybV9nZW1fb2JqZWN0X3B1dF91bmxvY2tlZCgmdmM0LT5iaW5fYm8t PmJhc2UuYmFzZSk7CisJdmM0LT5iaW5fYm8gPSBOVUxMOworCiAJcmV0dXJuIDA7CiB9CiAKQEAg LTE3MSw2ICszMTIsMTEgQEAgc3RhdGljIGludCB2YzRfdjNkX3J1bnRpbWVfcmVzdW1lKHN0cnVj dCBkZXZpY2UgKmRldikKIHsKIAlzdHJ1Y3QgdmM0X3YzZCAqdjNkID0gZGV2X2dldF9kcnZkYXRh KGRldik7CiAJc3RydWN0IHZjNF9kZXYgKnZjNCA9IHYzZC0+dmM0OworCWludCByZXQ7CisKKwly ZXQgPSB2YzRfYWxsb2NhdGVfYmluX2JvKHZjNC0+ZGV2KTsKKwlpZiAocmV0KQorCQlyZXR1cm4g cmV0OwogCiAJdmM0X3YzZF9pbml0X2h3KHZjNC0+ZGV2KTsKIAl2YzRfaXJxX3Bvc3RpbnN0YWxs KHZjNC0+ZGV2KTsKQEAgLTIwOCw2ICszNTQsMTAgQEAgc3RhdGljIGludCB2YzRfdjNkX2JpbmQo c3RydWN0IGRldmljZSAqZGV2LCBzdHJ1Y3QgZGV2aWNlICptYXN0ZXIsIHZvaWQgKmRhdGEpCiAJ CXJldHVybiAtRUlOVkFMOwogCX0KIAorCXJldCA9IHZjNF9hbGxvY2F0ZV9iaW5fYm8oZHJtKTsK KwlpZiAocmV0KQorCQlyZXR1cm4gcmV0OworCiAJLyogUmVzZXQgdGhlIGJpbm5lciBvdmVyZmxv dyBhZGRyZXNzL3NpemUgYXQgc2V0dXAsIHRvIGJlIHN1cmUKIAkgKiB3ZSBkb24ndCByZXVzZSBh biBvbGQgb25lLgogCSAqLwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL3ZjNC92YzRfdmFs aWRhdGUuYyBiL2RyaXZlcnMvZ3B1L2RybS92YzQvdmM0X3ZhbGlkYXRlLmMKaW5kZXggZGE2ZjFl MTM4ZThkLi4zZGU4ZjExNTk1YzAgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS92YzQvdmM0 X3ZhbGlkYXRlLmMKKysrIGIvZHJpdmVycy9ncHUvZHJtL3ZjNC92YzRfdmFsaWRhdGUuYwpAQCAt MzQ4LDEwICszNDgsMTEgQEAgc3RhdGljIGludAogdmFsaWRhdGVfdGlsZV9iaW5uaW5nX2NvbmZp ZyhWQUxJREFURV9BUkdTKQogewogCXN0cnVjdCBkcm1fZGV2aWNlICpkZXYgPSBleGVjLT5leGVj X2JvLT5iYXNlLmRldjsKLQlzdHJ1Y3QgdmM0X2JvICp0aWxlX2JvOworCXN0cnVjdCB2YzRfZGV2 ICp2YzQgPSB0b192YzRfZGV2KGRldik7CiAJdWludDhfdCBmbGFnczsKLQl1aW50MzJfdCB0aWxl X3N0YXRlX3NpemUsIHRpbGVfYWxsb2Nfc2l6ZTsKLQl1aW50MzJfdCB0aWxlX2NvdW50OworCXVp bnQzMl90IHRpbGVfc3RhdGVfc2l6ZTsKKwl1aW50MzJfdCB0aWxlX2NvdW50LCBiaW5fYWRkcjsK KwlpbnQgYmluX3Nsb3Q7CiAKIAlpZiAoZXhlYy0+Zm91bmRfdGlsZV9iaW5uaW5nX21vZGVfY29u ZmlnX3BhY2tldCkgewogCQlEUk1fRVJST1IoIkR1cGxpY2F0ZSBWQzRfUEFDS0VUX1RJTEVfQklO TklOR19NT0RFX0NPTkZJR1xuIik7CkBAIC0zNzcsMTMgKzM3OCwyOCBAQCB2YWxpZGF0ZV90aWxl X2Jpbm5pbmdfY29uZmlnKFZBTElEQVRFX0FSR1MpCiAJCXJldHVybiAtRUlOVkFMOwogCX0KIAor CWJpbl9zbG90ID0gdmM0X3YzZF9nZXRfYmluX3Nsb3QodmM0KTsKKwlpZiAoYmluX3Nsb3QgPCAw KSB7CisJCWlmIChiaW5fc2xvdCAhPSAtRUlOVFIgJiYgYmluX3Nsb3QgIT0gLUVSRVNUQVJUU1lT KSB7CisJCQlEUk1fRVJST1IoIkZhaWxlZCB0byBhbGxvY2F0ZSBiaW5uZXIgbWVtb3J5OiAlZFxu IiwKKwkJCQkgIGJpbl9zbG90KTsKKwkJfQorCQlyZXR1cm4gYmluX3Nsb3Q7CisJfQorCisJLyog VGhlIHNsb3Qgd2UgYWxsb2NhdGVkIHdpbGwgb25seSBiZSB1c2VkIGJ5IHRoaXMgam9iLCBhbmQg aXMKKwkgKiBmcmVlIHdoZW4gdGhlIGpvYiBjb21wbGV0ZXMgcmVuZGVyaW5nLgorCSAqLworCWV4 ZWMtPmJpbl9zbG90cyB8PSBCSVQoYmluX3Nsb3QpOworCWJpbl9hZGRyID0gdmM0LT5iaW5fYm8t PmJhc2UucGFkZHIgKyBiaW5fc2xvdCAqIHZjNC0+YmluX2FsbG9jX3NpemU7CisKIAkvKiBUaGUg dGlsZSBzdGF0ZSBkYXRhIGFycmF5IGlzIDQ4IGJ5dGVzIHBlciB0aWxlLCBhbmQgd2UgcHV0IGl0 IGF0CiAJICogdGhlIHN0YXJ0IG9mIGEgQk8gY29udGFpbmluZyBib3RoIGl0IGFuZCB0aGUgdGls ZSBhbGxvYy4KIAkgKi8KIAl0aWxlX3N0YXRlX3NpemUgPSA0OCAqIHRpbGVfY291bnQ7CiAKIAkv KiBTaW5jZSB0aGUgdGlsZSBhbGxvYyBhcnJheSB3aWxsIGZvbGxvdyB1cywgYWxpZ24uICovCi0J ZXhlYy0+dGlsZV9hbGxvY19vZmZzZXQgPSByb3VuZHVwKHRpbGVfc3RhdGVfc2l6ZSwgNDA5Nik7 CisJZXhlYy0+dGlsZV9hbGxvY19vZmZzZXQgPSBiaW5fYWRkciArIHJvdW5kdXAodGlsZV9zdGF0 ZV9zaXplLCA0MDk2KTsKIAogCSoodWludDhfdCAqKSh2YWxpZGF0ZWQgKyAxNCkgPQogCQkoKGZs YWdzICYgfihWQzRfQklOX0NPTkZJR19BTExPQ19JTklUX0JMT0NLX1NJWkVfTUFTSyB8CkBAIC0z OTQsMzUgKzQxMCwxMyBAQCB2YWxpZGF0ZV90aWxlX2Jpbm5pbmdfY29uZmlnKFZBTElEQVRFX0FS R1MpCiAJCSBWQzRfU0VUX0ZJRUxEKFZDNF9CSU5fQ09ORklHX0FMTE9DX0JMT0NLX1NJWkVfMTI4 LAogCQkJICAgICAgIFZDNF9CSU5fQ09ORklHX0FMTE9DX0JMT0NLX1NJWkUpKTsKIAotCS8qIElu aXRpYWwgYmxvY2sgc2l6ZS4gKi8KLQl0aWxlX2FsbG9jX3NpemUgPSAzMiAqIHRpbGVfY291bnQ7 Ci0KLQkvKgotCSAqIFRoZSBpbml0aWFsIGFsbG9jYXRpb24gZ2V0cyByb3VuZGVkIHRvIHRoZSBu ZXh0IDI1NiBieXRlcyBiZWZvcmUKLQkgKiB0aGUgaGFyZHdhcmUgc3RhcnRzIGZ1bGZpbGxpbmcg ZnVydGhlciBhbGxvY2F0aW9ucy4KLQkgKi8KLQl0aWxlX2FsbG9jX3NpemUgPSByb3VuZHVwKHRp bGVfYWxsb2Nfc2l6ZSwgMjU2KTsKLQotCS8qIEFkZCBzcGFjZSBmb3IgdGhlIGV4dHJhIGFsbG9j YXRpb25zLiAgVGhpcyBpcyB3aGF0IGdldHMgdXNlZCBmaXJzdCwKLQkgKiBiZWZvcmUgb3ZlcmZs b3cgbWVtb3J5LiAgSXQgbXVzdCBoYXZlIGF0IGxlYXN0IDQwOTYgYnl0ZXMsIGJ1dCB3ZQotCSAq IHdhbnQgdG8gYXZvaWQgb3ZlcmZsb3cgbWVtb3J5IHVzYWdlIGlmIHBvc3NpYmxlLgotCSAqLwot CXRpbGVfYWxsb2Nfc2l6ZSArPSAxMDI0ICogMTAyNDsKLQotCXRpbGVfYm8gPSB2YzRfYm9fY3Jl YXRlKGRldiwgZXhlYy0+dGlsZV9hbGxvY19vZmZzZXQgKyB0aWxlX2FsbG9jX3NpemUsCi0JCQkJ dHJ1ZSk7Ci0JZXhlYy0+dGlsZV9ibyA9ICZ0aWxlX2JvLT5iYXNlOwotCWlmIChJU19FUlIoZXhl Yy0+dGlsZV9ibykpCi0JCXJldHVybiBQVFJfRVJSKGV4ZWMtPnRpbGVfYm8pOwotCWxpc3RfYWRk X3RhaWwoJnRpbGVfYm8tPnVucmVmX2hlYWQsICZleGVjLT51bnJlZl9saXN0KTsKLQogCS8qIHRp bGUgYWxsb2MgYWRkcmVzcy4gKi8KLQkqKHVpbnQzMl90ICopKHZhbGlkYXRlZCArIDApID0gKGV4 ZWMtPnRpbGVfYm8tPnBhZGRyICsKLQkJCQkJZXhlYy0+dGlsZV9hbGxvY19vZmZzZXQpOworCSoo dWludDMyX3QgKikodmFsaWRhdGVkICsgMCkgPSBleGVjLT50aWxlX2FsbG9jX29mZnNldDsKIAkv KiB0aWxlIGFsbG9jIHNpemUuICovCi0JKih1aW50MzJfdCAqKSh2YWxpZGF0ZWQgKyA0KSA9IHRp bGVfYWxsb2Nfc2l6ZTsKKwkqKHVpbnQzMl90ICopKHZhbGlkYXRlZCArIDQpID0gKGJpbl9hZGRy ICsgdmM0LT5iaW5fYWxsb2Nfc2l6ZSAtCisJCQkJCWV4ZWMtPnRpbGVfYWxsb2Nfb2Zmc2V0KTsK IAkvKiB0aWxlIHN0YXRlIGFkZHJlc3MuICovCi0JKih1aW50MzJfdCAqKSh2YWxpZGF0ZWQgKyA4 KSA9IGV4ZWMtPnRpbGVfYm8tPnBhZGRyOworCSoodWludDMyX3QgKikodmFsaWRhdGVkICsgOCkg PSBiaW5fYWRkcjsKIAogCXJldHVybiAwOwogfQotLSAKMi4xMS4wCgpfX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpkcmktZGV2ZWwgbWFpbGluZyBsaXN0CmRy aS1kZXZlbEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5v cmcvbWFpbG1hbi9saXN0aW5mby9kcmktZGV2ZWwK