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From: Wu Hao <hao.wu@intel.com>
To: matthew.gerlach@linux.intel.com
Cc: Greg KH <greg@kroah.com>,
	atull@kernel.org, moritz.fischer@ettus.com,
	linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org,
	luwei.kang@intel.com, yi.z.zhang@intel.com,
	Tim Whisonant <tim.whisonant@intel.com>,
	Enno Luebbers <enno.luebbers@intel.com>,
	Shiva Rao <shiva.rao@intel.com>,
	Christopher Rauer <christopher.rauer@intel.com>,
	Xiao Guangrong <guangrong.xiao@linux.intel.com>
Subject: Re: [PATCH 02/16] fpga: add FPGA device framework
Date: Sat, 1 Apr 2017 20:18:04 +0800	[thread overview]
Message-ID: <20170401121804.GE4804@hao-dev> (raw)
In-Reply-To: <alpine.DEB.2.20.1703311154230.2072@mgerlach-VirtualBox>

On Fri, Mar 31, 2017 at 12:01:13PM -0700, matthew.gerlach@linux.intel.com wrote:
> On Fri, 31 Mar 2017, Wu Hao wrote:
> >On Fri, Mar 31, 2017 at 08:09:09AM +0200, Greg KH wrote:
> >>On Thu, Mar 30, 2017 at 08:08:02PM +0800, Wu Hao wrote:
> >>>During FPGA device (e.g PCI-based) discovery, platform devices are
> >>>registered for different FPGA function units. But the device node path
> >>>isn't quite friendly to applications.
> >>>
> >>>Consider this case, applications want to access child device's sysfs file
> >>>for some information.
> >>>
> >>>1) Access using bus-based path (e.g PCI)
> >>>
> >>>  /sys/bus/pci/devices/xxxxx/fpga_func_a.0/sysfs_file
> >>>
> >>>  From the path, it's clear which PCI device is the parent, but not perfect
> >>>  solution for applications. PCI device BDF is not fixed, application may
> >>>  need to search all PCI device to find the actual FPGA Device.
> >>>
> >>>2) Or access using platform device path
> >>>
> >>>  /sys/bus/platform/devices/fpga_func_a.0/sysfs_file
> >>>
> >>>  Applications find the actual function by name easily, but no information
> >>>  about which fpga device it belongs to. It's quite confusing if multiple
> >>>  FPGA devices are in one system.
> >>>
> >>>'FPGA Device' class is introduced to resolve this problem. Each node under
> >>>this class represents a fpga device, which may have one or more child
> >>>devices. Applications only need to search under this FPGA Device class
> >>>folder to find the child device node it needs.
> >>>
> >>>For example, for the platform has 2 fpga devices, each fpga device has
> >>>3 child devices, the hierarchy looks like this.
> >>>
> >>>Two nodes are under /sys/class/fpga/:
> >>>/sys/class/fpga/fpga.0
> >>>/sys/class/fpga/fpga.1
> >>>
> >>>Each node has 1 function A device and 2 function B devices:
> >>>/sys/class/fpga/fpga.0/func_a.0
> >>>/sys/class/fpga/fpga.0/func_b.0
> >>>/sys/class/fpga/fpga.0/func_b.1
> >>>
> >>>/sys/class/fpga/fpga.1/func_a.1
> >>>/sys/class/fpga/fpga.1/func_b.2
> >>>/sys/class/fpga/fpga.1/func_b.3
> >>>
> >>>This following APIs are provided by FPGA device framework:
> >>>* fpga_dev_create
> >>>  Create fpga device under the given parent device.
> >>>* fpga_dev_destroy
> >>>  Destroy fpga device
> >>>
> >>>The following sysfs files are created:
> >>>* /sys/class/fpga/<fpga.x>/name
> >>>  Name of the fpga device.
> >>
> >>How does this interact with the existing "fpga class" that is in the
> >>kernel already?
> >
> >The fpga-dev introduced by this patch, is only a container device, and
> 
> I completely understand the need for a container device.  The fpga-region is
> also primarily a container, and in some cases the fpga-region may represent
> the entire fpga.  Over time this code may become redundant.

Thanks a lot for your review and comments.

I feel that the fpga-region implies that it supports reconfiguration, but
in our cases, the Intel FPGA device, doesn't have base fpga-region for
full reconfiguration, but many accelerators with partial reconfiguration
support. A fpga-region brings together everything needed for the
reconfiguration, and a fpga-dev is trying to brings everything on a FPGA
device together, including fpga-region/bridge/manager, access different
accelerators and other function units.

I think it's not mandatory to use fpga-dev, as fpga-dev is just trying to
provide one more option here for some complex hardware.

Thanks
Hao
 
> >drivers could register different functions under it. Per my understanding,
> >the existing "fpga class", including fpga-region, fpga-bridge and
> >fpga-manager, is used to provide reconfiguration function for FPGA. So
> >driver can create child node using this existing "fpga class" to provide
> >FPGA reconfiguration function, and more nodes under this container for
> >different functions for given FPGA device.
> >
> >For Intel FPGA device, partial reconfiguration is only one function of
> >Intel FPGA Management Engine (FME). FME driver creates fpga_manager under
> >below path for partial reconfiguration, and other interfaces for more
> >functions, e.g power management, virtualization support and etc.
> >
> >/sys/class/fpga/<fpga.x>/<intel-fpga-fme.x>/fpga_manager
> >
> >Thanks
> >Hao
> >
> >>
> >>thanks,
> >>
> >>greg k-h
> >--
> >To unsubscribe from this list: send the line "unsubscribe linux-fpga" in
> >the body of a message to majordomo@vger.kernel.org
> >More majordomo info at  http://vger.kernel.org/majordomo-info.html
> >

  reply	other threads:[~2017-04-01 12:22 UTC|newest]

Thread overview: 94+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-30 12:08 [PATCH 00/16] Intel FPGA Device Drivers Wu Hao
2017-03-30 12:08 ` [PATCH 01/16] docs: fpga: add a document for Intel FPGA driver overview Wu Hao
2017-03-31 18:24   ` matthew.gerlach
2017-03-31 18:38     ` Alan Tull
2017-04-01 11:16       ` Wu Hao
2017-04-02 14:41         ` Moritz Fischer
2017-04-03 20:44           ` Alan Tull
2017-04-04  5:24             ` Wu Hao
2017-04-04  5:06           ` Wu Hao
2017-04-11 18:02           ` Alan Tull
2017-04-12  3:22             ` Wu, Hao
2017-03-30 12:08 ` [PATCH 02/16] fpga: add FPGA device framework Wu Hao
2017-03-31  6:09   ` Greg KH
2017-03-31  7:48     ` Wu Hao
2017-03-31  9:03       ` Greg KH
2017-03-31 12:19         ` Wu Hao
2017-03-31 19:01       ` matthew.gerlach
2017-04-01 12:18         ` Wu Hao [this message]
2017-07-25 21:32           ` Alan Tull
2017-07-26  9:50             ` Wu Hao
2017-07-26 14:20               ` Alan Tull
2017-07-26 22:29                 ` Alan Tull
2017-07-27  4:54                   ` Wu Hao
2017-03-31  6:13   ` Greg KH
     [not found]     ` <82D7661F83C1A047AF7DC287873BF1E167C90F1B@SHSMSX101.ccr.corp.intel.com>
2017-03-31 13:31       ` Wu Hao
2017-03-31 14:10         ` Greg KH
2017-04-01 11:36           ` Wu Hao
2017-03-30 12:08 ` [PATCH 03/16] fpga: intel: add FPGA PCIe device driver Wu Hao
2017-04-04  2:10   ` Moritz Fischer
2017-04-05 13:14     ` Wu, Hao
2017-04-05 13:14       ` Wu, Hao
2017-03-30 12:08 ` [PATCH 04/16] fpga: intel: pcie: parse feature list and create platform device for features Wu Hao
2017-04-03 21:44   ` Alan Tull
2017-04-05 11:58     ` Wu Hao
2017-04-11 20:21       ` Alan Tull
2017-04-13  4:12         ` Wu, Hao
2017-04-04  2:44   ` Moritz Fischer
2017-04-05 12:57     ` Wu Hao
2017-04-04 22:09   ` Alan Tull
2017-04-05 14:09     ` Wu Hao
2017-05-04 15:13   ` Li, Yi
2017-05-05  3:03     ` Wu Hao
2017-03-30 12:08 ` [PATCH 05/16] fpga: intel: pcie: add chardev support for feature devices Wu Hao
2017-03-30 12:08 ` [PATCH 06/16] fpga: intel: pcie: adds fpga_for_each_port callback for fme device Wu Hao
2017-03-30 12:08 ` [PATCH 07/16] fpga: intel: add feature device infrastructure Wu Hao
2017-03-30 12:08 ` [PATCH 08/16] fpga: intel: add FPGA Management Engine driver basic framework Wu Hao
2017-03-30 12:08 ` [PATCH 09/16] fpga: intel: fme: add header sub feature support Wu Hao
2017-03-30 12:08 ` [PATCH 10/16] fpga: intel: fme: add FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2017-03-30 12:08 ` [PATCH 11/16] fpga: intel: fme: add partial reconfiguration sub feature support Wu Hao
2017-03-30 20:30   ` Alan Tull
2017-03-31  4:11     ` Xiao Guangrong
2017-03-31  8:50       ` Wu Hao
2017-04-03 20:26         ` Alan Tull
2017-04-04  5:25           ` Wu Hao
2017-03-31 19:10   ` Alan Tull
2017-04-01 11:08     ` Wu Hao
2017-04-03 16:30       ` Alan Tull
2017-04-04  6:05         ` Wu Hao
2017-04-04 22:37           ` Alan Tull
2017-04-05 11:40             ` Wu, Hao
2017-04-05 15:26               ` Alan Tull
2017-04-05 15:39                 ` Alan Tull
2017-04-06 10:57                   ` Wu Hao
2017-04-06 19:27                     ` Alan Tull
2017-04-07  5:56                       ` Wu Hao
2017-03-31 23:45   ` kbuild test robot
2017-04-01  1:12   ` kbuild test robot
2017-04-03 21:24   ` Alan Tull
2017-04-03 22:49     ` matthew.gerlach
2017-04-04  6:48       ` Wu Hao
2017-04-04  6:28     ` Wu Hao
2017-03-30 12:08 ` [PATCH 12/16] fpga: intel: add FPGA Accelerated Function Unit driver basic framework Wu Hao
2017-03-30 12:08 ` [PATCH 13/16] fpga: intel: afu: add header sub feature support Wu Hao
2017-03-30 12:08 ` [PATCH 14/16] fpga: intel: afu add FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2017-03-30 12:08 ` [PATCH 15/16] fpga: intel: afu: add user afu sub feature support Wu Hao
2017-03-30 12:08 ` [PATCH 16/16] fpga: intel: afu: add FPGA_PORT_DMA_MAP/UNMAP ioctls support Wu Hao
2017-04-01  0:00   ` kbuild test robot
2017-04-01  1:33   ` kbuild test robot
2017-03-30 17:17 ` [PATCH 00/16] Intel FPGA Device Drivers Moritz Fischer
2017-04-06 20:27 ` Jerome Glisse
2017-04-11 19:38   ` Luebbers, Enno
2017-04-12 13:29     ` Jerome Glisse
2017-04-12 14:46       ` Moritz Fischer
2017-04-12 15:37         ` Jerome Glisse
2017-04-14 19:48           ` Luebbers, Enno
2017-04-14 20:49             ` Jerome Glisse
2017-04-17 15:35               ` Alan Tull
2017-04-17 15:57                 ` Jerome Glisse
2017-04-17 16:22                   ` Alan Tull
2017-04-17 17:15                     ` Jerome Glisse
2017-04-18 13:36                   ` Alan Cox
2017-04-18 14:59                     ` Jerome Glisse
2017-04-25 20:02                       ` One Thousand Gnomes
2017-05-01 16:41                         ` Jerome Glisse

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