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From: Harry Wentland <harry.wentland-5C7GfCeVMHo@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Andrey Grodzovsky <Andrey.Grodzovsky-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH 16/16] drm/amd/display: Fix s3 hang on resume.
Date: Mon, 3 Apr 2017 19:07:30 -0400	[thread overview]
Message-ID: <20170403230730.9884-17-harry.wentland@amd.com> (raw)
In-Reply-To: <20170403230730.9884-1-harry.wentland-5C7GfCeVMHo@public.gmane.org>

From: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>

Avoid enabling CRTC_VERTICAL_INTERRUPT0 twice on resume.
It's enabled once from within manage_dm_interrupts in mode set
and another explicitly from amdgpu_dm_irq_resume_late.
Seems it lead to CRTC hang.

Change-Id: I7d7f29adb0f204fd6b1b2a9b36111cd2cf5bf820
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c     |  2 +-
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c | 16 +++++++++++-----
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.h |  2 +-
 3 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index b3a9a9058c4a..62be159b1ea5 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -581,7 +581,7 @@ int amdgpu_dm_display_resume(struct amdgpu_device *adev )
 
 	ret = drm_atomic_helper_resume(ddev, adev->dm.cached_state);
 
-	amdgpu_dm_irq_resume(adev);
+	amdgpu_dm_irq_resume_late(adev);
 
 	return ret;
 }
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
index 682e9c3ad8e5..4aee146a848f 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
@@ -504,8 +504,11 @@ int amdgpu_dm_irq_suspend(
 
 	DRM_DEBUG_KMS("DM_IRQ: suspend\n");
 
-	/* disable HW interrupt */
-	for (src = DC_IRQ_SOURCE_HPD1; src < DAL_IRQ_SOURCES_NUMBER; src++) {
+	/**
+	 * Disable HW interrupt  for HPD and HPDRX only since FLIP and VBLANK
+	 * will be disabled from manage_dm_interrupts on disable CRTC.
+	 */
+	for (src = DC_IRQ_SOURCE_HPD1; src < DC_IRQ_SOURCE_HPD6RX; src++) {
 		hnd_list_l = &adev->dm.irq_handler_list_low_tab[src].head;
 		hnd_list_h = &adev->dm.irq_handler_list_high_tab[src];
 		if (!list_empty(hnd_list_l) || !list_empty(hnd_list_h))
@@ -544,7 +547,7 @@ int amdgpu_dm_irq_resume_early(struct amdgpu_device *adev)
 	return 0;
 }
 
-int amdgpu_dm_irq_resume(struct amdgpu_device *adev)
+int amdgpu_dm_irq_resume_late(struct amdgpu_device *adev)
 {
 	int src;
 	struct list_head *hnd_list_h, *hnd_list_l;
@@ -554,8 +557,11 @@ int amdgpu_dm_irq_resume(struct amdgpu_device *adev)
 
 	DRM_DEBUG_KMS("DM_IRQ: resume\n");
 
-	/* re-enable HW interrupt */
-	for (src = DC_IRQ_SOURCE_HPD1; src < DAL_IRQ_SOURCES_NUMBER; src++) {
+	/**
+	 * Renable HW interrupt  for HPD and only since FLIP and VBLANK
+	 * will be enabled from manage_dm_interrupts on enable CRTC.
+	 */
+	for (src = DC_IRQ_SOURCE_HPD1; src < DC_IRQ_SOURCE_HPD6; src++) {
 		hnd_list_l = &adev->dm.irq_handler_list_low_tab[src].head;
 		hnd_list_h = &adev->dm.irq_handler_list_high_tab[src];
 		if (!list_empty(hnd_list_l) || !list_empty(hnd_list_h))
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.h
index 9339861c8897..9d3007634266 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.h
@@ -117,6 +117,6 @@ int amdgpu_dm_irq_suspend(struct amdgpu_device *adev);
  *
  */
 int amdgpu_dm_irq_resume_early(struct amdgpu_device *adev);
-int amdgpu_dm_irq_resume(struct amdgpu_device *adev);
+int amdgpu_dm_irq_resume_late(struct amdgpu_device *adev);
 
 #endif /* __AMDGPU_DM_IRQ_H__ */
-- 
2.11.0

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      parent reply	other threads:[~2017-04-03 23:07 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-03 23:07 [PATCH 00/16] DC Patches Apr 3, 2017 Harry Wentland
     [not found] ` <20170403230730.9884-1-harry.wentland-5C7GfCeVMHo@public.gmane.org>
2017-04-03 23:07   ` [PATCH 01/16] drm/amd/display: decouple per-crtc-plane model Harry Wentland
2017-04-03 23:07   ` [PATCH 02/16] drm/amd/display: Fix cleanup in amdgpu_dm_initialize_drm_device Harry Wentland
2017-04-03 23:07   ` [PATCH 03/16] drm/amd/display: update plane functionalities Harry Wentland
2017-04-03 23:07   ` [PATCH 04/16] drm/amd/display: remove surface validation against stream rect Harry Wentland
2017-04-03 23:07   ` [PATCH 05/16] drm/amd/display: refactor member referencing to improve readability Harry Wentland
2017-04-03 23:07   ` [PATCH 06/16] drm/amd/display: Temporary disable PSR for HBR2 & HBR3 Harry Wentland
2017-04-03 23:07   ` [PATCH 07/16] drm/amd/display: fix dce_calc surface pitch setting for non underlay pipes Harry Wentland
2017-04-03 23:07   ` [PATCH 08/16] drm/amd/display: Remove get_connector_for_link Harry Wentland
2017-04-03 23:07   ` [PATCH 09/16] drm/amd/display: Remove get_connector_for_sink Harry Wentland
2017-04-03 23:07   ` [PATCH 10/16] drm/amd/display: Fix i2c write flag Harry Wentland
2017-04-03 23:07   ` [PATCH 11/16] drm/amd/display: Refactor edid read Harry Wentland
2017-04-03 23:07   ` [PATCH 12/16] drm/amd/display: PSR Aux Channel and Static Screen Support Fix Harry Wentland
2017-04-03 23:07   ` [PATCH 13/16] drm/amd/display: Fill in vrefresh and min_vblank_time for dce8/dce10 Harry Wentland
2017-04-03 23:07   ` [PATCH 14/16] drm/amd/display: Ignore visible flag when check surface update type Harry Wentland
2017-04-03 23:07   ` [PATCH 15/16] drm/amd/display: Log clock source in error condition Harry Wentland
2017-04-03 23:07   ` Harry Wentland [this message]

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