From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from omzsmtpe02.verizonbusiness.com ([199.249.25.209]:6898 "EHLO omzsmtpe02.verizonbusiness.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932253AbdDDTeH (ORCPT ); Tue, 4 Apr 2017 15:34:07 -0400 From: alexander.levin@verizon.com To: "gregkh@linuxfoundation.org" CC: "stable@vger.kernel.org" Subject: [PATCH for 4.9 89/98] watchdog: s3c2410: Fix infinite interrupt in soft mode Date: Tue, 4 Apr 2017 19:32:35 +0000 Message-ID: <20170404193158.19041-90-alexander.levin@verizon.com> References: <20170404193158.19041-1-alexander.levin@verizon.com> In-Reply-To: <20170404193158.19041-1-alexander.levin@verizon.com> Content-Language: en-US Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org List-ID: From: Krzysztof Kozlowski [ Upstream commit 0b445549ea6f91ffea78a976fe89b932db6e077a ] In soft (no-reboot) mode, the driver self-pings watchdog upon expiration of an interrupt. However the interrupt itself was not cleared thus on first hit, the system enters infinite interrupt handling loop. On Odroid U3 (Exynos4412), when booted with s3c2410_wdt.soft_noboot=3D1 argument the console is flooded: # killall -9 watchdog [ 60.523760] s3c2410-wdt 10060000.watchdog: watchdog timer expired (irq) [ 60.536744] s3c2410-wdt 10060000.watchdog: watchdog timer expired (irq) Fix this by writing something to the WTCLRINT register to clear the interrupt. The register WTCLRINT however appeared in S3C6410 so a new watchdog quirk and flavor are needed. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Guenter Roeck Signed-off-by: Guenter Roeck Signed-off-by: Sasha Levin --- .../devicetree/bindings/watchdog/samsung-wdt.txt | 9 +++++---- drivers/watchdog/s3c2410_wdt.c | 21 +++++++++++++++++= +--- 2 files changed, 23 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt b/D= ocumentation/devicetree/bindings/watchdog/samsung-wdt.txt index 8f3d96a..1f6e101 100644 --- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt +++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt @@ -6,10 +6,11 @@ occurred. =20 Required properties: - compatible : should be one among the following - (a) "samsung,s3c2410-wdt" for Exynos4 and previous SoCs - (b) "samsung,exynos5250-wdt" for Exynos5250 - (c) "samsung,exynos5420-wdt" for Exynos5420 - (c) "samsung,exynos7-wdt" for Exynos7 + - "samsung,s3c2410-wdt" for S3C2410 + - "samsung,s3c6410-wdt" for S3C6410, S5PV210 and Exynos4 + - "samsung,exynos5250-wdt" for Exynos5250 + - "samsung,exynos5420-wdt" for Exynos5420 + - "samsung,exynos7-wdt" for Exynos7 =20 - reg : base physical address of the controller and length of memory mappe= d region. diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.= c index 59e9576..c5a567a 100644 --- a/drivers/watchdog/s3c2410_wdt.c +++ b/drivers/watchdog/s3c2410_wdt.c @@ -46,6 +46,7 @@ #define S3C2410_WTCON 0x00 #define S3C2410_WTDAT 0x04 #define S3C2410_WTCNT 0x08 +#define S3C2410_WTCLRINT 0x0c =20 #define S3C2410_WTCNT_MAXCNT 0xffff =20 @@ -72,6 +73,7 @@ #define EXYNOS5_WDT_MASK_RESET_REG_OFFSET 0x040c #define QUIRK_HAS_PMU_CONFIG (1 << 0) #define QUIRK_HAS_RST_STAT (1 << 1) +#define QUIRK_HAS_WTCLRINT_REG (1 << 2) =20 /* These quirks require that we have a PMU register map */ #define QUIRKS_HAVE_PMUREG (QUIRK_HAS_PMU_CONFIG | \ @@ -143,13 +145,18 @@ static const struct s3c2410_wdt_variant drv_data_s3c2= 410 =3D { }; =20 #ifdef CONFIG_OF +static const struct s3c2410_wdt_variant drv_data_s3c6410 =3D { + .quirks =3D QUIRK_HAS_WTCLRINT_REG, +}; + static const struct s3c2410_wdt_variant drv_data_exynos5250 =3D { .disable_reg =3D EXYNOS5_WDT_DISABLE_REG_OFFSET, .mask_reset_reg =3D EXYNOS5_WDT_MASK_RESET_REG_OFFSET, .mask_bit =3D 20, .rst_stat_reg =3D EXYNOS5_RST_STAT_REG_OFFSET, .rst_stat_bit =3D 20, - .quirks =3D QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT, + .quirks =3D QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT \ + | QUIRK_HAS_WTCLRINT_REG, }; =20 static const struct s3c2410_wdt_variant drv_data_exynos5420 =3D { @@ -158,7 +165,8 @@ static const struct s3c2410_wdt_variant drv_data_exynos= 5420 =3D { .mask_bit =3D 0, .rst_stat_reg =3D EXYNOS5_RST_STAT_REG_OFFSET, .rst_stat_bit =3D 9, - .quirks =3D QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT, + .quirks =3D QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT \ + | QUIRK_HAS_WTCLRINT_REG, }; =20 static const struct s3c2410_wdt_variant drv_data_exynos7 =3D { @@ -167,12 +175,15 @@ static const struct s3c2410_wdt_variant drv_data_exyn= os7 =3D { .mask_bit =3D 23, .rst_stat_reg =3D EXYNOS5_RST_STAT_REG_OFFSET, .rst_stat_bit =3D 23, /* A57 WDTRESET */ - .quirks =3D QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT, + .quirks =3D QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT \ + | QUIRK_HAS_WTCLRINT_REG, }; =20 static const struct of_device_id s3c2410_wdt_match[] =3D { { .compatible =3D "samsung,s3c2410-wdt", .data =3D &drv_data_s3c2410 }, + { .compatible =3D "samsung,s3c6410-wdt", + .data =3D &drv_data_s3c6410 }, { .compatible =3D "samsung,exynos5250-wdt", .data =3D &drv_data_exynos5250 }, { .compatible =3D "samsung,exynos5420-wdt", @@ -418,6 +429,10 @@ static irqreturn_t s3c2410wdt_irq(int irqno, void *par= am) dev_info(wdt->dev, "watchdog timer expired (irq)\n"); =20 s3c2410wdt_keepalive(&wdt->wdt_device); + + if (wdt->drv_data->quirks & QUIRK_HAS_WTCLRINT_REG) + writel(0x1, wdt->reg_base + S3C2410_WTCLRINT); + return IRQ_HANDLED; } =20 --=20 2.9.3