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From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 03/18] drm/i915: pass page_size to insert_entries
Date: Tue,  4 Apr 2017 23:11:13 +0100	[thread overview]
Message-ID: <20170404221128.3943-4-matthew.auld@intel.com> (raw)
In-Reply-To: <20170404221128.3943-1-matthew.auld@intel.com>

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c           | 33 ++++++++++++++++++++++-----
 drivers/gpu/drm/i915/i915_gem_gtt.h           |  1 +
 drivers/gpu/drm/i915/i915_vma.c               |  1 +
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c |  3 ++-
 drivers/gpu/drm/i915/selftests/mock_gtt.c     |  1 +
 5 files changed, 32 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 8bab4aea63e6..0c8350f709da 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -205,7 +205,7 @@ static int ppgtt_bind_vma(struct i915_vma *vma,
 		pte_flags |= PTE_READ_ONLY;
 
 	vma->vm->insert_entries(vma->vm, vma->pages, vma->node.start,
-				cache_level, pte_flags);
+				vma->obj->gtt_page_size, cache_level, pte_flags);
 
 	return 0;
 }
@@ -906,6 +906,7 @@ gen8_ppgtt_insert_pte_entries(struct i915_hw_ppgtt *ppgtt,
 static void gen8_ppgtt_insert_3lvl(struct i915_address_space *vm,
 				   struct sg_table *pages,
 				   u64 start,
+				   unsigned int page_size,
 				   enum i915_cache_level cache_level,
 				   u32 unused)
 {
@@ -924,6 +925,7 @@ static void gen8_ppgtt_insert_3lvl(struct i915_address_space *vm,
 static void gen8_ppgtt_insert_4lvl(struct i915_address_space *vm,
 				   struct sg_table *pages,
 				   u64 start,
+				   unsigned int page_size,
 				   enum i915_cache_level cache_level,
 				   u32 unused)
 {
@@ -935,9 +937,24 @@ static void gen8_ppgtt_insert_4lvl(struct i915_address_space *vm,
 	};
 	struct i915_page_directory_pointer **pdps = ppgtt->pml4.pdps;
 	struct gen8_insert_pte idx = gen8_insert_pte(start);
+	bool (*insert_entries)(struct i915_hw_ppgtt *ppgtt,
+			       struct i915_page_directory_pointer *pdp,
+			       struct sgt_dma *iter,
+			       struct gen8_insert_pte *idx,
+			       enum i915_cache_level cache_level);
+
+	/* TODO: turn this into vfunc */
+	switch (page_size) {
+	case I915_GTT_PAGE_SIZE_4K:
+		insert_entries = gen8_ppgtt_insert_pte_entries;
+		break;
+	default:
+		MISSING_CASE(page_size);
+		return;
+	}
 
-	while (gen8_ppgtt_insert_pte_entries(ppgtt, pdps[idx.pml4e++], &iter,
-					     &idx, cache_level))
+	while (insert_entries(ppgtt, pdps[idx.pml4e++], &iter, &idx,
+			      cache_level))
 		GEM_BUG_ON(idx.pml4e >= GEN8_PML4ES_PER_PML4);
 }
 
@@ -1620,6 +1637,7 @@ static void gen6_ppgtt_clear_range(struct i915_address_space *vm,
 static void gen6_ppgtt_insert_entries(struct i915_address_space *vm,
 				      struct sg_table *pages,
 				      u64 start,
+				      unsigned int page_size,
 				      enum i915_cache_level cache_level,
 				      u32 flags)
 {
@@ -2093,6 +2111,7 @@ static void gen8_ggtt_insert_page(struct i915_address_space *vm,
 static void gen8_ggtt_insert_entries(struct i915_address_space *vm,
 				     struct sg_table *st,
 				     u64 start,
+				     unsigned int page_size,
 				     enum i915_cache_level level,
 				     u32 unused)
 {
@@ -2140,6 +2159,7 @@ static void gen6_ggtt_insert_page(struct i915_address_space *vm,
 static void gen6_ggtt_insert_entries(struct i915_address_space *vm,
 				     struct sg_table *st,
 				     u64 start,
+				     unsigned int page_size,
 				     enum i915_cache_level level,
 				     u32 flags)
 {
@@ -2224,6 +2244,7 @@ static void i915_ggtt_insert_page(struct i915_address_space *vm,
 static void i915_ggtt_insert_entries(struct i915_address_space *vm,
 				     struct sg_table *pages,
 				     u64 start,
+				     unsigned int page_size,
 				     enum i915_cache_level cache_level,
 				     u32 unused)
 {
@@ -2260,7 +2281,7 @@ static int ggtt_bind_vma(struct i915_vma *vma,
 
 	intel_runtime_pm_get(i915);
 	vma->vm->insert_entries(vma->vm, vma->pages, vma->node.start,
-				cache_level, pte_flags);
+				I915_GTT_PAGE_SIZE, cache_level, pte_flags);
 	intel_runtime_pm_put(i915);
 
 	/*
@@ -2314,14 +2335,14 @@ static int aliasing_gtt_bind_vma(struct i915_vma *vma,
 
 		appgtt->base.insert_entries(&appgtt->base,
 					    vma->pages, vma->node.start,
-					    cache_level, pte_flags);
+					    I915_GTT_PAGE_SIZE, cache_level, pte_flags);
 	}
 
 	if (flags & I915_VMA_GLOBAL_BIND) {
 		intel_runtime_pm_get(i915);
 		vma->vm->insert_entries(vma->vm,
 					vma->pages, vma->node.start,
-					cache_level, pte_flags);
+					I915_GTT_PAGE_SIZE, cache_level, pte_flags);
 		intel_runtime_pm_put(i915);
 	}
 
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 27b2b9e681db..232f7ef4c21b 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -329,6 +329,7 @@ struct i915_address_space {
 	void (*insert_entries)(struct i915_address_space *vm,
 			       struct sg_table *st,
 			       u64 start,
+			       unsigned int page_size,
 			       enum i915_cache_level cache_level,
 			       u32 flags);
 	void (*cleanup)(struct i915_address_space *vm);
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 1aba47024656..0cf9c0a98c19 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -544,6 +544,7 @@ int __i915_vma_do_pin(struct i915_vma *vma,
 	lockdep_assert_held(&vma->vm->i915->drm.struct_mutex);
 	GEM_BUG_ON((flags & (PIN_GLOBAL | PIN_USER)) == 0);
 	GEM_BUG_ON((flags & PIN_GLOBAL) && !i915_vma_is_ggtt(vma));
+	GEM_BUG_ON(!is_valid_gtt_page_size(vma->obj->gtt_page_size));
 
 	if (WARN_ON(bound & I915_VMA_PIN_OVERFLOW)) {
 		ret = -EBUSY;
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
index 50710e3f1caa..259b5e139df1 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
@@ -256,7 +256,8 @@ static int lowlevel_hole(struct drm_i915_private *i915,
 				break;
 
 			vm->insert_entries(vm, obj->mm.pages, addr,
-					   I915_CACHE_NONE, 0);
+					   I915_GTT_PAGE_SIZE, I915_CACHE_NONE,
+					   0);
 		}
 		count = n;
 
diff --git a/drivers/gpu/drm/i915/selftests/mock_gtt.c b/drivers/gpu/drm/i915/selftests/mock_gtt.c
index a61309c7cb3e..38532a008387 100644
--- a/drivers/gpu/drm/i915/selftests/mock_gtt.c
+++ b/drivers/gpu/drm/i915/selftests/mock_gtt.c
@@ -35,6 +35,7 @@ static void mock_insert_page(struct i915_address_space *vm,
 static void mock_insert_entries(struct i915_address_space *vm,
 				struct sg_table *st,
 				u64 start,
+				unsigned int page_size,
 				enum i915_cache_level level, u32 flags)
 {
 }
-- 
2.9.3

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  parent reply	other threads:[~2017-04-04 22:11 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-04 22:11 [RFC PATCH 00/18] drm/i915: initial support for huge gtt pages V2 Matthew Auld
2017-04-04 22:11 ` [PATCH 01/18] drm/i915: add page_size_mask to dev_info Matthew Auld
2017-04-05  6:19   ` Joonas Lahtinen
2017-04-05  8:45     ` Chris Wilson
2017-04-05 12:57       ` Joonas Lahtinen
2017-04-05  8:43   ` Chris Wilson
2017-04-04 22:11 ` [PATCH 02/18] drm/i915: introduce drm_i915_gem_object page_size members Matthew Auld
2017-04-05  6:26   ` Joonas Lahtinen
2017-04-05  6:49   ` Daniel Vetter
2017-04-05  8:48     ` Chris Wilson
2017-04-05 10:07       ` Matthew Auld
2017-04-05 12:15         ` Daniel Vetter
2017-04-05 12:32         ` Chris Wilson
2017-04-05 12:39           ` Chris Wilson
2017-04-04 22:11 ` Matthew Auld [this message]
2017-04-04 22:11 ` [PATCH 04/18] drm/i915: s/i915_gtt_color_adjust/i915_ggtt_color_adjust Matthew Auld
2017-04-05  6:30   ` Joonas Lahtinen
2017-04-04 22:11 ` [PATCH 05/18] drm/i915: clean up cache coloring Matthew Auld
2017-04-05  6:35   ` Joonas Lahtinen
2017-04-04 22:11 ` [PATCH 06/18] drm/i915: export color_differs Matthew Auld
2017-04-05  6:39   ` Joonas Lahtinen
2017-04-04 22:11 ` [PATCH 07/18] drm/i915: introduce ppgtt page coloring Matthew Auld
2017-04-05 13:41   ` Chris Wilson
2017-04-05 13:50     ` Matthew Auld
2017-04-05 14:02       ` Chris Wilson
2017-04-05 15:05         ` Matthew Auld
2017-04-10 12:08         ` Matthew Auld
2017-04-04 22:11 ` [PATCH 08/18] drm/i915: handle evict-for-node with " Matthew Auld
2017-04-04 22:11 ` [PATCH 09/18] drm/i915: support inserting 64K pages in the ppgtt Matthew Auld
2017-04-06  3:25   ` kbuild test robot
2017-04-09  0:27   ` kbuild test robot
2017-04-04 22:11 ` [PATCH 10/18] drm/i915: support inserting 2M " Matthew Auld
2017-04-04 22:11 ` [PATCH 11/18] drm/i915: support inserting 1G " Matthew Auld
2017-04-04 22:11 ` [PATCH 12/18] drm/i915: disable GTT cache for huge-pages Matthew Auld
2017-04-04 22:11 ` [PATCH 13/18] drm/i915/selftests: exercise 4K and 64K mm insertion Matthew Auld
2017-04-04 22:11 ` [PATCH 14/18] drm/i915/selftests: modify the gtt tests to also exercise huge pages Matthew Auld
2017-04-04 22:11 ` [PATCH 15/18] drm/i915/selftests: exercise evict-for-node page coloring Matthew Auld
2017-04-04 22:11 ` [PATCH 16/18] drm/i915/debugfs: include some huge-page metrics Matthew Auld
2017-04-04 22:11 ` [PATCH 17/18] mm/shmem: tweak the huge-page interface Matthew Auld
2017-04-05  6:42   ` Daniel Vetter
2017-04-04 22:11 ` [PATCH 18/18] drm/i915: support transparent-huge-pages through shmemfs Matthew Auld
2017-04-05  8:53 ` [RFC PATCH 00/18] drm/i915: initial support for huge gtt pages V2 Chris Wilson

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