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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v2] drm/i915: Advance ring->head fully when idle
Date: Wed,  5 Apr 2017 17:06:24 +0100	[thread overview]
Message-ID: <20170405160624.5862-1-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20170405153055.28123-2-chris@chris-wilson.co.uk>

When we retire the last request on the ring, before we ever access that
ring again we know it will be completely idle and so we can advance the
ring->head fully to the end (i.e. ring->tail) and not just to the start
of the breadcrumb. This allows us to skip re-emitting the breadcrumb
after resetting the GPU if the ring was entirely idle. This prevents us
from overwriting a seqno wraparound by re-executing a stale breadcrumb,
i.e.
	submit_request(1)
	intel_engine_init_global_seqno(0)
	i915_reset()
would then leave 1 in the HWS, but the next request to execute would
also be with seqno 1. The sanity checks upon submission detect this as a
timewarp and explode. By setting the ring as empty, upon reset the HWS
is left as 0, leaving it consistent with the timeline.

v2: Fix check for deleting last element of list. We know that this
request is always the first element of the ring, so only if next
points back to the start will this be the only request in flight.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100144
Testcase: igt/gem_exec_whisper/hang-*
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_gem_request.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_request.c b/drivers/gpu/drm/i915/i915_gem_request.c
index 2f8c5132b54e..e535036132b0 100644
--- a/drivers/gpu/drm/i915/i915_gem_request.c
+++ b/drivers/gpu/drm/i915/i915_gem_request.c
@@ -295,8 +295,11 @@ static void i915_gem_request_retire(struct drm_i915_gem_request *request)
 	 * Note this requires that we are always called in request
 	 * completion order.
 	 */
+	if (request->ring_link.next == &request->ring->request_list)
+		request->ring->head = request->ring->tail;
+	else
+		request->ring->head = request->postfix;
 	list_del(&request->ring_link);
-	request->ring->head = request->postfix;
 	if (!--request->i915->gt.active_requests) {
 		GEM_BUG_ON(!request->i915->gt.awake);
 		mod_delayed_work(request->i915->wq,
-- 
2.11.0

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  reply	other threads:[~2017-04-05 16:06 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-05 15:30 [PATCH 1/2] drm/i915: Assert the engine is idle before overwiting the HWS Chris Wilson
2017-04-05 15:30 ` [PATCH 2/2] drm/i915: Advance ring->head fully when idle Chris Wilson
2017-04-05 16:06   ` Chris Wilson [this message]
2017-04-06 15:52     ` [PATCH v3] " Chris Wilson
2017-04-06 17:00       ` [PATCH v4] " Chris Wilson
2017-04-07  7:25         ` Joonas Lahtinen
2017-04-07  9:15           ` Chris Wilson
2017-04-05 15:53 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Assert the engine is idle before overwiting the HWS Patchwork
2017-04-05 16:26 ` ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915: Assert the engine is idle before overwiting the HWS (rev2) Patchwork
2017-04-06 16:40 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Assert the engine is idle before overwiting the HWS (rev3) Patchwork
2017-04-06 17:30 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Assert the engine is idle before overwiting the HWS (rev4) Patchwork
2017-04-07  7:22 ` [PATCH 1/2] drm/i915: Assert the engine is idle before overwiting the HWS Joonas Lahtinen

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