From mboxrd@z Thu Jan 1 00:00:00 1970 From: Huang Rui Subject: Re: [PATCH 3/3] drm/amdgpu: fix to clear ASIC INIT COMPLETE bit on resuming phase Date: Tue, 11 Apr 2017 11:41:20 +0800 Message-ID: <20170411034119.GB16914@hr-amur2> References: <1491817071-17014-1-git-send-email-ray.huang@amd.com> <1491817071-17014-3-git-send-email-ray.huang@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "amd-gfx" To: Grazvydas Ignotas Cc: "Deucher, Alexander" , "amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org" T24gTW9uLCBBcHIgMTAsIDIwMTcgYXQgMDg6MDk6MTdQTSArMDgwMCwgR3JhenZ5ZGFzIElnbm90 YXMgd3JvdGU6Cj4gT24gTW9uLCBBcHIgMTAsIDIwMTcgYXQgMTI6MzcgUE0sIEh1YW5nIFJ1aSA8 cmF5Lmh1YW5nQGFtZC5jb20+IHdyb3RlOgo+IAo+ICAgICBBU0lDX0lOSVRfQ09NUExFVEUgYml0 IG11c3QgYmUgY2xlYXJlZCBkdXJpbmcgUzMgcmVzdW1pbmcgcGhhc2UsCj4gICAgIGJlY2F1c2Ug VkJJT1Mgd2lsbCBjaGVjayB0aGUgYml0IHRvIGRlY2lkZSBpZiBleGVjdXRlIEFTSUNfSW5pdAo+ ICAgICBwb3N0aW5nIHZpYSBrZXJuZWwgZHJpdmVyLgo+IAo+ICAgICBTaWduZWQtb2ZmLWJ5OiBI dWFuZyBSdWkgPHJheS5odWFuZ0BhbWQuY29tPgo+ICAgICAtLS0KPiAgICAgIGRyaXZlcnMvZ3B1 L2RybS9hbWQvYW1kZ3B1L2FtZGdwdV9hdG9tYmlvcy5jICAgICB8IDUgKysrKy0KPiAgICAgIGRy aXZlcnMvZ3B1L2RybS9hbWQvYW1kZ3B1L2FtZGdwdV9hdG9tZmlybXdhcmUuYyB8IDYgKysrKyst Cj4gICAgICAyIGZpbGVzIGNoYW5nZWQsIDkgaW5zZXJ0aW9ucygrKSwgMiBkZWxldGlvbnMoLSkK PiAKPiAgICAgZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9hbWQvYW1kZ3B1L2FtZGdwdV9h dG9tYmlvcy5jIGIvZHJpdmVycy9ncHUvZHJtCj4gICAgIC9hbWQvYW1kZ3B1L2FtZGdwdV9hdG9t Ymlvcy5jCj4gICAgIGluZGV4IGFkNDMyOTkuLmIwZGQ3MmE4IDEwMDY0NAo+ICAgICAtLS0gYS9k cml2ZXJzL2dwdS9kcm0vYW1kL2FtZGdwdS9hbWRncHVfYXRvbWJpb3MuYwo+ICAgICArKysgYi9k cml2ZXJzL2dwdS9kcm0vYW1kL2FtZGdwdS9hbWRncHVfYXRvbWJpb3MuYwo+ICAgICBAQCAtMTcy Nyw4ICsxNzI3LDExIEBAIHZvaWQgYW1kZ3B1X2F0b21iaW9zX3NjcmF0Y2hfcmVnc19yZXN0b3Jl KHN0cnVjdAo+ICAgICBhbWRncHVfZGV2aWNlICphZGV2KQo+ICAgICAgewo+ICAgICAgICAgICAg IGludCBpOwo+IAo+ICAgICAtICAgICAgIGZvciAoaSA9IDA7IGkgPCBBTURHUFVfQklPU19OVU1f U0NSQVRDSDsgaSsrKQo+ICAgICArICAgICAgIGZvciAoaSA9IDA7IGkgPCBBTURHUFVfQklPU19O VU1fU0NSQVRDSDsgaSsrKSB7Cj4gICAgICsgICAgICAgICAgICAgICBpZiAoaSA9PSA3KQo+ICAg ICArICAgICAgICAgICAgICAgICAgICAgICBhZGV2LT5iaW9zX3NjcmF0Y2hbaV0gJj0KPiAgICAg fkFUT01fUzdfQVNJQ19JTklUX0NPTVBMRVRFX01BU0s7Cj4gCj4gCj4gTWF5YmUgbW92ZSB0aGlz IGxpbmUgYmVmb3JlIHRoZSBsb29wPwo+IEEgY29tbWVudCBtYXkgYWxzbyBiZSB1c2VmdWwgc28g dGhhdCBzb21lYm9keSBkb2Vzbid0IGRlbGV0ZSB0aGUgY29kZSBhZ2FpbiBpbgo+IGZ1dHVyZS4K PiAKCk9LLiBJJ20gZmluZSB0byBtb3ZlIGl0IGJlZm9yZSB0aGlzIGxvb3AuCgoJLyoKCSAqIFZC SU9TIHdpbGwgY2hlY2sgQVNJQ19JTklUX0NPTVBMRVRFIGJpdCB0byBkZWNpZGUgaWYKCSAqIGV4 ZWN1dGUgQVNJQ19Jbml0IHBvc3RpbmcgdmlhIGRyaXZlcgoJICovCglhZGV2LT5iaW9zX3NjcmF0 Y2hbN10gJj0gfkFUT01fUzdfQVNJQ19JTklUX0NPTVBMRVRFX01BU0s7CgpUaGFua3MsClJ1aQpf X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwphbWQtZ2Z4IG1h aWxpbmcgbGlzdAphbWQtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZy ZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2FtZC1nZngK