From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752676AbdDKNQF (ORCPT ); Tue, 11 Apr 2017 09:16:05 -0400 Received: from bastet.se.axis.com ([195.60.68.11]:44951 "EHLO bastet.se.axis.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752033AbdDKNQD (ORCPT ); Tue, 11 Apr 2017 09:16:03 -0400 Date: Tue, 11 Apr 2017 15:15:59 +0200 From: Jesper Nilsson To: Lorenzo Pieralisi Cc: linux-pci@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Niklas Cassel , Bjorn Helgaas , Jesper Nilsson , Mikael Starvik Subject: Re: [PATCH v3 08/32] cris: include default ioremap_nopost() implementation Message-ID: <20170411131559.GW26295@axis.com> References: <20170411122923.6285-1-lorenzo.pieralisi@arm.com> <20170411122923.6285-9-lorenzo.pieralisi@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170411122923.6285-9-lorenzo.pieralisi@arm.com> User-Agent: Mutt/1.5.23 (2014-03-12) X-TM-AS-GCONF: 00 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Apr 11, 2017 at 01:28:48PM +0100, Lorenzo Pieralisi wrote: > The PCI specifications (Rev 3.0, 3.2.5 "Transaction Ordering and Posting") > mandate non-posted configuration transactions. As further highlighted in > the PCIe specifications (4.0 - Rev0.3, "Ordering Considerations for the > Enhanced Configuration Access Mechanism"), through ECAM and > ECAM-derivative configuration mechanism, the memory mapped transactions > from the host CPU into Configuration Requests on the PCI express fabric > may create ordering problems for software because writes to memory > address are typically posted transactions (unless the architecture can > enforce through virtual address mapping non-posted write transactions > behaviour) but writes to Configuration Space are not posted on the PCI > express fabric. > > Include the asm-generic ioremap_nopost() implementation (currently > falling back to ioremap_nocache()) to provide a non-posted writes > ioremap interface to kernel subsystems. > > Signed-off-by: Lorenzo Pieralisi > Cc: Niklas Cassel > Cc: Bjorn Helgaas For the CRIS-part: Acked-by: Jesper Nilsson /^JN - Jesper Nilsson -- Jesper Nilsson -- jesper.nilsson@axis.com From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Return-Path: Date: Tue, 11 Apr 2017 15:15:59 +0200 From: Jesper Nilsson To: Lorenzo Pieralisi Subject: Re: [PATCH v3 08/32] cris: include default ioremap_nopost() implementation Message-ID: <20170411131559.GW26295@axis.com> References: <20170411122923.6285-1-lorenzo.pieralisi@arm.com> <20170411122923.6285-9-lorenzo.pieralisi@arm.com> MIME-Version: 1.0 In-Reply-To: <20170411122923.6285-9-lorenzo.pieralisi@arm.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, Mikael Starvik , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Jesper Nilsson , Niklas Cassel , Bjorn Helgaas , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+bjorn=helgaas.com@lists.infradead.org List-ID: On Tue, Apr 11, 2017 at 01:28:48PM +0100, Lorenzo Pieralisi wrote: > The PCI specifications (Rev 3.0, 3.2.5 "Transaction Ordering and Posting") > mandate non-posted configuration transactions. As further highlighted in > the PCIe specifications (4.0 - Rev0.3, "Ordering Considerations for the > Enhanced Configuration Access Mechanism"), through ECAM and > ECAM-derivative configuration mechanism, the memory mapped transactions > from the host CPU into Configuration Requests on the PCI express fabric > may create ordering problems for software because writes to memory > address are typically posted transactions (unless the architecture can > enforce through virtual address mapping non-posted write transactions > behaviour) but writes to Configuration Space are not posted on the PCI > express fabric. > > Include the asm-generic ioremap_nopost() implementation (currently > falling back to ioremap_nocache()) to provide a non-posted writes > ioremap interface to kernel subsystems. > > Signed-off-by: Lorenzo Pieralisi > Cc: Niklas Cassel > Cc: Bjorn Helgaas For the CRIS-part: Acked-by: Jesper Nilsson /^JN - Jesper Nilsson -- Jesper Nilsson -- jesper.nilsson@axis.com _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 From: jesper.nilsson@axis.com (Jesper Nilsson) Date: Tue, 11 Apr 2017 15:15:59 +0200 Subject: [PATCH v3 08/32] cris: include default ioremap_nopost() implementation In-Reply-To: <20170411122923.6285-9-lorenzo.pieralisi@arm.com> References: <20170411122923.6285-1-lorenzo.pieralisi@arm.com> <20170411122923.6285-9-lorenzo.pieralisi@arm.com> Message-ID: <20170411131559.GW26295@axis.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Tue, Apr 11, 2017 at 01:28:48PM +0100, Lorenzo Pieralisi wrote: > The PCI specifications (Rev 3.0, 3.2.5 "Transaction Ordering and Posting") > mandate non-posted configuration transactions. As further highlighted in > the PCIe specifications (4.0 - Rev0.3, "Ordering Considerations for the > Enhanced Configuration Access Mechanism"), through ECAM and > ECAM-derivative configuration mechanism, the memory mapped transactions > from the host CPU into Configuration Requests on the PCI express fabric > may create ordering problems for software because writes to memory > address are typically posted transactions (unless the architecture can > enforce through virtual address mapping non-posted write transactions > behaviour) but writes to Configuration Space are not posted on the PCI > express fabric. > > Include the asm-generic ioremap_nopost() implementation (currently > falling back to ioremap_nocache()) to provide a non-posted writes > ioremap interface to kernel subsystems. > > Signed-off-by: Lorenzo Pieralisi > Cc: Niklas Cassel > Cc: Bjorn Helgaas For the CRIS-part: Acked-by: Jesper Nilsson /^JN - Jesper Nilsson -- Jesper Nilsson -- jesper.nilsson at axis.com