diff for duplicates of <20170412094454.GA31143@red-moon>

diff --git a/a/1.txt b/N1/1.txt
index d906120..8d680c2 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -3,29 +3,23 @@ On Wed, Apr 12, 2017 at 09:12:51AM +1000, Benjamin Herrenschmidt wrote:
 > > On Tue, Apr 11, 2017 at 11:38:26PM +1000, Benjamin Herrenschmidt wrote:
 > > > On Tue, 2017-04-11 at 13:28 +0100, Lorenzo Pieralisi wrote:
 > > > > This patch series[1] is a v3 of a previous version:
-> > > > =
-
+> > > > 
 > > > > v2: https://lkml.org/lkml/2017/3/27/220
-> > > =
-
+> > > 
 > > > I am not a fan of this at All.
-> > > =
-
+> > > 
 > > > That whole concept of "ioremap_nopost" is simply not applicable to the
 > > > majority of architectures and certainly not in a way that can apply to
 > > > arbitrary mappings.
-> > > =
-
+> > > 
 > > > It's also very wrong to provide a "default" operation whose semantics
 > > > are weaker than what it's supposed to implement. Very wrong actually.
 > > > People will use it assuming the non-posted behaviour and things will
 > > > break in subtle way when it cannot be provided.
-> > =
-
+> > 
 > > Well, what's very wrong for you it is not very wrong for others
 > > (it is just v3, that's fine, see thread below).
-> =
-
+> 
 > Maybe, but I don't see in what universe it is ok to have something
 > defined for the stronger ordering semantics it provide silently
 > fallback to weaker semantics.
@@ -38,27 +32,21 @@ I agree with you here.
 > > NULL unless overriden so that basically you can't use in on an arch
 > > that can't provide its semantics) but then that becomes very wrong
 > > for other reviewers.
-> =
-
+> 
 > Those reviewers are WRONG :-)
-> =
-
+> 
 > > https://lkml.org/lkml/2017/4/6/396
-> > =
-
+> > 
 > > > What exactly are you trying to fix here ?
-> > =
-
+> > 
 > > I wrote in the commit logs and cover letter what I am fixing here.
-> =
-
+> 
 > Right right, what *actual bug you have observed* are you trying to fix
 > ?
 
 I have not observed any bug and I never claimed that. It started here:
 
-http://lists.infradead.org/pipermail/linux-arm-kernel/2017-January/477353.h=
-tml
+http://lists.infradead.org/pipermail/linux-arm-kernel/2017-January/477353.html
 
 If you prefer I am making ARM/ARM64 PCI host bridge drivers
 specifications compliant, given that it is architecturally
@@ -73,8 +61,7 @@ compliant.
 > That said, I don't think it makes sense to "solve" it by creating a
 > "generic" mapping semantic that is basically impossible to implement on
 > most architectures out there (and cannot be emulated).
-> =
-
+> 
 > This is a problem to be solved by the bridge itself. If ARM has a
 > mapping attribute to make stores non-posted, keep this an ARM specific
 > attribute at this stage I'd say.
@@ -91,8 +78,7 @@ Thanks,
 Lorenzo
 
 > > Anyway:
-> > =
-
+> > 
 > > "The PCI specifications (Rev 3.0, 3.2.5 "Transaction Ordering and
 > > Posting") mandate non-posted configuration transactions. As further
 > > highlighted in the PCIe specifications (4.0 - Rev0.3, "Ordering
@@ -104,83 +90,68 @@ Lorenzo
 > > architecture can enforce through virtual address mapping non-posted
 > > write transactions behaviour) but writes to Configuration Space are not
 > > posted on the PCI express fabric."
-> > =
-
+> > 
 > > On ARM64:
-> > =
-
+> > 
 > > "This rule is reinforced by the ARM v8 architecture reference manual
 > > (issue A.k, Early Write Acknowledgment) that explicitly recommends
 > > that No Early Write Acknowledgment attribute should be used to map
 > > PCI configuration (write) transactions."
-> > =
-
+> > 
 > > > If a given PCIe host bridge (architecture specific) require a special
 > > > sauce to provide the illusion of non-posting, then implement this in
 > > > the actual root complex code.
-> > > =
-
+> > > 
 > > > BTW. I'm pretty sure we "accidentally" made config writes posted at
 > > > least to the PHB on a number of powerpc systems forever and we *never*
 > > > had a problem because of it ;)
-> > =
-
+> > 
 > > Ok so we should ignore the PCIe specifications and ARM v8 reference
 > > manual waiting for a kernel bug to appear ? Is that what you suggest
 > > doing ?
-> > =
-
+> > 
 > > Lorenzo
-> > =
-
+> > 
 > > > > v2 -> v3:
 > > > > 	- Created a default ioremap_nopost() implementation in a
 > > > > separate
-> > > > 	=A0=A0asm-generic header and patched all arches to make use of it
+> > > > 	  asm-generic header and patched all arches to make use of it
 > > > > 	- Removed PCI drivers patches from the series to simplify the
-> > > > 	=A0=A0review, they will be posted separately once the
+> > > > 	  review, they will be posted separately once the
 > > > > ioremap_nopost()
-> > > > 	=A0=A0interface is settled
+> > > > 	  interface is settled
 > > > > 	- Fixed devm_ioremap_* BUS offset comments and implemented
-> > > > 	=A0=A0nopost interface on top of it
+> > > > 	  nopost interface on top of it
 > > > > 	- Added collected tags
-> > > > =
-
+> > > > 
 > > > > v1: https://lkml.org/lkml/2017/2/27/228
-> > > > =
-
+> > > > 
 > > > > v1 -> v2:
 > > > > 	- Changed pci_remap_cfgspace() to more generic ioremap_nopost()
-> > > > 	=A0=A0interface
+> > > > 	  interface
 > > > > 	- Added pgprot_nonposted
 > > > > 	- Fixed build errors on arches not relying on asm-generic
 > > > > headers
 > > > > 	- Added PCI versatile host controller driver patch
 > > > > 	- Added missing config space remapping to hisilicon host
 > > > > controller
-> > > > =
-
+> > > > 
 > > > > ---------------------
 > > > > Original cover letter
 > > > > ---------------------
-> > > > =
-
+> > > > 
 > > > > PCI local bus specifications (Rev3.0, 3.2.5 "Transaction Ordering
 > > > > and Posting") strictly require PCI configuration and I/O Address
 > > > > space
 > > > > write transactions to be non-posted.
-> > > > =
-
+> > > > 
 > > > > Current crop of DT/ACPI PCI host controllers drivers relies on
 > > > > the ioremap interface to map ECAM and ECAM-derivative PCI config
 > > > > regions and pci_remap_iospace() to create a VMA for mapping
-> > > > PCI host bridge I/O Address space transactions to CPU virtual addre=
-ss
+> > > > PCI host bridge I/O Address space transactions to CPU virtual address
 > > > > space.
-> > > > =
-
-> > > > On some platforms (ie ARM/ARM64) ioremap fails to comply with the P=
-CI
+> > > > 
+> > > > On some platforms (ie ARM/ARM64) ioremap fails to comply with the PCI
 > > > > configuration non-posted write transactions requirement, because it
 > > > > provides a memory mapping that issues "bufferable" or, in PCI terms
 > > > > "posted" write transactions. Likewise, the current
@@ -191,150 +162,103 @@ CI
 > > > > attributes that on eg ARM64 provides a memory mapping issuing
 > > > > posted writes transactions, which is not PCI specifications
 > > > > compliant.
-> > > > =
-
+> > > > 
 > > > > This patch series[1] addresses both issues in one go:
-> > > > =
-
+> > > > 
 > > > > - It updates the pci_remap_iospace() function to use a page mapping
-> > > > =A0 that guarantees non-posted write transactions for I/O space
+> > > >   that guarantees non-posted write transactions for I/O space
 > > > > addresses
 > > > > - It adds a kernel API to remap PCI config space resources, so that
-> > > > =A0 architecture can override it with a mapping implementation that
-> > > > =A0 guarantees PCI specifications compliancy wrt non-posted write
-> > > > =A0 configuration transactions
-> > > > - It updates all PCI host controller implementations (and the gener=
-ic
-> > > > =A0 ECAM layer) to use the newly introduced mapping interface
-> > > > =
-
+> > > >   architecture can override it with a mapping implementation that
+> > > >   guarantees PCI specifications compliancy wrt non-posted write
+> > > >   configuration transactions
+> > > > - It updates all PCI host controller implementations (and the generic
+> > > >   ECAM layer) to use the newly introduced mapping interface
+> > > > 
 > > > > Tested on Juno ECAM based interface (DT/ACPI).
-> > > > =
-
+> > > > 
 > > > > Non-ECAM PCI host controller drivers patches need checking to make
 > > > > sure that:
-> > > > =
-
+> > > > 
 > > > > - I patched the correct resource region mapping for config space
 > > > > - There are not any other ways to ensure posted-write completion
-> > > > =A0 in the respective pci_ops that make the relevant patch unnecess=
-ary
-> > > > =
-
+> > > >   in the respective pci_ops that make the relevant patch unnecessary
+> > > > 
 > > > > [1]
 > > > > git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/linux.git
 > > > > pci/config-io-mappings-fix-v3
-> > > > =
-
+> > > > 
 > > > > Lorenzo Pieralisi (32):
-> > > > =A0 PCI: remove __weak tag from pci_remap_iospace()
-> > > > =A0 asm-generic/pgtable.h: introduce pgprot_nonposted remap attribu=
-te
-> > > > =A0 PCI: fix pci_remap_iospace() remap attribute
-> > > > =A0 asm-generic: add ioremap_nopost() remap interface
-> > > > =A0 alpha: include default ioremap_nopost() implementation
-> > > > =A0 avr32: include default ioremap_nopost() implementation
-> > > > =A0 arc: include default ioremap_nopost() implementation
-> > > > =A0 cris: include default ioremap_nopost() implementation
-> > > > =A0 frv: include default ioremap_nopost() implementation
-> > > > =A0 hexagon: include default ioremap_nopost() implementation
-> > > > =A0 ia64: include default ioremap_nopost() implementation
-> > > > =A0 m32r: include default ioremap_nopost() implementation
-> > > > =A0 m68k: include default ioremap_nopost() implementation
-> > > > =A0 metag: include default ioremap_nopost() implementation
-> > > > =A0 microblaze: include default ioremap_nopost() implementation
-> > > > =A0 mips: include default ioremap_nopost() implementation
-> > > > =A0 mn10300: include default ioremap_nopost() implementation
-> > > > =A0 nios2: include default ioremap_nopost() implementation
-> > > > =A0 openrisc: include default ioremap_nopost() implementation
-> > > > =A0 parisc: include default ioremap_nopost() implementation
-> > > > =A0 powerpc: include default ioremap_nopost() implementation
-> > > > =A0 s390: include default ioremap_nopost() implementation
-> > > > =A0 sh: include default ioremap_nopost() implementation
-> > > > =A0 sparc: include default ioremap_nopost() implementation
-> > > > =A0 tile: include default ioremap_nopost() implementation
-> > > > =A0 unicore32: include default ioremap_nopost() implementation
-> > > > =A0 x86: include default ioremap_nopost() implementation
-> > > > =A0 xtensa: include default ioremap_nopost() implementation
-> > > > =A0 arm64: implement ioremap_nopost() interface
-> > > > =A0 arm: implement ioremap_nopost() interface
-> > > > =A0 lib: fix Devres devm_ioremap_* offset parameter kerneldoc
+> > > >   PCI: remove __weak tag from pci_remap_iospace()
+> > > >   asm-generic/pgtable.h: introduce pgprot_nonposted remap attribute
+> > > >   PCI: fix pci_remap_iospace() remap attribute
+> > > >   asm-generic: add ioremap_nopost() remap interface
+> > > >   alpha: include default ioremap_nopost() implementation
+> > > >   avr32: include default ioremap_nopost() implementation
+> > > >   arc: include default ioremap_nopost() implementation
+> > > >   cris: include default ioremap_nopost() implementation
+> > > >   frv: include default ioremap_nopost() implementation
+> > > >   hexagon: include default ioremap_nopost() implementation
+> > > >   ia64: include default ioremap_nopost() implementation
+> > > >   m32r: include default ioremap_nopost() implementation
+> > > >   m68k: include default ioremap_nopost() implementation
+> > > >   metag: include default ioremap_nopost() implementation
+> > > >   microblaze: include default ioremap_nopost() implementation
+> > > >   mips: include default ioremap_nopost() implementation
+> > > >   mn10300: include default ioremap_nopost() implementation
+> > > >   nios2: include default ioremap_nopost() implementation
+> > > >   openrisc: include default ioremap_nopost() implementation
+> > > >   parisc: include default ioremap_nopost() implementation
+> > > >   powerpc: include default ioremap_nopost() implementation
+> > > >   s390: include default ioremap_nopost() implementation
+> > > >   sh: include default ioremap_nopost() implementation
+> > > >   sparc: include default ioremap_nopost() implementation
+> > > >   tile: include default ioremap_nopost() implementation
+> > > >   unicore32: include default ioremap_nopost() implementation
+> > > >   x86: include default ioremap_nopost() implementation
+> > > >   xtensa: include default ioremap_nopost() implementation
+> > > >   arm64: implement ioremap_nopost() interface
+> > > >   arm: implement ioremap_nopost() interface
+> > > >   lib: fix Devres devm_ioremap_* offset parameter kerneldoc
 > > > > description
-> > > > =A0 lib: implement Devres ioremap_nopost() interface
-> > > > =
-
-> > > > =A0Documentation/driver-model/devres.txt |=A0=A03 ++
-> > > > =A0arch/alpha/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=A0=
-=A01 +
-> > > > =A0arch/arc/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=
-|=A0=A01 +
-> > > > =A0arch/arm/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=
-|=A0=A09 ++++
-> > > > =A0arch/arm/mm/ioremap.c=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=
-=A0=A0=A0|=A0=A07 +++
-> > > > =A0arch/arm/mm/nommu.c=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=
-=A0=A0=A0=A0|=A0=A09 ++++
-> > > > =A0arch/arm64/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0| 12=
- +++++
-> > > > =A0arch/avr32/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=A0=
-=A01 +
-> > > > =A0arch/cris/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=
-=A0=A01 +
-> > > > =A0arch/frv/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=
-|=A0=A01 +
-> > > > =A0arch/hexagon/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0|=A0=A02=
- +
-> > > > =A0arch/ia64/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=
-=A0=A01 +
-> > > > =A0arch/m32r/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=
-=A0=A01 +
-> > > > =A0arch/m68k/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=
-=A0=A01 +
-> > > > =A0arch/metag/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=A0=
-=A02 +
-> > > > =A0arch/microblaze/include/asm/io.h=A0=A0=A0=A0=A0=A0|=A0=A01 +
-> > > > =A0arch/mips/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=
-=A0=A01 +
-> > > > =A0arch/mn10300/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0|=A0=A01=
- +
-> > > > =A0arch/nios2/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=A0=
-=A01 +
-> > > > =A0arch/openrisc/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0|=A0=A02 +
-> > > > =A0arch/parisc/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=A0=
-=A01 +
-> > > > =A0arch/powerpc/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0|=A0=A01=
- +
-> > > > =A0arch/s390/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=
-=A0=A01 +
-> > > > =A0arch/sh/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=
-=A0|=A0=A01 +
-> > > > =A0arch/sparc/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=A0=
-=A01 +
-> > > > =A0arch/tile/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=
-=A0=A01 +
-> > > > =A0arch/unicore32/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0|=A0=A01 +
-> > > > =A0arch/x86/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=
-|=A0=A01 +
-> > > > =A0arch/xtensa/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=A0=
-=A01 +
-> > > > =A0drivers/pci/pci.c=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=
-=A0=A0=A0=A0=A0=A0|=A0=A04 +-
-> > > > =A0include/asm-generic/ioremap-nopost.h=A0=A0|=A0=A09 ++++
-> > > > =A0include/asm-generic/pgtable.h=A0=A0=A0=A0=A0=A0=A0=A0=A0|=A0=A04=
- ++
-> > > > =A0include/linux/device.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=
-=A0=A0|=A0=A02 +
-> > > > =A0include/linux/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=
-=A0=A0=A0=A0=A0|=A0=A02 +
-> > > > =A0lib/devres.c=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=
-=A0=A0=A0=A0=A0=A0=A0=A0=A0| 84
+> > > >   lib: implement Devres ioremap_nopost() interface
+> > > > 
+> > > >  Documentation/driver-model/devres.txt |  3 ++
+> > > >  arch/alpha/include/asm/io.h           |  1 +
+> > > >  arch/arc/include/asm/io.h             |  1 +
+> > > >  arch/arm/include/asm/io.h             |  9 ++++
+> > > >  arch/arm/mm/ioremap.c                 |  7 +++
+> > > >  arch/arm/mm/nommu.c                   |  9 ++++
+> > > >  arch/arm64/include/asm/io.h           | 12 +++++
+> > > >  arch/avr32/include/asm/io.h           |  1 +
+> > > >  arch/cris/include/asm/io.h            |  1 +
+> > > >  arch/frv/include/asm/io.h             |  1 +
+> > > >  arch/hexagon/include/asm/io.h         |  2 +
+> > > >  arch/ia64/include/asm/io.h            |  1 +
+> > > >  arch/m32r/include/asm/io.h            |  1 +
+> > > >  arch/m68k/include/asm/io.h            |  1 +
+> > > >  arch/metag/include/asm/io.h           |  2 +
+> > > >  arch/microblaze/include/asm/io.h      |  1 +
+> > > >  arch/mips/include/asm/io.h            |  1 +
+> > > >  arch/mn10300/include/asm/io.h         |  1 +
+> > > >  arch/nios2/include/asm/io.h           |  1 +
+> > > >  arch/openrisc/include/asm/io.h        |  2 +
+> > > >  arch/parisc/include/asm/io.h          |  1 +
+> > > >  arch/powerpc/include/asm/io.h         |  1 +
+> > > >  arch/s390/include/asm/io.h            |  1 +
+> > > >  arch/sh/include/asm/io.h              |  1 +
+> > > >  arch/sparc/include/asm/io.h           |  1 +
+> > > >  arch/tile/include/asm/io.h            |  1 +
+> > > >  arch/unicore32/include/asm/io.h       |  1 +
+> > > >  arch/x86/include/asm/io.h             |  1 +
+> > > >  arch/xtensa/include/asm/io.h          |  1 +
+> > > >  drivers/pci/pci.c                     |  4 +-
+> > > >  include/asm-generic/ioremap-nopost.h  |  9 ++++
+> > > >  include/asm-generic/pgtable.h         |  4 ++
+> > > >  include/linux/device.h                |  2 +
+> > > >  include/linux/io.h                    |  2 +
+> > > >  lib/devres.c                          | 84
 > > > > +++++++++++++++++++++++++++++++++--
-> > > > =A035 files changed, 167 insertions(+), 5 deletions(-)
-> > > > =A0create mode 100644 include/asm-generic/ioremap-nopost.h
-> > > > =
-
-
-_______________________________________________
-linux-arm-kernel mailing list
-linux-arm-kernel@lists.infradead.org
-http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
\ No newline at end of file
+> > > >  35 files changed, 167 insertions(+), 5 deletions(-)
+> > > >  create mode 100644 include/asm-generic/ioremap-nopost.h
+> > > >
\ No newline at end of file
diff --git a/a/content_digest b/N1/content_digest
index c41fb6d..4873ba8 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -46,30 +46,7 @@
   " Catalin Marinas <catalin.marinas\@arm.com>",
   " Matt Turner <mattst88\@gmail.com>",
   " Haavard Skinnemoen <hskinnemoen\@gmail.com>",
-  " Fenghua Yu <fenghua.yu\@intel.com>",
-  " James Hogan <james.hogan\@imgtec.com>",
-  " Chris Metcalf <cmetcalf\@mellanox.com>",
-  " Arnd Bergmann <arnd\@arndb.de>",
-  " Heiko Carstens <heiko.carstens\@de.ibm.com>",
-  " Stefan Kristiansson <stefan.kristiansson\@saunalahti.fi>",
-  " Mikael Starvik <starvik\@axis.com>",
-  " Ivan Kokshaysky <ink\@jurassic.park.msu.ru>",
-  " Bjorn Helgaas <bhelgaas\@google.com>",
-  " Stafford Horne <shorne\@gmail.com>",
-  " linux-arm-kernel\@lists.infradead.org",
-  " Richard Henderson <rth\@twiddle.net>",
-  " Chris Zankel <chris\@zankel.net>",
-  " Michal Simek <monstr\@monstr.eu>",
-  " Tony Luck <tony.luck\@intel.com>",
-  " Vineet Gupta <vgupta\@synopsys.com>",
-  " linux-kernel\@vger.kernel.org",
-  " Ralf Baechle <ralf\@linux-mips.org>",
-  " Richard Kuo <rkuo\@codeaurora.org>",
-  " Niklas Cassel <nks\@flawful.org>",
-  " Luis R. Rodriguez <mcgrof\@kernel.org>",
-  " Martin Schwidefsky <schwidefsky\@de.ibm.com>",
-  " Ley Foon Tan <lftan\@altera.com>",
-  " David S. Miller <davem\@davemloft.net>\0"
+  " Fenghua Yu <fenghua.yu\@intel.co>\0"
 ]
 [
   "\0000:1\0"
@@ -83,29 +60,23 @@
   "> > On Tue, Apr 11, 2017 at 11:38:26PM +1000, Benjamin Herrenschmidt wrote:\n",
   "> > > On Tue, 2017-04-11 at 13:28 +0100, Lorenzo Pieralisi wrote:\n",
   "> > > > This patch series[1] is a v3 of a previous version:\n",
-  "> > > > =\n",
-  "\n",
+  "> > > > \n",
   "> > > > v2: https://lkml.org/lkml/2017/3/27/220\n",
-  "> > > =\n",
-  "\n",
+  "> > > \n",
   "> > > I am not a fan of this at All.\n",
-  "> > > =\n",
-  "\n",
+  "> > > \n",
   "> > > That whole concept of \"ioremap_nopost\" is simply not applicable to the\n",
   "> > > majority of architectures and certainly not in a way that can apply to\n",
   "> > > arbitrary mappings.\n",
-  "> > > =\n",
-  "\n",
+  "> > > \n",
   "> > > It's also very wrong to provide a \"default\" operation whose semantics\n",
   "> > > are weaker than what it's supposed to implement. Very wrong actually.\n",
   "> > > People will use it assuming the non-posted behaviour and things will\n",
   "> > > break in subtle way when it cannot be provided.\n",
-  "> > =\n",
-  "\n",
+  "> > \n",
   "> > Well, what's very wrong for you it is not very wrong for others\n",
   "> > (it is just v3, that's fine, see thread below).\n",
-  "> =\n",
-  "\n",
+  "> \n",
   "> Maybe, but I don't see in what universe it is ok to have something\n",
   "> defined for the stronger ordering semantics it provide silently\n",
   "> fallback to weaker semantics.\n",
@@ -118,27 +89,21 @@
   "> > NULL unless overriden so that basically you can't use in on an arch\n",
   "> > that can't provide its semantics) but then that becomes very wrong\n",
   "> > for other reviewers.\n",
-  "> =\n",
-  "\n",
+  "> \n",
   "> Those reviewers are WRONG :-)\n",
-  "> =\n",
-  "\n",
+  "> \n",
   "> > https://lkml.org/lkml/2017/4/6/396\n",
-  "> > =\n",
-  "\n",
+  "> > \n",
   "> > > What exactly are you trying to fix here ?\n",
-  "> > =\n",
-  "\n",
+  "> > \n",
   "> > I wrote in the commit logs and cover letter what I am fixing here.\n",
-  "> =\n",
-  "\n",
+  "> \n",
   "> Right right, what *actual bug you have observed* are you trying to fix\n",
   "> ?\n",
   "\n",
   "I have not observed any bug and I never claimed that. It started here:\n",
   "\n",
-  "http://lists.infradead.org/pipermail/linux-arm-kernel/2017-January/477353.h=\n",
-  "tml\n",
+  "http://lists.infradead.org/pipermail/linux-arm-kernel/2017-January/477353.html\n",
   "\n",
   "If you prefer I am making ARM/ARM64 PCI host bridge drivers\n",
   "specifications compliant, given that it is architecturally\n",
@@ -153,8 +118,7 @@
   "> That said, I don't think it makes sense to \"solve\" it by creating a\n",
   "> \"generic\" mapping semantic that is basically impossible to implement on\n",
   "> most architectures out there (and cannot be emulated).\n",
-  "> =\n",
-  "\n",
+  "> \n",
   "> This is a problem to be solved by the bridge itself. If ARM has a\n",
   "> mapping attribute to make stores non-posted, keep this an ARM specific\n",
   "> attribute at this stage I'd say.\n",
@@ -171,8 +135,7 @@
   "Lorenzo\n",
   "\n",
   "> > Anyway:\n",
-  "> > =\n",
-  "\n",
+  "> > \n",
   "> > \"The PCI specifications (Rev 3.0, 3.2.5 \"Transaction Ordering and\n",
   "> > Posting\") mandate non-posted configuration transactions. As further\n",
   "> > highlighted in the PCIe specifications (4.0 - Rev0.3, \"Ordering\n",
@@ -184,83 +147,68 @@
   "> > architecture can enforce through virtual address mapping non-posted\n",
   "> > write transactions behaviour) but writes to Configuration Space are not\n",
   "> > posted on the PCI express fabric.\"\n",
-  "> > =\n",
-  "\n",
+  "> > \n",
   "> > On ARM64:\n",
-  "> > =\n",
-  "\n",
+  "> > \n",
   "> > \"This rule is reinforced by the ARM v8 architecture reference manual\n",
   "> > (issue A.k, Early Write Acknowledgment) that explicitly recommends\n",
   "> > that No Early Write Acknowledgment attribute should be used to map\n",
   "> > PCI configuration (write) transactions.\"\n",
-  "> > =\n",
-  "\n",
+  "> > \n",
   "> > > If a given PCIe host bridge (architecture specific) require a special\n",
   "> > > sauce to provide the illusion of non-posting, then implement this in\n",
   "> > > the actual root complex code.\n",
-  "> > > =\n",
-  "\n",
+  "> > > \n",
   "> > > BTW. I'm pretty sure we \"accidentally\" made config writes posted at\n",
   "> > > least to the PHB on a number of powerpc systems forever and we *never*\n",
   "> > > had a problem because of it ;)\n",
-  "> > =\n",
-  "\n",
+  "> > \n",
   "> > Ok so we should ignore the PCIe specifications and ARM v8 reference\n",
   "> > manual waiting for a kernel bug to appear ? Is that what you suggest\n",
   "> > doing ?\n",
-  "> > =\n",
-  "\n",
+  "> > \n",
   "> > Lorenzo\n",
-  "> > =\n",
-  "\n",
+  "> > \n",
   "> > > > v2 -> v3:\n",
   "> > > > \t- Created a default ioremap_nopost() implementation in a\n",
   "> > > > separate\n",
-  "> > > > \t=A0=A0asm-generic header and patched all arches to make use of it\n",
+  "> > > > \t\302\240\302\240asm-generic header and patched all arches to make use of it\n",
   "> > > > \t- Removed PCI drivers patches from the series to simplify the\n",
-  "> > > > \t=A0=A0review, they will be posted separately once the\n",
+  "> > > > \t\302\240\302\240review, they will be posted separately once the\n",
   "> > > > ioremap_nopost()\n",
-  "> > > > \t=A0=A0interface is settled\n",
+  "> > > > \t\302\240\302\240interface is settled\n",
   "> > > > \t- Fixed devm_ioremap_* BUS offset comments and implemented\n",
-  "> > > > \t=A0=A0nopost interface on top of it\n",
+  "> > > > \t\302\240\302\240nopost interface on top of it\n",
   "> > > > \t- Added collected tags\n",
-  "> > > > =\n",
-  "\n",
+  "> > > > \n",
   "> > > > v1: https://lkml.org/lkml/2017/2/27/228\n",
-  "> > > > =\n",
-  "\n",
+  "> > > > \n",
   "> > > > v1 -> v2:\n",
   "> > > > \t- Changed pci_remap_cfgspace() to more generic ioremap_nopost()\n",
-  "> > > > \t=A0=A0interface\n",
+  "> > > > \t\302\240\302\240interface\n",
   "> > > > \t- Added pgprot_nonposted\n",
   "> > > > \t- Fixed build errors on arches not relying on asm-generic\n",
   "> > > > headers\n",
   "> > > > \t- Added PCI versatile host controller driver patch\n",
   "> > > > \t- Added missing config space remapping to hisilicon host\n",
   "> > > > controller\n",
-  "> > > > =\n",
-  "\n",
+  "> > > > \n",
   "> > > > ---------------------\n",
   "> > > > Original cover letter\n",
   "> > > > ---------------------\n",
-  "> > > > =\n",
-  "\n",
+  "> > > > \n",
   "> > > > PCI local bus specifications (Rev3.0, 3.2.5 \"Transaction Ordering\n",
   "> > > > and Posting\") strictly require PCI configuration and I/O Address\n",
   "> > > > space\n",
   "> > > > write transactions to be non-posted.\n",
-  "> > > > =\n",
-  "\n",
+  "> > > > \n",
   "> > > > Current crop of DT/ACPI PCI host controllers drivers relies on\n",
   "> > > > the ioremap interface to map ECAM and ECAM-derivative PCI config\n",
   "> > > > regions and pci_remap_iospace() to create a VMA for mapping\n",
-  "> > > > PCI host bridge I/O Address space transactions to CPU virtual addre=\n",
-  "ss\n",
+  "> > > > PCI host bridge I/O Address space transactions to CPU virtual address\n",
   "> > > > space.\n",
-  "> > > > =\n",
-  "\n",
-  "> > > > On some platforms (ie ARM/ARM64) ioremap fails to comply with the P=\n",
-  "CI\n",
+  "> > > > \n",
+  "> > > > On some platforms (ie ARM/ARM64) ioremap fails to comply with the PCI\n",
   "> > > > configuration non-posted write transactions requirement, because it\n",
   "> > > > provides a memory mapping that issues \"bufferable\" or, in PCI terms\n",
   "> > > > \"posted\" write transactions. Likewise, the current\n",
@@ -271,153 +219,106 @@
   "> > > > attributes that on eg ARM64 provides a memory mapping issuing\n",
   "> > > > posted writes transactions, which is not PCI specifications\n",
   "> > > > compliant.\n",
-  "> > > > =\n",
-  "\n",
+  "> > > > \n",
   "> > > > This patch series[1] addresses both issues in one go:\n",
-  "> > > > =\n",
-  "\n",
+  "> > > > \n",
   "> > > > - It updates the pci_remap_iospace() function to use a page mapping\n",
-  "> > > > =A0 that guarantees non-posted write transactions for I/O space\n",
+  "> > > > \302\240 that guarantees non-posted write transactions for I/O space\n",
   "> > > > addresses\n",
   "> > > > - It adds a kernel API to remap PCI config space resources, so that\n",
-  "> > > > =A0 architecture can override it with a mapping implementation that\n",
-  "> > > > =A0 guarantees PCI specifications compliancy wrt non-posted write\n",
-  "> > > > =A0 configuration transactions\n",
-  "> > > > - It updates all PCI host controller implementations (and the gener=\n",
-  "ic\n",
-  "> > > > =A0 ECAM layer) to use the newly introduced mapping interface\n",
-  "> > > > =\n",
-  "\n",
+  "> > > > \302\240 architecture can override it with a mapping implementation that\n",
+  "> > > > \302\240 guarantees PCI specifications compliancy wrt non-posted write\n",
+  "> > > > \302\240 configuration transactions\n",
+  "> > > > - It updates all PCI host controller implementations (and the generic\n",
+  "> > > > \302\240 ECAM layer) to use the newly introduced mapping interface\n",
+  "> > > > \n",
   "> > > > Tested on Juno ECAM based interface (DT/ACPI).\n",
-  "> > > > =\n",
-  "\n",
+  "> > > > \n",
   "> > > > Non-ECAM PCI host controller drivers patches need checking to make\n",
   "> > > > sure that:\n",
-  "> > > > =\n",
-  "\n",
+  "> > > > \n",
   "> > > > - I patched the correct resource region mapping for config space\n",
   "> > > > - There are not any other ways to ensure posted-write completion\n",
-  "> > > > =A0 in the respective pci_ops that make the relevant patch unnecess=\n",
-  "ary\n",
-  "> > > > =\n",
-  "\n",
+  "> > > > \302\240 in the respective pci_ops that make the relevant patch unnecessary\n",
+  "> > > > \n",
   "> > > > [1]\n",
   "> > > > git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/linux.git\n",
   "> > > > pci/config-io-mappings-fix-v3\n",
-  "> > > > =\n",
-  "\n",
+  "> > > > \n",
   "> > > > Lorenzo Pieralisi (32):\n",
-  "> > > > =A0 PCI: remove __weak tag from pci_remap_iospace()\n",
-  "> > > > =A0 asm-generic/pgtable.h: introduce pgprot_nonposted remap attribu=\n",
-  "te\n",
-  "> > > > =A0 PCI: fix pci_remap_iospace() remap attribute\n",
-  "> > > > =A0 asm-generic: add ioremap_nopost() remap interface\n",
-  "> > > > =A0 alpha: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 avr32: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 arc: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 cris: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 frv: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 hexagon: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 ia64: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 m32r: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 m68k: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 metag: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 microblaze: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 mips: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 mn10300: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 nios2: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 openrisc: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 parisc: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 powerpc: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 s390: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 sh: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 sparc: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 tile: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 unicore32: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 x86: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 xtensa: include default ioremap_nopost() implementation\n",
-  "> > > > =A0 arm64: implement ioremap_nopost() interface\n",
-  "> > > > =A0 arm: implement ioremap_nopost() interface\n",
-  "> > > > =A0 lib: fix Devres devm_ioremap_* offset parameter kerneldoc\n",
+  "> > > > \302\240 PCI: remove __weak tag from pci_remap_iospace()\n",
+  "> > > > \302\240 asm-generic/pgtable.h: introduce pgprot_nonposted remap attribute\n",
+  "> > > > \302\240 PCI: fix pci_remap_iospace() remap attribute\n",
+  "> > > > \302\240 asm-generic: add ioremap_nopost() remap interface\n",
+  "> > > > \302\240 alpha: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 avr32: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 arc: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 cris: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 frv: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 hexagon: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 ia64: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 m32r: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 m68k: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 metag: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 microblaze: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 mips: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 mn10300: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 nios2: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 openrisc: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 parisc: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 powerpc: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 s390: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 sh: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 sparc: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 tile: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 unicore32: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 x86: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 xtensa: include default ioremap_nopost() implementation\n",
+  "> > > > \302\240 arm64: implement ioremap_nopost() interface\n",
+  "> > > > \302\240 arm: implement ioremap_nopost() interface\n",
+  "> > > > \302\240 lib: fix Devres devm_ioremap_* offset parameter kerneldoc\n",
   "> > > > description\n",
-  "> > > > =A0 lib: implement Devres ioremap_nopost() interface\n",
-  "> > > > =\n",
-  "\n",
-  "> > > > =A0Documentation/driver-model/devres.txt |=A0=A03 ++\n",
-  "> > > > =A0arch/alpha/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=A0=\n",
-  "=A01 +\n",
-  "> > > > =A0arch/arc/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=\n",
-  "|=A0=A01 +\n",
-  "> > > > =A0arch/arm/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=\n",
-  "|=A0=A09 ++++\n",
-  "> > > > =A0arch/arm/mm/ioremap.c=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=\n",
-  "=A0=A0=A0|=A0=A07 +++\n",
-  "> > > > =A0arch/arm/mm/nommu.c=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=\n",
-  "=A0=A0=A0=A0|=A0=A09 ++++\n",
-  "> > > > =A0arch/arm64/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0| 12=\n",
-  " +++++\n",
-  "> > > > =A0arch/avr32/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=A0=\n",
-  "=A01 +\n",
-  "> > > > =A0arch/cris/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=\n",
-  "=A0=A01 +\n",
-  "> > > > =A0arch/frv/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=\n",
-  "|=A0=A01 +\n",
-  "> > > > =A0arch/hexagon/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0|=A0=A02=\n",
-  " +\n",
-  "> > > > =A0arch/ia64/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=\n",
-  "=A0=A01 +\n",
-  "> > > > =A0arch/m32r/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=\n",
-  "=A0=A01 +\n",
-  "> > > > =A0arch/m68k/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=\n",
-  "=A0=A01 +\n",
-  "> > > > =A0arch/metag/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=A0=\n",
-  "=A02 +\n",
-  "> > > > =A0arch/microblaze/include/asm/io.h=A0=A0=A0=A0=A0=A0|=A0=A01 +\n",
-  "> > > > =A0arch/mips/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=\n",
-  "=A0=A01 +\n",
-  "> > > > =A0arch/mn10300/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0|=A0=A01=\n",
-  " +\n",
-  "> > > > =A0arch/nios2/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=A0=\n",
-  "=A01 +\n",
-  "> > > > =A0arch/openrisc/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0|=A0=A02 +\n",
-  "> > > > =A0arch/parisc/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=A0=\n",
-  "=A01 +\n",
-  "> > > > =A0arch/powerpc/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0|=A0=A01=\n",
-  " +\n",
-  "> > > > =A0arch/s390/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=\n",
-  "=A0=A01 +\n",
-  "> > > > =A0arch/sh/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=\n",
-  "=A0|=A0=A01 +\n",
-  "> > > > =A0arch/sparc/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=A0=\n",
-  "=A01 +\n",
-  "> > > > =A0arch/tile/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=\n",
-  "=A0=A01 +\n",
-  "> > > > =A0arch/unicore32/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0|=A0=A01 +\n",
-  "> > > > =A0arch/x86/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=\n",
-  "|=A0=A01 +\n",
-  "> > > > =A0arch/xtensa/include/asm/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0|=A0=\n",
-  "=A01 +\n",
-  "> > > > =A0drivers/pci/pci.c=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=\n",
-  "=A0=A0=A0=A0=A0=A0|=A0=A04 +-\n",
-  "> > > > =A0include/asm-generic/ioremap-nopost.h=A0=A0|=A0=A09 ++++\n",
-  "> > > > =A0include/asm-generic/pgtable.h=A0=A0=A0=A0=A0=A0=A0=A0=A0|=A0=A04=\n",
-  " ++\n",
-  "> > > > =A0include/linux/device.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=\n",
-  "=A0=A0|=A0=A02 +\n",
-  "> > > > =A0include/linux/io.h=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=\n",
-  "=A0=A0=A0=A0=A0|=A0=A02 +\n",
-  "> > > > =A0lib/devres.c=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=\n",
-  "=A0=A0=A0=A0=A0=A0=A0=A0=A0| 84\n",
+  "> > > > \302\240 lib: implement Devres ioremap_nopost() interface\n",
+  "> > > > \n",
+  "> > > > \302\240Documentation/driver-model/devres.txt |\302\240\302\2403 ++\n",
+  "> > > > \302\240arch/alpha/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2401 +\n",
+  "> > > > \302\240arch/arc/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2401 +\n",
+  "> > > > \302\240arch/arm/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2409 ++++\n",
+  "> > > > \302\240arch/arm/mm/ioremap.c\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2407 +++\n",
+  "> > > > \302\240arch/arm/mm/nommu.c\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2409 ++++\n",
+  "> > > > \302\240arch/arm64/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240| 12 +++++\n",
+  "> > > > \302\240arch/avr32/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2401 +\n",
+  "> > > > \302\240arch/cris/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2401 +\n",
+  "> > > > \302\240arch/frv/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2401 +\n",
+  "> > > > \302\240arch/hexagon/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2402 +\n",
+  "> > > > \302\240arch/ia64/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2401 +\n",
+  "> > > > \302\240arch/m32r/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2401 +\n",
+  "> > > > \302\240arch/m68k/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2401 +\n",
+  "> > > > \302\240arch/metag/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2402 +\n",
+  "> > > > \302\240arch/microblaze/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2401 +\n",
+  "> > > > \302\240arch/mips/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2401 +\n",
+  "> > > > \302\240arch/mn10300/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2401 +\n",
+  "> > > > \302\240arch/nios2/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2401 +\n",
+  "> > > > \302\240arch/openrisc/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2402 +\n",
+  "> > > > \302\240arch/parisc/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2401 +\n",
+  "> > > > \302\240arch/powerpc/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2401 +\n",
+  "> > > > \302\240arch/s390/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2401 +\n",
+  "> > > > \302\240arch/sh/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2401 +\n",
+  "> > > > \302\240arch/sparc/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2401 +\n",
+  "> > > > \302\240arch/tile/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2401 +\n",
+  "> > > > \302\240arch/unicore32/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2401 +\n",
+  "> > > > \302\240arch/x86/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2401 +\n",
+  "> > > > \302\240arch/xtensa/include/asm/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2401 +\n",
+  "> > > > \302\240drivers/pci/pci.c\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2404 +-\n",
+  "> > > > \302\240include/asm-generic/ioremap-nopost.h\302\240\302\240|\302\240\302\2409 ++++\n",
+  "> > > > \302\240include/asm-generic/pgtable.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2404 ++\n",
+  "> > > > \302\240include/linux/device.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2402 +\n",
+  "> > > > \302\240include/linux/io.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2402 +\n",
+  "> > > > \302\240lib/devres.c\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240| 84\n",
   "> > > > +++++++++++++++++++++++++++++++++--\n",
-  "> > > > =A035 files changed, 167 insertions(+), 5 deletions(-)\n",
-  "> > > > =A0create mode 100644 include/asm-generic/ioremap-nopost.h\n",
-  "> > > > =\n",
-  "\n",
-  "\n",
-  "_______________________________________________\n",
-  "linux-arm-kernel mailing list\n",
-  "linux-arm-kernel\@lists.infradead.org\n",
-  "http://lists.infradead.org/mailman/listinfo/linux-arm-kernel"
+  "> > > > \302\24035 files changed, 167 insertions(+), 5 deletions(-)\n",
+  "> > > > \302\240create mode 100644 include/asm-generic/ioremap-nopost.h\n",
+  "> > > >"
 ]
 
-9f7eb81b472b99f3c9dfe490d704d434a283213475add6a96f8d9d5844e10730
+91598f28cf286d91bcd232aacbd89a9a04e767d05da0c21d35f47037845a5ff0
