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From: Andres Rodriguez <andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
Subject: [PATCH 03/17] drm/amdgpu: detect timeout error when deactivating hqd
Date: Thu, 13 Apr 2017 17:35:28 -0400	[thread overview]
Message-ID: <20170413213542.18802-4-andresx7@gmail.com> (raw)
In-Reply-To: <20170413213542.18802-1-andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

Handle HQD deactivation timeouts instead of ignoring them.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 20 +++++++++++++++++---
 1 file changed, 17 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index b670302..cd1af26 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -4947,75 +4947,89 @@ static int gfx_v8_0_mqd_commit(struct amdgpu_ring *ring)
 
 	/* enable the doorbell if requested */
 	WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL, mqd->cp_hqd_pq_doorbell_control);
 
 	/* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */
 	WREG32(mmCP_HQD_PQ_WPTR, mqd->cp_hqd_pq_wptr);
 
 	/* set the vmid for the queue */
 	WREG32(mmCP_HQD_VMID, mqd->cp_hqd_vmid);
 
 	WREG32(mmCP_HQD_PERSISTENT_STATE, mqd->cp_hqd_persistent_state);
 
 	/* activate the queue */
 	WREG32(mmCP_HQD_ACTIVE, mqd->cp_hqd_active);
 
 	return 0;
 }
 
 static int gfx_v8_0_kiq_init_queue(struct amdgpu_ring *ring)
 {
+	int r = 0;
 	struct amdgpu_device *adev = ring->adev;
 	struct vi_mqd *mqd = ring->mqd_ptr;
 	int mqd_idx = AMDGPU_MAX_COMPUTE_RINGS;
 
 	gfx_v8_0_kiq_setting(ring);
 
 	if (adev->gfx.in_reset) { /* for GPU_RESET case */
 		/* reset MQD to a clean status */
 		if (adev->gfx.mec.mqd_backup[mqd_idx])
 			memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(*mqd));
 
 		/* reset ring buffer */
 		ring->wptr = 0;
 		amdgpu_ring_clear_ring(ring);
 
 		mutex_lock(&adev->srbm_mutex);
 		vi_srbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
-		gfx_v8_0_deactivate_hqd(adev, 1);
+		r = gfx_v8_0_deactivate_hqd(adev, 1);
+		if (r) {
+			dev_err(adev->dev, "failed to deactivate ring %s\n", ring->name);
+			goto out_unlock;
+		}
 		gfx_v8_0_mqd_commit(ring);
 		vi_srbm_select(adev, 0, 0, 0, 0);
 		mutex_unlock(&adev->srbm_mutex);
 	} else {
 		mutex_lock(&adev->srbm_mutex);
 		vi_srbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
 		gfx_v8_0_mqd_init(ring);
-		gfx_v8_0_deactivate_hqd(adev, 1);
+		r = gfx_v8_0_deactivate_hqd(adev, 1);
+		if (r) {
+			dev_err(adev->dev, "failed to deactivate ring %s\n", ring->name);
+			goto out_unlock;
+		}
 		gfx_v8_0_mqd_commit(ring);
 		vi_srbm_select(adev, 0, 0, 0, 0);
 		mutex_unlock(&adev->srbm_mutex);
 
 		if (adev->gfx.mec.mqd_backup[mqd_idx])
 			memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(*mqd));
 	}
 
-	return 0;
+	return r;
+
+out_unlock:
+	vi_srbm_select(adev, 0, 0, 0, 0);
+	mutex_unlock(&adev->srbm_mutex);
+	return r;
 }
 
 static int gfx_v8_0_kcq_init_queue(struct amdgpu_ring *ring)
 {
 	struct amdgpu_device *adev = ring->adev;
 	struct vi_mqd *mqd = ring->mqd_ptr;
 	int mqd_idx = ring - &adev->gfx.compute_ring[0];
 
 	if (!adev->gfx.in_reset && !adev->gfx.in_suspend) {
 		mutex_lock(&adev->srbm_mutex);
 		vi_srbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
 		gfx_v8_0_mqd_init(ring);
 		vi_srbm_select(adev, 0, 0, 0, 0);
 		mutex_unlock(&adev->srbm_mutex);
 
 		if (adev->gfx.mec.mqd_backup[mqd_idx])
 			memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(*mqd));
 	} else if (adev->gfx.in_reset) { /* for GPU_RESET case */
 		/* reset MQD to a clean status */
 		if (adev->gfx.mec.mqd_backup[mqd_idx])
-- 
2.9.3

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  parent reply	other threads:[~2017-04-13 21:35 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-13 21:35 [PATCH split] Improve pipe split between amdgpu and amdkfd Andres Rodriguez
     [not found] ` <20170413213542.18802-1-andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-04-13 21:35   ` [PATCH 01/17] drm/amdgpu: clarify MEC_HPD_SIZE is specific to a gfx generation Andres Rodriguez
2017-04-13 21:35   ` [PATCH 02/17] drm/amdgpu: refactor MQD/HQD initialization v3 Andres Rodriguez
     [not found]     ` <20170413213542.18802-3-andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-04-17 20:13       ` Andres Rodriguez
2017-04-13 21:35   ` Andres Rodriguez [this message]
2017-04-13 21:35   ` [PATCH 04/17] drm/amdgpu: remove duplicate definition of cik_mqd Andres Rodriguez
2017-04-13 21:35   ` [PATCH 05/17] drm/amdgpu: unify MQD programming sequence for kfd and amdgpu v2 Andres Rodriguez
2017-04-13 21:35   ` [PATCH 06/17] drm/amdgpu: fix kgd_hqd_load failing to update shadow_wptr Andres Rodriguez
2017-04-13 21:35   ` [PATCH 07/17] drm/amdgpu: rename rdev to adev Andres Rodriguez
2017-04-13 21:35   ` [PATCH 08/17] drm/radeon: take ownership of pipe initialization Andres Rodriguez
2017-04-13 21:35   ` [PATCH 09/17] drm/amdgpu: take ownership of per-pipe configuration v2 Andres Rodriguez
     [not found]     ` <20170413213542.18802-10-andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-04-15 12:37       ` Oded Gabbay
     [not found]         ` <CAFCwf12haVgYLxxcqMqTd-GX7KjxtZXD1Stuqj87HAP32TdvXQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-04-16  0:12           ` Andres Rodriguez
     [not found]             ` <CAFQ_0eED3HxUN8Sz0buefckSmVWvMwBD0mFk_GA1XeLABdsTnw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-04-16  5:25               ` Oded Gabbay
     [not found]                 ` <CAFQ_0eE1O+SS_ucS-8Rjqm3S4aDjZq1r0OfzZhTKE=9Z12xMZQ@mail.gmail.com>
     [not found]                   ` <CAFQ_0eE1O+SS_ucS-8Rjqm3S4aDjZq1r0OfzZhTKE=9Z12xMZQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-04-16 14:51                     ` Andres Rodriguez
     [not found]                 ` <CAFCwf12mXeEHd9pb9L84wibaKC0zrvO6dHggQ-ePP7odN=oj6A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-04-17 22:46                   ` Andres Rodriguez
     [not found]                     ` <b145c07f-311b-5002-ce1d-37871d7a6968-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-04-18 19:41                       ` Oded Gabbay
2017-04-13 21:35   ` [PATCH 10/17] drm/amdgpu: allow split of queues with kfd at queue granularity v4 Andres Rodriguez
2017-04-13 21:35   ` [PATCH 11/17] drm/amdgpu: teach amdgpu how to enable interrupts for any pipe v3 Andres Rodriguez
2017-04-13 21:35   ` [PATCH 12/17] drm/amdkfd: allow split HQD on per-queue granularity v4 Andres Rodriguez
2017-04-13 21:35   ` [PATCH 13/17] drm/amdgpu: remove duplicate magic constants from amdgpu_amdkfd_gfx*.c Andres Rodriguez
2017-04-13 21:35   ` [PATCH 14/17] drm/amdgpu: allocate queues horizontally across pipes Andres Rodriguez
2017-04-13 21:35   ` [PATCH 15/17] drm/amdgpu: remove hardcoded queue_mask in PACKET3_SET_RESOURCES Andres Rodriguez
2017-04-13 21:35   ` [PATCH 16/17] drm/amdgpu: avoid KIQ clashing with compute or KFD queues v2 Andres Rodriguez
2017-04-13 21:35   ` [PATCH 17/17] drm/amdgpu: new queue policy, take first 2 queues of each pipe v2 Andres Rodriguez
2017-04-13 21:39   ` [PATCH split] Improve pipe split between amdgpu and amdkfd Andres Rodriguez
2017-04-17 22:47 [PATCH] Improve pipe split between amdgpu and amdkfd v2 Andres Rodriguez
     [not found] ` <20170417224813.3173-1-andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-04-17 22:47   ` [PATCH 03/17] drm/amdgpu: detect timeout error when deactivating hqd Andres Rodriguez
2017-04-21 20:02 [PATCH] Improve pipe split between amdgpu and amdkfd v4 Andres Rodriguez
     [not found] ` <20170421200242.3072-1-andresx7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-04-21 20:02   ` [PATCH 03/17] drm/amdgpu: detect timeout error when deactivating hqd Andres Rodriguez

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