From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756249AbdDQMEL (ORCPT ); Mon, 17 Apr 2017 08:04:11 -0400 Received: from hermes.aosc.io ([199.195.250.187]:56333 "EHLO hermes.aosc.io" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753362AbdDQMEH (ORCPT ); Mon, 17 Apr 2017 08:04:07 -0400 From: Icenowy Zheng To: Lee Jones , Rob Herring , Chen-Yu Tsai , Maxime Ripard , Liam Girdwood , Mark Brown Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [PATCH v3 12/12] arm64: allwinner: a64: enable Wi-Fi for Pine64 Date: Mon, 17 Apr 2017 19:57:47 +0800 Message-Id: <20170417115747.7300-13-icenowy@aosc.io> In-Reply-To: <20170417115747.7300-1-icenowy@aosc.io> References: <20170417115747.7300-1-icenowy@aosc.io> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Wi-Fi module of Pine64 is powered via DLDO4 and ELDO1 (the latter one provides I/O voltage). Add device node for it. Although the Wi-Fi module is an external module which should be inserted to a header, according to my personal talk with TL Lim, he does not want this header to be used as GPIO (so it's with 2.0mm pitch, not 2.54mm as other GPIO headers). Signed-off-by: Icenowy Zheng --- Changes in v3: - Added explaination on 2.0mm pitch. arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts index 7da074f95065..9d90bb32aa87 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts @@ -64,6 +64,11 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ + }; }; &ehci1 { @@ -91,6 +96,17 @@ status = "okay"; }; +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + vmmc-supply = <®_dldo4>; + vqmmc-supply = <®_eldo1>; + mmc-pwrseq = <&wifi_pwrseq>; + non-removable; + bus-width = <4>; + status = "okay"; +}; + &ohci1 { status = "okay"; }; -- 2.12.2 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Icenowy Zheng Subject: [PATCH v3 12/12] arm64: allwinner: a64: enable Wi-Fi for Pine64 Date: Mon, 17 Apr 2017 19:57:47 +0800 Message-ID: <20170417115747.7300-13-icenowy@aosc.io> References: <20170417115747.7300-1-icenowy@aosc.io> Return-path: In-Reply-To: <20170417115747.7300-1-icenowy-h8G6r0blFSE@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Lee Jones , Rob Herring , Chen-Yu Tsai , Maxime Ripard , Liam Girdwood , Mark Brown Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org, Icenowy Zheng List-Id: devicetree@vger.kernel.org The Wi-Fi module of Pine64 is powered via DLDO4 and ELDO1 (the latter one provides I/O voltage). Add device node for it. Although the Wi-Fi module is an external module which should be inserted to a header, according to my personal talk with TL Lim, he does not want this header to be used as GPIO (so it's with 2.0mm pitch, not 2.54mm as other GPIO headers). Signed-off-by: Icenowy Zheng --- Changes in v3: - Added explaination on 2.0mm pitch. arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts index 7da074f95065..9d90bb32aa87 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts @@ -64,6 +64,11 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ + }; }; &ehci1 { @@ -91,6 +96,17 @@ status = "okay"; }; +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + vmmc-supply = <®_dldo4>; + vqmmc-supply = <®_eldo1>; + mmc-pwrseq = <&wifi_pwrseq>; + non-removable; + bus-width = <4>; + status = "okay"; +}; + &ohci1 { status = "okay"; }; -- 2.12.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: icenowy@aosc.io (Icenowy Zheng) Date: Mon, 17 Apr 2017 19:57:47 +0800 Subject: [PATCH v3 12/12] arm64: allwinner: a64: enable Wi-Fi for Pine64 In-Reply-To: <20170417115747.7300-1-icenowy@aosc.io> References: <20170417115747.7300-1-icenowy@aosc.io> Message-ID: <20170417115747.7300-13-icenowy@aosc.io> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org The Wi-Fi module of Pine64 is powered via DLDO4 and ELDO1 (the latter one provides I/O voltage). Add device node for it. Although the Wi-Fi module is an external module which should be inserted to a header, according to my personal talk with TL Lim, he does not want this header to be used as GPIO (so it's with 2.0mm pitch, not 2.54mm as other GPIO headers). Signed-off-by: Icenowy Zheng --- Changes in v3: - Added explaination on 2.0mm pitch. arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts index 7da074f95065..9d90bb32aa87 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts @@ -64,6 +64,11 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ + }; }; &ehci1 { @@ -91,6 +96,17 @@ status = "okay"; }; +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + vmmc-supply = <®_dldo4>; + vqmmc-supply = <®_eldo1>; + mmc-pwrseq = <&wifi_pwrseq>; + non-removable; + bus-width = <4>; + status = "okay"; +}; + &ohci1 { status = "okay"; }; -- 2.12.2