From: Chris Wilson <chris@chris-wilson.co.uk>
To: Tvrtko Ursulin <tursulin@ursulin.net>,
Intel-gfx@lists.freedesktop.org,
Tvrtko Ursulin <tvrtko.ursulin@intel.com>,
"Rogozhkin, Dmitry V" <dmitry.v.rogozhkin@intel.com>
Subject: Re: [PATCH i-g-t v4] benchmarks/gem_wsim: Command submission workload simulator
Date: Thu, 20 Apr 2017 15:33:17 +0100 [thread overview]
Message-ID: <20170420143317.GG15499@nuc-i3427.alporthouse.com> (raw)
In-Reply-To: <20170420142327.GF15499@nuc-i3427.alporthouse.com>
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On Thu, Apr 20, 2017 at 03:23:27PM +0100, Chris Wilson wrote:
> You either want to reset presumed_offset=-1 each time, or better for all
> concerned write the correct address alongside the seqno (which also
> enables NORELOC).
>
> Delta incoming.
See attached.
Next concern is that I have full rings which implies that we are not
waiting on each batch before resubmitting with a new seqno?
If I throw a assert(!busy(batch_bo)) before the *b->mapped_seqno am I
going to be upset?
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
[-- Attachment #2: 0001-seqno-reloc.patch --]
[-- Type: text/x-diff, Size: 2677 bytes --]
>From 5bf424c2719e81f926b74f4136610cbdfd26a4d8 Mon Sep 17 00:00:00 2001
From: Chris Wilson <chris@chris-wilson.co.uk>
Date: Thu, 20 Apr 2017 15:30:07 +0100
Subject: [PATCH] seqno-reloc
---
benchmarks/gem_wsim.c | 17 +++++++++++------
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
index adf2d6de..e616335b 100644
--- a/benchmarks/gem_wsim.c
+++ b/benchmarks/gem_wsim.c
@@ -45,6 +45,8 @@
#include "drmtest.h"
#include "intel_io.h"
+#define LOCAL_I915_GEM_DOMAIN_WC 0x80
+
enum intel_engine_id {
RCS,
BCS,
@@ -86,7 +88,9 @@ struct w_step
struct drm_i915_gem_relocation_entry reloc;
unsigned long bb_sz;
uint32_t bb_handle;
- uint32_t *mapped_batch, *mapped_seqno;
+ uint32_t *mapped_batch;
+ uint64_t *mapped_address;
+ uint32_t *mapped_seqno;
unsigned int mapped_len;
} b[2]; /* One for each VCS when load balancing */
};
@@ -405,7 +409,8 @@ terminate_bb(struct w_step *w, struct w_step_eb *b, enum intel_engine_id engine,
mmap_len += cmd_offset - mmap_start;
gem_set_domain(fd, b->bb_handle,
- I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
+ LOCAL_I915_GEM_DOMAIN_WC,
+ LOCAL_I915_GEM_DOMAIN_WC);
ptr = gem_mmap__wc(fd, b->bb_handle, mmap_start, mmap_len, PROT_WRITE);
cs = (uint32_t *)((char *)ptr + cmd_offset - mmap_start);
@@ -415,6 +420,7 @@ terminate_bb(struct w_step *w, struct w_step_eb *b, enum intel_engine_id engine,
b->reloc.delta = (engine - VCS1) * sizeof(uint32_t);
*cs++ = MI_STORE_DWORD_IMM;
+ b->mapped_address = (uint64_t *)cs;
*cs++ = 0;
*cs++ = 0;
b->mapped_seqno = cs;
@@ -469,7 +475,6 @@ alloc_step_batch(struct workload *wrk, struct w_step *w, struct w_step_eb *b,
}
if (flags & SEQNO) {
- b->reloc.presumed_offset = -1;
b->reloc.target_handle = 1;
b->obj[bb_i].relocs_ptr = to_user_pointer(&b->reloc);
b->obj[bb_i].relocation_count = 1;
@@ -485,8 +490,7 @@ alloc_step_batch(struct workload *wrk, struct w_step *w, struct w_step_eb *b,
engine = VCS1;
b->eb.flags = eb_engine_map[engine];
b->eb.flags |= I915_EXEC_HANDLE_LUT;
- if (!(flags & SEQNO))
- b->eb.flags |= I915_EXEC_NO_RELOC;
+ b->eb.flags |= I915_EXEC_NO_RELOC;
#ifdef DEBUG
printf("%u: %u:%x|%x|%x|%x %10lu flags=%llx bb=%x[%u] ctx[%u]=%u\n",
w->idx, b->eb.buffer_count, b->obj[0].handle,
@@ -628,8 +632,9 @@ static void
update_bb_seqno(struct w_step_eb *b, enum intel_engine_id engine,
uint32_t seqno)
{
- *b->mapped_seqno = seqno;
b->reloc.delta = (engine - VCS1) * sizeof(uint32_t);
+ *b->mapped_address = b->reloc.presumed_offset + b->reloc.delta;
+ *b->mapped_seqno = seqno;
}
static void
--
2.11.0
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next prev parent reply other threads:[~2017-04-20 14:33 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-31 14:58 [PATCH i-g-t 0/2] Workload simulation and tracing Tvrtko Ursulin
2017-03-31 14:58 ` [PATCH i-g-t 1/2] benchmarks/gem_wsim: Command submission workload simulator Tvrtko Ursulin
2017-03-31 15:19 ` Chris Wilson
2017-04-05 16:14 ` [PATCH i-g-t v3] " Tvrtko Ursulin
2017-04-05 16:48 ` Chris Wilson
2017-04-06 8:18 ` Tvrtko Ursulin
2017-04-06 8:55 ` Chris Wilson
2017-04-07 8:53 ` Tvrtko Ursulin
2017-04-07 9:51 ` Chris Wilson
2017-04-20 12:29 ` [PATCH i-g-t v4] " Tvrtko Ursulin
2017-04-20 14:23 ` Chris Wilson
2017-04-20 14:33 ` Chris Wilson [this message]
2017-04-20 14:45 ` Tvrtko Ursulin
2017-04-20 14:34 ` Tvrtko Ursulin
2017-04-20 15:11 ` Chris Wilson
2017-04-20 14:52 ` Chris Wilson
2017-04-20 15:06 ` Tvrtko Ursulin
2017-04-20 16:20 ` Chris Wilson
2017-04-21 15:21 ` [PATCH i-g-t v5] " Tvrtko Ursulin
2017-04-25 11:13 ` [PATCH i-g-t v6] " Tvrtko Ursulin
2017-04-25 11:35 ` Chris Wilson
2017-04-25 12:10 ` Tvrtko Ursulin
2017-04-25 12:25 ` Chris Wilson
2017-04-25 12:31 ` Chris Wilson
2017-03-31 14:58 ` [PATCH i-g-t 2/2] igt/scripts: trace.pl to parse the i915 tracepoints Tvrtko Ursulin
2017-04-24 14:42 ` [PATCH i-g-t v4] " Tvrtko Ursulin
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