[RFC/RFT PATCH 00/18] PCI: ARM/ARM64: remove pci_fixup_irqs() usage

[RFC/RFT PATCH 00/18] PCI: ARM/ARM64: remove pci_fixup_irqs() usage

[Lorenzo Pieralisi]

Current pci_fixup_irqs() usage on ARM/ARM64 host controller drivers is
flawed in that pci_fixup_irqs() allocates IRQs for all PCI devices present
in a system; those PCI devices possibly belong to different PCI bus trees
(and possibly rooted at different host bridges) and may well be enabled
(ie probed and bound to a driver) by the time pci_fixup_irqs() is called
when probing a given host bridge driver.

Furthermore, current kernel code relying on pci_fixup_irqs() to
assign legacy PCI IRQs to devices does not work at all for
hotplugged devices in that the code carrying out the IRQ fixup
is called at host bridge driver probe time, which just cannot take
into account devices hotplugged after system has booted.

By leveraging Matthew Minter's patch series (and its purpose):

http://lkml.kernel.org/r/1445576642-29624-2-git-send-email-matt@masarand.com

this series[1] adds IRQs mapping and swizzling primitives to
the struct pci_host_bridge which allows IRQs to be allocated for
for a device at probe time with host bridge specific functions,
fixing the aforementioned limitations.

Current series remove pci_fixup_irqs() usage on ARM/ARM64; removal
can be extended to other architectures provided the IRQs map/swizzle
functions are set-up properly in the respective host bridges
set-up/probe paths.

Tested on kvmtool with PCI host generic.

[1] git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/linux.git pci/pci-fixup-irqs-removal

Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Pratyush Anand <pratyush.anand@gmail.com>
Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Simon Horman <horms@verge.net.au>
Cc: Mingkai Hu <mingkai.hu@freescale.com>
Cc: Tanmay Inamdar <tinamdar@apm.com>
Cc: Murali Karicheri <m-karicheri2@ti.com>
Cc: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Cc: Wenrui Li <wenrui.li@rock-chips.com>
Cc: Shawn Lin <shawn.lin@rock-chips.com>
Cc: Minghuan Lian <minghuan.Lian@freescale.com>
Cc: Matthew Minter <matt@masarand.com>
Cc: Gabriele Paoloni <gabriele.paoloni@huawei.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Joao Pinto <Joao.Pinto@synopsys.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Stanimir Varbanov <svarbanov@mm-sol.com>
Cc: Zhou Wang <wangzhou1@hisilicon.com>
Cc: Roy Zang <tie-fei.zang@freescale.com>

Lorenzo Pieralisi (13):
  PCI: Initialize bridge release function at bridge allocation
  PCI: Add pci_free_host_bridge interface
  PCI: Introduce pci_scan_root_bus_bridge()
  ARM: PCI: bios32: Convert PCI scan API to pci_scan_root_bus_bridge()
  ARM: PCI: dove: Convert PCI scan API to pci_scan_root_bus_bridge()
  ARM: PCI: iop13xx: Convert PCI scan API to pci_scan_root_bus_bridge()
  ARM: PCI: orion5x: Convert PCI scan API to pci_scan_root_bus_bridge()
  PCI: designware: Convert PCI scan API to pci_scan_root_bus_bridge()
  PCI: aardvark: Convert PCI scan API to pci_scan_root_bus_bridge()
  PCI: rcar: Convert PCI scan API to pci_scan_root_bus_bridge()
  PCI: Remove pci_scan_root_bus_msi()
  ARM: PCI: Remove pci_fixup_irqs() call for bios32 host controllers
  ARM/ARM64: PCI: Drop pci_fixup_irqs() usage for DT based host
    controllers

Matthew Minter (5):
  PCI: Build setup-irq.o on all arches
  PCI: Add IRQ mapping function pointers to pci_host_bridge struct
  PCI: Add pci_assign_irq() function and have pci_fixup_irqs() use it
  OF/PCI: Update of_irq_parse_and_map_pci() comment
  PCI: Add a call to pci_assign_irq() in pci_device_probe()

 arch/arm/kernel/bios32.c               | 63 ++++++++++++++++++++++-----
 arch/arm/mach-dove/pcie.c              | 36 ++++++++++++----
 arch/arm/mach-iop13xx/pci.c            | 36 +++++++++++++---
 arch/arm/mach-orion5x/pci.c            | 47 ++++++++++++++------
 arch/arm64/kernel/pci.c                | 32 +++++++++++---
 drivers/of/of_pci_irq.c                |  3 +-
 drivers/pci/Makefile                   | 17 +-------
 drivers/pci/dwc/pcie-designware-host.c | 41 +++++++++---------
 drivers/pci/host/pci-aardvark.c        | 33 +++++++++++---
 drivers/pci/host/pci-host-common.c     |  4 --
 drivers/pci/host/pci-tegra.c           |  3 +-
 drivers/pci/host/pci-versatile.c       |  1 -
 drivers/pci/host/pcie-altera.c         |  1 -
 drivers/pci/host/pcie-iproc.c          | 43 ++++++++++++-------
 drivers/pci/host/pcie-rcar.c           | 28 +++++++-----
 drivers/pci/host/pcie-xilinx.c         |  3 --
 drivers/pci/pci-driver.c               |  2 +
 drivers/pci/probe.c                    | 78 ++++++++++++++++++++++------------
 drivers/pci/setup-irq.c                | 45 +++++++++++++++-----
 include/linux/pci.h                    |  9 ++--
 20 files changed, 363 insertions(+), 162 deletions(-)

-- 
2.10.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 00/18] PCI: ARM/ARM64: remove pci_fixup_irqs() usage

[Lorenzo Pieralisi]

Current pci_fixup_irqs() usage on ARM/ARM64 host controller drivers is
flawed in that pci_fixup_irqs() allocates IRQs for all PCI devices present
in a system; those PCI devices possibly belong to different PCI bus trees
(and possibly rooted at different host bridges) and may well be enabled
(ie probed and bound to a driver) by the time pci_fixup_irqs() is called
when probing a given host bridge driver.

Furthermore, current kernel code relying on pci_fixup_irqs() to
assign legacy PCI IRQs to devices does not work at all for
hotplugged devices in that the code carrying out the IRQ fixup
is called at host bridge driver probe time, which just cannot take
into account devices hotplugged after system has booted.

By leveraging Matthew Minter's patch series (and its purpose):

http://lkml.kernel.org/r/1445576642-29624-2-git-send-email-matt at masarand.com

this series[1] adds IRQs mapping and swizzling primitives to
the struct pci_host_bridge which allows IRQs to be allocated for
for a device at probe time with host bridge specific functions,
fixing the aforementioned limitations.

Current series remove pci_fixup_irqs() usage on ARM/ARM64; removal
can be extended to other architectures provided the IRQs map/swizzle
functions are set-up properly in the respective host bridges
set-up/probe paths.

Tested on kvmtool with PCI host generic.

[1] git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/linux.git pci/pci-fixup-irqs-removal

Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Pratyush Anand <pratyush.anand@gmail.com>
Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Simon Horman <horms@verge.net.au>
Cc: Mingkai Hu <mingkai.hu@freescale.com>
Cc: Tanmay Inamdar <tinamdar@apm.com>
Cc: Murali Karicheri <m-karicheri2@ti.com>
Cc: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Cc: Wenrui Li <wenrui.li@rock-chips.com>
Cc: Shawn Lin <shawn.lin@rock-chips.com>
Cc: Minghuan Lian <minghuan.Lian@freescale.com>
Cc: Matthew Minter <matt@masarand.com>
Cc: Gabriele Paoloni <gabriele.paoloni@huawei.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Joao Pinto <Joao.Pinto@synopsys.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Stanimir Varbanov <svarbanov@mm-sol.com>
Cc: Zhou Wang <wangzhou1@hisilicon.com>
Cc: Roy Zang <tie-fei.zang@freescale.com>

Lorenzo Pieralisi (13):
  PCI: Initialize bridge release function at bridge allocation
  PCI: Add pci_free_host_bridge interface
  PCI: Introduce pci_scan_root_bus_bridge()
  ARM: PCI: bios32: Convert PCI scan API to pci_scan_root_bus_bridge()
  ARM: PCI: dove: Convert PCI scan API to pci_scan_root_bus_bridge()
  ARM: PCI: iop13xx: Convert PCI scan API to pci_scan_root_bus_bridge()
  ARM: PCI: orion5x: Convert PCI scan API to pci_scan_root_bus_bridge()
  PCI: designware: Convert PCI scan API to pci_scan_root_bus_bridge()
  PCI: aardvark: Convert PCI scan API to pci_scan_root_bus_bridge()
  PCI: rcar: Convert PCI scan API to pci_scan_root_bus_bridge()
  PCI: Remove pci_scan_root_bus_msi()
  ARM: PCI: Remove pci_fixup_irqs() call for bios32 host controllers
  ARM/ARM64: PCI: Drop pci_fixup_irqs() usage for DT based host
    controllers

Matthew Minter (5):
  PCI: Build setup-irq.o on all arches
  PCI: Add IRQ mapping function pointers to pci_host_bridge struct
  PCI: Add pci_assign_irq() function and have pci_fixup_irqs() use it
  OF/PCI: Update of_irq_parse_and_map_pci() comment
  PCI: Add a call to pci_assign_irq() in pci_device_probe()

 arch/arm/kernel/bios32.c               | 63 ++++++++++++++++++++++-----
 arch/arm/mach-dove/pcie.c              | 36 ++++++++++++----
 arch/arm/mach-iop13xx/pci.c            | 36 +++++++++++++---
 arch/arm/mach-orion5x/pci.c            | 47 ++++++++++++++------
 arch/arm64/kernel/pci.c                | 32 +++++++++++---
 drivers/of/of_pci_irq.c                |  3 +-
 drivers/pci/Makefile                   | 17 +-------
 drivers/pci/dwc/pcie-designware-host.c | 41 +++++++++---------
 drivers/pci/host/pci-aardvark.c        | 33 +++++++++++---
 drivers/pci/host/pci-host-common.c     |  4 --
 drivers/pci/host/pci-tegra.c           |  3 +-
 drivers/pci/host/pci-versatile.c       |  1 -
 drivers/pci/host/pcie-altera.c         |  1 -
 drivers/pci/host/pcie-iproc.c          | 43 ++++++++++++-------
 drivers/pci/host/pcie-rcar.c           | 28 +++++++-----
 drivers/pci/host/pcie-xilinx.c         |  3 --
 drivers/pci/pci-driver.c               |  2 +
 drivers/pci/probe.c                    | 78 ++++++++++++++++++++++------------
 drivers/pci/setup-irq.c                | 45 +++++++++++++++-----
 include/linux/pci.h                    |  9 ++--
 20 files changed, 363 insertions(+), 162 deletions(-)

-- 
2.10.0

[RFC/RFT PATCH 01/18] PCI: Initialize bridge release function at bridge allocation

[Lorenzo Pieralisi]

The introduction of pci_register_host_bridge() kernel interface
allows PCI host controller drivers to create the struct pci_host_bridge
object, initialize it and register it with the kernel so that its
corresponding PCI bus can be scanned and its devices probed.

The host bridge device release function pci_release_host_bridge_dev is a
static function common for all struct pci_host_bridge allocated objects,
so in its current form cannot be used by PCI host bridge controllers
drivers to initialize the allocated struct pci_host_bridge, which
leaves struct pci_host_bridge devices release function uninitialized.

Since pci_release_host_bridge_dev is a function common to all PCI
host bridge objects, initialize it in pci_alloc_host_bridge() (ie
common host bridge allocation interface) so that all struct
pci_host_bridge objects have their release function initialized by
default at allocation time, removing the need for exporting the
common pci_release_host_bridge_dev function to other compilation
units.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Bjorn Helgaas <bhelgaas@google.com>
---
 drivers/pci/probe.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index dfc9a27..d0ddb69 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -531,6 +531,7 @@ struct pci_host_bridge *pci_alloc_host_bridge(size_t priv)
 		return NULL;
 
 	INIT_LIST_HEAD(&bridge->windows);
+	bridge->dev.release = pci_release_host_bridge_dev;
 
 	return bridge;
 }
@@ -2317,7 +2318,6 @@ static struct pci_bus *pci_create_root_bus_msi(struct device *parent,
 		return NULL;
 
 	bridge->dev.parent = parent;
-	bridge->dev.release = pci_release_host_bridge_dev;
 
 	list_splice_init(resources, &bridge->windows);
 	bridge->sysdata = sysdata;
-- 
2.10.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 01/18] PCI: Initialize bridge release function at bridge allocation

[Lorenzo Pieralisi]

The introduction of pci_register_host_bridge() kernel interface
allows PCI host controller drivers to create the struct pci_host_bridge
object, initialize it and register it with the kernel so that its
corresponding PCI bus can be scanned and its devices probed.

The host bridge device release function pci_release_host_bridge_dev is a
static function common for all struct pci_host_bridge allocated objects,
so in its current form cannot be used by PCI host bridge controllers
drivers to initialize the allocated struct pci_host_bridge, which
leaves struct pci_host_bridge devices release function uninitialized.

Since pci_release_host_bridge_dev is a function common to all PCI
host bridge objects, initialize it in pci_alloc_host_bridge() (ie
common host bridge allocation interface) so that all struct
pci_host_bridge objects have their release function initialized by
default at allocation time, removing the need for exporting the
common pci_release_host_bridge_dev function to other compilation
units.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Bjorn Helgaas <bhelgaas@google.com>
---
 drivers/pci/probe.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index dfc9a27..d0ddb69 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -531,6 +531,7 @@ struct pci_host_bridge *pci_alloc_host_bridge(size_t priv)
 		return NULL;
 
 	INIT_LIST_HEAD(&bridge->windows);
+	bridge->dev.release = pci_release_host_bridge_dev;
 
 	return bridge;
 }
@@ -2317,7 +2318,6 @@ static struct pci_bus *pci_create_root_bus_msi(struct device *parent,
 		return NULL;
 
 	bridge->dev.parent = parent;
-	bridge->dev.release = pci_release_host_bridge_dev;
 
 	list_splice_init(resources, &bridge->windows);
 	bridge->sysdata = sysdata;
-- 
2.10.0

[RFC/RFT PATCH 02/18] PCI: Add pci_free_host_bridge interface

[Lorenzo Pieralisi]

Commit a52d1443bba1 ("PCI: Export host bridge registration interface")
exported the pci_alloc_host_bridge() interface so that PCI host
controllers drivers can make use of it.

Introduce pci_alloc_host_bridge() kernel counterpart to free the
host bridge data structures, pci_free_host_bridge(), export it
and update kernel functions releasing host bridge objects allocated
memory to make use of it.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Bjorn Helgaas <bhelgaas@google.com>
---
 drivers/pci/probe.c | 11 ++++++++---
 include/linux/pci.h |  1 +
 2 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index d0ddb69..7e4ffc4 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -517,9 +517,7 @@ static void pci_release_host_bridge_dev(struct device *dev)
 	if (bridge->release_fn)
 		bridge->release_fn(bridge);
 
-	pci_free_resource_list(&bridge->windows);
-
-	kfree(bridge);
+	pci_free_host_bridge(bridge);
 }
 
 struct pci_host_bridge *pci_alloc_host_bridge(size_t priv)
@@ -537,6 +535,13 @@ struct pci_host_bridge *pci_alloc_host_bridge(size_t priv)
 }
 EXPORT_SYMBOL(pci_alloc_host_bridge);
 
+void pci_free_host_bridge(struct pci_host_bridge *bridge)
+{
+	pci_free_resource_list(&bridge->windows);
+
+	kfree(bridge);
+}
+EXPORT_SYMBOL(pci_free_host_bridge);
 static const unsigned char pcix_bus_speed[] = {
 	PCI_SPEED_UNKNOWN,		/* 0 */
 	PCI_SPEED_66MHz_PCIX,		/* 1 */
diff --git a/include/linux/pci.h b/include/linux/pci.h
index eb3da1a..99878a9 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -450,6 +450,7 @@ static inline struct pci_host_bridge *pci_host_bridge_from_priv(void *priv)
 }
 
 struct pci_host_bridge *pci_alloc_host_bridge(size_t priv);
+void pci_free_host_bridge(struct pci_host_bridge *bridge);
 int pci_register_host_bridge(struct pci_host_bridge *bridge);
 struct pci_host_bridge *pci_find_host_bridge(struct pci_bus *bus);
 
-- 
2.10.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 02/18] PCI: Add pci_free_host_bridge interface

[Lorenzo Pieralisi]

Commit a52d1443bba1 ("PCI: Export host bridge registration interface")
exported the pci_alloc_host_bridge() interface so that PCI host
controllers drivers can make use of it.

Introduce pci_alloc_host_bridge() kernel counterpart to free the
host bridge data structures, pci_free_host_bridge(), export it
and update kernel functions releasing host bridge objects allocated
memory to make use of it.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Bjorn Helgaas <bhelgaas@google.com>
---
 drivers/pci/probe.c | 11 ++++++++---
 include/linux/pci.h |  1 +
 2 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index d0ddb69..7e4ffc4 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -517,9 +517,7 @@ static void pci_release_host_bridge_dev(struct device *dev)
 	if (bridge->release_fn)
 		bridge->release_fn(bridge);
 
-	pci_free_resource_list(&bridge->windows);
-
-	kfree(bridge);
+	pci_free_host_bridge(bridge);
 }
 
 struct pci_host_bridge *pci_alloc_host_bridge(size_t priv)
@@ -537,6 +535,13 @@ struct pci_host_bridge *pci_alloc_host_bridge(size_t priv)
 }
 EXPORT_SYMBOL(pci_alloc_host_bridge);
 
+void pci_free_host_bridge(struct pci_host_bridge *bridge)
+{
+	pci_free_resource_list(&bridge->windows);
+
+	kfree(bridge);
+}
+EXPORT_SYMBOL(pci_free_host_bridge);
 static const unsigned char pcix_bus_speed[] = {
 	PCI_SPEED_UNKNOWN,		/* 0 */
 	PCI_SPEED_66MHz_PCIX,		/* 1 */
diff --git a/include/linux/pci.h b/include/linux/pci.h
index eb3da1a..99878a9 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -450,6 +450,7 @@ static inline struct pci_host_bridge *pci_host_bridge_from_priv(void *priv)
 }
 
 struct pci_host_bridge *pci_alloc_host_bridge(size_t priv);
+void pci_free_host_bridge(struct pci_host_bridge *bridge);
 int pci_register_host_bridge(struct pci_host_bridge *bridge);
 struct pci_host_bridge *pci_find_host_bridge(struct pci_bus *bus);
 
-- 
2.10.0

[RFC/RFT PATCH 03/18] PCI: Introduce pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

Current pci_scan_root_bus() interface is made up of two main
code paths:

- pci_create_root_bus()
- pci_scan_child_bus()

pci_create_root_bus() is a wrapper function that allows to create
a struct pci_host_bridge structure, initialize it with the passed
parameters and register it with the kernel.

As the struct pci_host_bridge require additional struct members,
pci_create_root_bus() parameters list has grown in time, making
it unwieldy to add further parameters to it in case the struct
pci_host_bridge gains more members fields to augment its functionality.

Since PCI core code provides functions to allocate struct
pci_host_bridge, instead of forcing the pci_create_root_bus() interface
to add new parameters to cater for new struct pci_host_bridge
functionality, it is more suitable to add an interface in PCI
core code to scan a PCI bus straight from a struct pci_host_bridge
created and customized by each specific PCI host controller driver.

Add a pci_scan_root_bus_bridge() function to allow PCI host controller
drivers to create and initialize struct pci_host_bridge and scan
the resulting bus.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Bjorn Helgaas <bhelgaas@google.com>
---
 drivers/pci/probe.c | 38 ++++++++++++++++++++++++++++++++++++++
 include/linux/pci.h |  1 +
 2 files changed, 39 insertions(+)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 7e4ffc4..c7a7f72 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -2412,6 +2412,44 @@ void pci_bus_release_busn_res(struct pci_bus *b)
 			res, ret ? "can not be" : "is");
 }
 
+int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge)
+{
+	struct resource_entry *window;
+	bool found = false;
+	struct pci_bus *b;
+	int max, bus, ret;
+
+	if (!bridge)
+		return -EINVAL;
+
+	resource_list_for_each_entry(window, &bridge->windows)
+		if (window->res->flags & IORESOURCE_BUS) {
+			found = true;
+			break;
+		}
+
+	ret = pci_register_host_bridge(bridge);
+	if (ret < 0)
+		return ret;
+
+	b = bridge->bus;
+	bus = bridge->busnr;
+
+	if (!found) {
+		dev_info(&b->dev,
+		 "No busn resource found for root bus, will use [bus %02x-ff]\n",
+			bus);
+		pci_bus_insert_busn_res(b, bus, 255);
+	}
+
+	max = pci_scan_child_bus(b);
+
+	if (!found)
+		pci_bus_update_busn_res_end(b, max);
+
+	return 0;
+}
+
 struct pci_bus *pci_scan_root_bus_msi(struct device *parent, int bus,
 		struct pci_ops *ops, void *sysdata,
 		struct list_head *resources, struct msi_controller *msi)
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 99878a9..757779a 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -847,6 +847,7 @@ struct pci_bus *pci_scan_root_bus_msi(struct device *parent, int bus,
 struct pci_bus *pci_scan_root_bus(struct device *parent, int bus,
 					     struct pci_ops *ops, void *sysdata,
 					     struct list_head *resources);
+int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge);
 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
 				int busnr);
 void pcie_update_link_speed(struct pci_bus *bus, u16 link_status);
-- 
2.10.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 03/18] PCI: Introduce pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

Current pci_scan_root_bus() interface is made up of two main
code paths:

- pci_create_root_bus()
- pci_scan_child_bus()

pci_create_root_bus() is a wrapper function that allows to create
a struct pci_host_bridge structure, initialize it with the passed
parameters and register it with the kernel.

As the struct pci_host_bridge require additional struct members,
pci_create_root_bus() parameters list has grown in time, making
it unwieldy to add further parameters to it in case the struct
pci_host_bridge gains more members fields to augment its functionality.

Since PCI core code provides functions to allocate struct
pci_host_bridge, instead of forcing the pci_create_root_bus() interface
to add new parameters to cater for new struct pci_host_bridge
functionality, it is more suitable to add an interface in PCI
core code to scan a PCI bus straight from a struct pci_host_bridge
created and customized by each specific PCI host controller driver.

Add a pci_scan_root_bus_bridge() function to allow PCI host controller
drivers to create and initialize struct pci_host_bridge and scan
the resulting bus.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Bjorn Helgaas <bhelgaas@google.com>
---
 drivers/pci/probe.c | 38 ++++++++++++++++++++++++++++++++++++++
 include/linux/pci.h |  1 +
 2 files changed, 39 insertions(+)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 7e4ffc4..c7a7f72 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -2412,6 +2412,44 @@ void pci_bus_release_busn_res(struct pci_bus *b)
 			res, ret ? "can not be" : "is");
 }
 
+int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge)
+{
+	struct resource_entry *window;
+	bool found = false;
+	struct pci_bus *b;
+	int max, bus, ret;
+
+	if (!bridge)
+		return -EINVAL;
+
+	resource_list_for_each_entry(window, &bridge->windows)
+		if (window->res->flags & IORESOURCE_BUS) {
+			found = true;
+			break;
+		}
+
+	ret = pci_register_host_bridge(bridge);
+	if (ret < 0)
+		return ret;
+
+	b = bridge->bus;
+	bus = bridge->busnr;
+
+	if (!found) {
+		dev_info(&b->dev,
+		 "No busn resource found for root bus, will use [bus %02x-ff]\n",
+			bus);
+		pci_bus_insert_busn_res(b, bus, 255);
+	}
+
+	max = pci_scan_child_bus(b);
+
+	if (!found)
+		pci_bus_update_busn_res_end(b, max);
+
+	return 0;
+}
+
 struct pci_bus *pci_scan_root_bus_msi(struct device *parent, int bus,
 		struct pci_ops *ops, void *sysdata,
 		struct list_head *resources, struct msi_controller *msi)
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 99878a9..757779a 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -847,6 +847,7 @@ struct pci_bus *pci_scan_root_bus_msi(struct device *parent, int bus,
 struct pci_bus *pci_scan_root_bus(struct device *parent, int bus,
 					     struct pci_ops *ops, void *sysdata,
 					     struct list_head *resources);
+int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge);
 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
 				int busnr);
 void pcie_update_link_speed(struct pci_bus *bus, u16 link_status);
-- 
2.10.0

[RFC/RFT PATCH 04/18] ARM: PCI: bios32: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

The introduction of pci_scan_root_bus_bridge() provides a PCI core
API to scan a PCI root bus backed by an already initialized
struct pci_host_bridge object, which simplifies the bus scan
interface and makes the PCI scan root bus interface easier to
generalize as members are added to the struct pci_host_bridge).

Convert ARM bios32 code to pci_scan_root_bus_bridge() to improve
the PCI root bus scanning interface.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Russell King <linux@armlinux.org.uk>
---
 arch/arm/kernel/bios32.c | 34 ++++++++++++++++++++++++++--------
 1 file changed, 26 insertions(+), 8 deletions(-)

diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index 2f0e077..e2095f5 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -473,7 +473,7 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
 		ret = hw->setup(nr, sys);
 
 		if (ret > 0) {
-			struct pci_host_bridge *host_bridge;
+			struct pci_host_bridge *bridge;
 
 			ret = pcibios_init_resource(nr, sys, hw->io_optional);
 			if (ret)  {
@@ -483,10 +483,31 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
 
 			if (hw->scan)
 				sys->bus = hw->scan(nr, sys);
-			else
-				sys->bus = pci_scan_root_bus_msi(parent,
-					sys->busnr, hw->ops, sys,
-					&sys->resources, hw->msi_ctrl);
+			else {
+				bridge = pci_alloc_host_bridge(0);
+				if (!bridge) {
+					kfree(sys);
+					break;
+				}
+
+				list_splice_init(&sys->resources,
+						 &bridge->windows);
+				bridge->dev.parent = parent;
+				bridge->sysdata = sys;
+				bridge->busnr = sys->busnr;
+				bridge->ops = hw->ops;
+				bridge->msi = hw->msi_ctrl;
+				bridge->align_resource =
+						hw->align_resource;
+
+				ret = pci_scan_root_bus_bridge(bridge);
+				if (ret < 0) {
+					pci_free_host_bridge(bridge);
+					break;
+				}
+
+				sys->bus = bridge->bus;
+			}
 
 			if (WARN(!sys->bus, "PCI: unable to scan bus!")) {
 				kfree(sys);
@@ -496,9 +517,6 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
 			busnr = sys->bus->busn_res.end + 1;
 
 			list_add(&sys->node, head);
-
-			host_bridge = pci_find_host_bridge(sys->bus);
-			host_bridge->align_resource = hw->align_resource;
 		} else {
 			kfree(sys);
 			if (ret < 0)
-- 
2.10.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 04/18] ARM: PCI: bios32: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

The introduction of pci_scan_root_bus_bridge() provides a PCI core
API to scan a PCI root bus backed by an already initialized
struct pci_host_bridge object, which simplifies the bus scan
interface and makes the PCI scan root bus interface easier to
generalize as members are added to the struct pci_host_bridge).

Convert ARM bios32 code to pci_scan_root_bus_bridge() to improve
the PCI root bus scanning interface.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Russell King <linux@armlinux.org.uk>
---
 arch/arm/kernel/bios32.c | 34 ++++++++++++++++++++++++++--------
 1 file changed, 26 insertions(+), 8 deletions(-)

diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index 2f0e077..e2095f5 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -473,7 +473,7 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
 		ret = hw->setup(nr, sys);
 
 		if (ret > 0) {
-			struct pci_host_bridge *host_bridge;
+			struct pci_host_bridge *bridge;
 
 			ret = pcibios_init_resource(nr, sys, hw->io_optional);
 			if (ret)  {
@@ -483,10 +483,31 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
 
 			if (hw->scan)
 				sys->bus = hw->scan(nr, sys);
-			else
-				sys->bus = pci_scan_root_bus_msi(parent,
-					sys->busnr, hw->ops, sys,
-					&sys->resources, hw->msi_ctrl);
+			else {
+				bridge = pci_alloc_host_bridge(0);
+				if (!bridge) {
+					kfree(sys);
+					break;
+				}
+
+				list_splice_init(&sys->resources,
+						 &bridge->windows);
+				bridge->dev.parent = parent;
+				bridge->sysdata = sys;
+				bridge->busnr = sys->busnr;
+				bridge->ops = hw->ops;
+				bridge->msi = hw->msi_ctrl;
+				bridge->align_resource =
+						hw->align_resource;
+
+				ret = pci_scan_root_bus_bridge(bridge);
+				if (ret < 0) {
+					pci_free_host_bridge(bridge);
+					break;
+				}
+
+				sys->bus = bridge->bus;
+			}
 
 			if (WARN(!sys->bus, "PCI: unable to scan bus!")) {
 				kfree(sys);
@@ -496,9 +517,6 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
 			busnr = sys->bus->busn_res.end + 1;
 
 			list_add(&sys->node, head);
-
-			host_bridge = pci_find_host_bridge(sys->bus);
-			host_bridge->align_resource = hw->align_resource;
 		} else {
 			kfree(sys);
 			if (ret < 0)
-- 
2.10.0

[RFC/RFT PATCH 05/18] ARM: PCI: dove: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

The introduction of pci_scan_root_bus_bridge() provides a PCI core
API to scan a PCI root bus backed by an already initialized
struct pci_host_bridge object, which simplifies the bus scan
interface and makes the PCI scan root bus interface easier to
generalize as members are added to the struct pci_host_bridge().

Convert ARM dove platform code to pci_scan_root_bus_bridge() to improve
the PCI root bus scanning interface.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/mach-dove/pcie.c | 22 ++++++++++++++++++++--
 1 file changed, 20 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c
index 91fe971..999e465 100644
--- a/arch/arm/mach-dove/pcie.c
+++ b/arch/arm/mach-dove/pcie.c
@@ -155,13 +155,31 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_ANY_ID, rc_pci_fixup);
 static struct pci_bus __init *
 dove_pcie_scan_bus(int nr, struct pci_sys_data *sys)
 {
+	struct pci_host_bridge *bridge;
+	int ret;
+
 	if (nr >= num_pcie_ports) {
 		BUG();
 		return NULL;
 	}
 
-	return pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
-				 &sys->resources);
+	bridge = pci_alloc_host_bridge(0);
+	if (!bridge)
+		return NULL;
+
+	list_splice_init(&sys->resources, &bridge->windows);
+	bridge->dev.parent = NULL;
+	bridge->sysdata = sys;
+	bridge->busnr = sys->busnr;
+	bridge->ops = &pcie_ops;
+
+	ret = pci_scan_root_bus_bridge(bridge);
+	if (ret < 0) {
+		pci_free_host_bridge(bridge);
+		return NULL;
+	}
+
+	return bridge->bus;
 }
 
 static int __init dove_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-- 
2.10.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 05/18] ARM: PCI: dove: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

The introduction of pci_scan_root_bus_bridge() provides a PCI core
API to scan a PCI root bus backed by an already initialized
struct pci_host_bridge object, which simplifies the bus scan
interface and makes the PCI scan root bus interface easier to
generalize as members are added to the struct pci_host_bridge().

Convert ARM dove platform code to pci_scan_root_bus_bridge() to improve
the PCI root bus scanning interface.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/mach-dove/pcie.c | 22 ++++++++++++++++++++--
 1 file changed, 20 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c
index 91fe971..999e465 100644
--- a/arch/arm/mach-dove/pcie.c
+++ b/arch/arm/mach-dove/pcie.c
@@ -155,13 +155,31 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_ANY_ID, rc_pci_fixup);
 static struct pci_bus __init *
 dove_pcie_scan_bus(int nr, struct pci_sys_data *sys)
 {
+	struct pci_host_bridge *bridge;
+	int ret;
+
 	if (nr >= num_pcie_ports) {
 		BUG();
 		return NULL;
 	}
 
-	return pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
-				 &sys->resources);
+	bridge = pci_alloc_host_bridge(0);
+	if (!bridge)
+		return NULL;
+
+	list_splice_init(&sys->resources, &bridge->windows);
+	bridge->dev.parent = NULL;
+	bridge->sysdata = sys;
+	bridge->busnr = sys->busnr;
+	bridge->ops = &pcie_ops;
+
+	ret = pci_scan_root_bus_bridge(bridge);
+	if (ret < 0) {
+		pci_free_host_bridge(bridge);
+		return NULL;
+	}
+
+	return bridge->bus;
 }
 
 static int __init dove_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-- 
2.10.0

[RFC/RFT PATCH 06/18] ARM: PCI: iop13xx: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

The introduction of pci_scan_root_bus_bridge() provides a PCI core
API to scan a PCI root bus backed by an already initialized
struct pci_host_bridge object, which simplifies the bus scan
interface and makes the PCI scan root bus interface easier to
generalize as members are added to the struct pci_host_bridge().

Convert ARM iop13xx platform code to pci_scan_root_bus_bridge() to
improve the PCI root bus scanning interface.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Russell King <linux@armlinux.org.uk>
---
 arch/arm/mach-iop13xx/pci.c | 34 +++++++++++++++++++++++++++-------
 1 file changed, 27 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
index 204eb44..b0a8ded 100644
--- a/arch/arm/mach-iop13xx/pci.c
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -506,8 +506,9 @@ iop13xx_pci_abort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
  */
 struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
 {
-	int which_atu;
+	int which_atu, ret;
 	struct pci_bus *bus = NULL;
+	struct pci_host_bridge *bridge;
 
 	switch (init_atu) {
 	case IOP13XX_INIT_ATU_ATUX:
@@ -528,6 +529,15 @@ struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
 		return NULL;
 	}
 
+	bridge = pci_alloc_host_bridge(0);
+	if (!bridge)
+		return NULL;
+
+	list_splice_init(&sys->resources, &bridge->windows);
+	bridge->dev.parent = NULL;
+	bridge->sysdata = sys;
+	bridge->busnr = sys->busnr;
+
 	switch (which_atu) {
 	case IOP13XX_INIT_ATU_ATUX:
 		if (time_after_eq(jiffies + msecs_to_jiffies(1000),
@@ -535,14 +545,24 @@ struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
 			while(time_before(jiffies, atux_trhfa_timeout))
 				udelay(100);
 
-		bus = pci_bus_atux = pci_scan_root_bus(NULL, sys->busnr,
-						       &iop13xx_atux_ops,
-						       sys, &sys->resources);
+		bridge->ops = &iop13xx_atux_ops;
+		ret = pci_scan_root_bus_bridge(bridge);
+		if (ret < 0) {
+			pci_free_host_bridge(bridge);
+			return NULL;
+		}
+
+		bus = pci_bus_atux = bridge->bus;
 		break;
 	case IOP13XX_INIT_ATU_ATUE:
-		bus = pci_bus_atue = pci_scan_root_bus(NULL, sys->busnr,
-						       &iop13xx_atue_ops,
-						       sys, &sys->resources);
+		bridge->ops = &iop13xx_atue_ops;
+		ret = pci_scan_root_bus_bridge(bridge);
+		if (ret < 0) {
+			pci_free_host_bridge(bridge);
+			return NULL;
+		}
+
+		bus = pci_bus_atue = bridge->bus;
 		break;
 	}
 
-- 
2.10.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 06/18] ARM: PCI: iop13xx: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

The introduction of pci_scan_root_bus_bridge() provides a PCI core
API to scan a PCI root bus backed by an already initialized
struct pci_host_bridge object, which simplifies the bus scan
interface and makes the PCI scan root bus interface easier to
generalize as members are added to the struct pci_host_bridge().

Convert ARM iop13xx platform code to pci_scan_root_bus_bridge() to
improve the PCI root bus scanning interface.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Russell King <linux@armlinux.org.uk>
---
 arch/arm/mach-iop13xx/pci.c | 34 +++++++++++++++++++++++++++-------
 1 file changed, 27 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
index 204eb44..b0a8ded 100644
--- a/arch/arm/mach-iop13xx/pci.c
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -506,8 +506,9 @@ iop13xx_pci_abort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
  */
 struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
 {
-	int which_atu;
+	int which_atu, ret;
 	struct pci_bus *bus = NULL;
+	struct pci_host_bridge *bridge;
 
 	switch (init_atu) {
 	case IOP13XX_INIT_ATU_ATUX:
@@ -528,6 +529,15 @@ struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
 		return NULL;
 	}
 
+	bridge = pci_alloc_host_bridge(0);
+	if (!bridge)
+		return NULL;
+
+	list_splice_init(&sys->resources, &bridge->windows);
+	bridge->dev.parent = NULL;
+	bridge->sysdata = sys;
+	bridge->busnr = sys->busnr;
+
 	switch (which_atu) {
 	case IOP13XX_INIT_ATU_ATUX:
 		if (time_after_eq(jiffies + msecs_to_jiffies(1000),
@@ -535,14 +545,24 @@ struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
 			while(time_before(jiffies, atux_trhfa_timeout))
 				udelay(100);
 
-		bus = pci_bus_atux = pci_scan_root_bus(NULL, sys->busnr,
-						       &iop13xx_atux_ops,
-						       sys, &sys->resources);
+		bridge->ops = &iop13xx_atux_ops;
+		ret = pci_scan_root_bus_bridge(bridge);
+		if (ret < 0) {
+			pci_free_host_bridge(bridge);
+			return NULL;
+		}
+
+		bus = pci_bus_atux = bridge->bus;
 		break;
 	case IOP13XX_INIT_ATU_ATUE:
-		bus = pci_bus_atue = pci_scan_root_bus(NULL, sys->busnr,
-						       &iop13xx_atue_ops,
-						       sys, &sys->resources);
+		bridge->ops = &iop13xx_atue_ops;
+		ret = pci_scan_root_bus_bridge(bridge);
+		if (ret < 0) {
+			pci_free_host_bridge(bridge);
+			return NULL;
+		}
+
+		bus = pci_bus_atue = bridge->bus;
 		break;
 	}
 
-- 
2.10.0

[RFC/RFT PATCH 07/18] ARM: PCI: orion5x: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

The introduction of pci_scan_root_bus_bridge() provides a PCI core
API to scan a PCI root bus backed by an already initialized
struct pci_host_bridge object, which simplifies the bus scan
interface and makes the PCI scan root bus interface easier to
generalize as members are added to the struct pci_host_bridge().

Convert ARM orion5x platform code to pci_scan_root_bus_bridge() to
improve the PCI root bus scanning interface.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/mach-orion5x/pci.c | 29 +++++++++++++++++++++++------
 1 file changed, 23 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index ecb998e..6dc4c89 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -557,13 +557,30 @@ int __init orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys)
 
 struct pci_bus __init *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys)
 {
-	if (nr == 0)
-		return pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
-					 &sys->resources);
+	struct pci_host_bridge *bridge;
+	int ret = -ENODEV;
 
-	if (nr == 1 && !orion5x_pci_disabled)
-		return pci_scan_root_bus(NULL, sys->busnr, &pci_ops, sys,
-					 &sys->resources);
+	bridge = pci_alloc_host_bridge(0);
+	if (!bridge)
+		return NULL;
+
+	list_splice_init(&sys->resources, &bridge->windows);
+	bridge->dev.parent = NULL;
+	bridge->sysdata = sys;
+	bridge->busnr = sys->busnr;
+
+	if (nr == 0) {
+		bridge->ops = &pcie_ops;
+		ret = pci_scan_root_bus_bridge(bridge);
+	}
+
+	if (nr == 1 && !orion5x_pci_disabled) {
+		bridge->ops = &pci_ops;
+		ret = pci_scan_root_bus_bridge(bridge);
+	}
+
+	if (!ret)
+		return bridge->bus;
 
 	BUG();
 	return NULL;
-- 
2.10.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 07/18] ARM: PCI: orion5x: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

The introduction of pci_scan_root_bus_bridge() provides a PCI core
API to scan a PCI root bus backed by an already initialized
struct pci_host_bridge object, which simplifies the bus scan
interface and makes the PCI scan root bus interface easier to
generalize as members are added to the struct pci_host_bridge().

Convert ARM orion5x platform code to pci_scan_root_bus_bridge() to
improve the PCI root bus scanning interface.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/mach-orion5x/pci.c | 29 +++++++++++++++++++++++------
 1 file changed, 23 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index ecb998e..6dc4c89 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -557,13 +557,30 @@ int __init orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys)
 
 struct pci_bus __init *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys)
 {
-	if (nr == 0)
-		return pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
-					 &sys->resources);
+	struct pci_host_bridge *bridge;
+	int ret = -ENODEV;
 
-	if (nr == 1 && !orion5x_pci_disabled)
-		return pci_scan_root_bus(NULL, sys->busnr, &pci_ops, sys,
-					 &sys->resources);
+	bridge = pci_alloc_host_bridge(0);
+	if (!bridge)
+		return NULL;
+
+	list_splice_init(&sys->resources, &bridge->windows);
+	bridge->dev.parent = NULL;
+	bridge->sysdata = sys;
+	bridge->busnr = sys->busnr;
+
+	if (nr == 0) {
+		bridge->ops = &pcie_ops;
+		ret = pci_scan_root_bus_bridge(bridge);
+	}
+
+	if (nr == 1 && !orion5x_pci_disabled) {
+		bridge->ops = &pci_ops;
+		ret = pci_scan_root_bus_bridge(bridge);
+	}
+
+	if (!ret)
+		return bridge->bus;
 
 	BUG();
 	return NULL;
-- 
2.10.0

[RFC/RFT PATCH 08/18] PCI: designware: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

The introduction of pci_scan_root_bus_bridge() provides a PCI core
API to scan a PCI root bus backed by an already initialized
struct pci_host_bridge object, which simplifies the bus scan
interface and makes the PCI scan root bus interface easier to
generalize as members are added to the struct pci_host_bridge().

Convert PCI designware host code to pci_scan_root_bus_bridge() to
improve the PCI root bus scanning interface.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Joao Pinto <Joao.Pinto@synopsys.com>
---
 drivers/pci/dwc/pcie-designware-host.c | 36 +++++++++++++++++++++-------------
 1 file changed, 22 insertions(+), 14 deletions(-)

diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
index 5ba3349..e43c21a 100644
--- a/drivers/pci/dwc/pcie-designware-host.c
+++ b/drivers/pci/dwc/pcie-designware-host.c
@@ -279,9 +279,9 @@ int dw_pcie_host_init(struct pcie_port *pp)
 	struct device_node *np = dev->of_node;
 	struct platform_device *pdev = to_platform_device(dev);
 	struct pci_bus *bus, *child;
+	struct pci_host_bridge *bridge;
 	struct resource *cfg_res;
 	int i, ret;
-	LIST_HEAD(res);
 	struct resource_entry *win, *tmp;
 
 	cfg_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "config");
@@ -294,16 +294,21 @@ int dw_pcie_host_init(struct pcie_port *pp)
 		dev_err(dev, "missing *config* reg space\n");
 	}
 
-	ret = of_pci_get_host_bridge_resources(np, 0, 0xff, &res, &pp->io_base);
+	bridge = pci_alloc_host_bridge(0);
+	if (!bridge)
+		return  -ENOMEM;
+
+	ret = of_pci_get_host_bridge_resources(np, 0, 0xff,
+					&bridge->windows, &pp->io_base);
 	if (ret)
 		return ret;
 
-	ret = devm_request_pci_bus_resources(dev, &res);
+	ret = devm_request_pci_bus_resources(dev, &bridge->windows);
 	if (ret)
 		goto error;
 
 	/* Get the I/O and memory ranges from DT */
-	resource_list_for_each_entry_safe(win, tmp, &res) {
+	resource_list_for_each_entry_safe(win, tmp, &bridge->windows) {
 		switch (resource_type(win->res)) {
 		case IORESOURCE_IO:
 			ret = pci_remap_iospace(win->res, pp->io_base);
@@ -397,19 +402,22 @@ int dw_pcie_host_init(struct pcie_port *pp)
 		pp->ops->host_init(pp);
 
 	pp->root_bus_nr = pp->busn->start;
+
+	bridge->dev.parent = dev;
+	bridge->sysdata = pp;
+	bridge->busnr = pp->root_bus_nr;
+	bridge->ops = &dw_pcie_ops;
 	if (IS_ENABLED(CONFIG_PCI_MSI)) {
-		bus = pci_scan_root_bus_msi(dev, pp->root_bus_nr,
-					    &dw_pcie_ops, pp, &res,
-					    &dw_pcie_msi_chip);
+		bridge->msi = &dw_pcie_msi_chip;
 		dw_pcie_msi_chip.dev = dev;
-	} else
-		bus = pci_scan_root_bus(dev, pp->root_bus_nr, &dw_pcie_ops,
-					pp, &res);
-	if (!bus) {
-		ret = -ENOMEM;
-		goto error;
 	}
 
+	ret = pci_scan_root_bus_bridge(bridge);
+	if (ret)
+		goto error;
+
+	bus = bridge->bus;
+
 	if (pp->ops->scan_bus)
 		pp->ops->scan_bus(pp);
 
@@ -428,7 +436,7 @@ int dw_pcie_host_init(struct pcie_port *pp)
 	return 0;
 
 error:
-	pci_free_resource_list(&res);
+	pci_free_host_bridge(bridge);
 	return ret;
 }
 
-- 
2.10.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 08/18] PCI: designware: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

The introduction of pci_scan_root_bus_bridge() provides a PCI core
API to scan a PCI root bus backed by an already initialized
struct pci_host_bridge object, which simplifies the bus scan
interface and makes the PCI scan root bus interface easier to
generalize as members are added to the struct pci_host_bridge().

Convert PCI designware host code to pci_scan_root_bus_bridge() to
improve the PCI root bus scanning interface.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Joao Pinto <Joao.Pinto@synopsys.com>
---
 drivers/pci/dwc/pcie-designware-host.c | 36 +++++++++++++++++++++-------------
 1 file changed, 22 insertions(+), 14 deletions(-)

diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
index 5ba3349..e43c21a 100644
--- a/drivers/pci/dwc/pcie-designware-host.c
+++ b/drivers/pci/dwc/pcie-designware-host.c
@@ -279,9 +279,9 @@ int dw_pcie_host_init(struct pcie_port *pp)
 	struct device_node *np = dev->of_node;
 	struct platform_device *pdev = to_platform_device(dev);
 	struct pci_bus *bus, *child;
+	struct pci_host_bridge *bridge;
 	struct resource *cfg_res;
 	int i, ret;
-	LIST_HEAD(res);
 	struct resource_entry *win, *tmp;
 
 	cfg_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "config");
@@ -294,16 +294,21 @@ int dw_pcie_host_init(struct pcie_port *pp)
 		dev_err(dev, "missing *config* reg space\n");
 	}
 
-	ret = of_pci_get_host_bridge_resources(np, 0, 0xff, &res, &pp->io_base);
+	bridge = pci_alloc_host_bridge(0);
+	if (!bridge)
+		return  -ENOMEM;
+
+	ret = of_pci_get_host_bridge_resources(np, 0, 0xff,
+					&bridge->windows, &pp->io_base);
 	if (ret)
 		return ret;
 
-	ret = devm_request_pci_bus_resources(dev, &res);
+	ret = devm_request_pci_bus_resources(dev, &bridge->windows);
 	if (ret)
 		goto error;
 
 	/* Get the I/O and memory ranges from DT */
-	resource_list_for_each_entry_safe(win, tmp, &res) {
+	resource_list_for_each_entry_safe(win, tmp, &bridge->windows) {
 		switch (resource_type(win->res)) {
 		case IORESOURCE_IO:
 			ret = pci_remap_iospace(win->res, pp->io_base);
@@ -397,19 +402,22 @@ int dw_pcie_host_init(struct pcie_port *pp)
 		pp->ops->host_init(pp);
 
 	pp->root_bus_nr = pp->busn->start;
+
+	bridge->dev.parent = dev;
+	bridge->sysdata = pp;
+	bridge->busnr = pp->root_bus_nr;
+	bridge->ops = &dw_pcie_ops;
 	if (IS_ENABLED(CONFIG_PCI_MSI)) {
-		bus = pci_scan_root_bus_msi(dev, pp->root_bus_nr,
-					    &dw_pcie_ops, pp, &res,
-					    &dw_pcie_msi_chip);
+		bridge->msi = &dw_pcie_msi_chip;
 		dw_pcie_msi_chip.dev = dev;
-	} else
-		bus = pci_scan_root_bus(dev, pp->root_bus_nr, &dw_pcie_ops,
-					pp, &res);
-	if (!bus) {
-		ret = -ENOMEM;
-		goto error;
 	}
 
+	ret = pci_scan_root_bus_bridge(bridge);
+	if (ret)
+		goto error;
+
+	bus = bridge->bus;
+
 	if (pp->ops->scan_bus)
 		pp->ops->scan_bus(pp);
 
@@ -428,7 +436,7 @@ int dw_pcie_host_init(struct pcie_port *pp)
 	return 0;
 
 error:
-	pci_free_resource_list(&res);
+	pci_free_host_bridge(bridge);
 	return ret;
 }
 
-- 
2.10.0

[RFC/RFT PATCH 09/18] PCI: aardvark: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

The introduction of pci_scan_root_bus_bridge() provides a PCI core
API to scan a PCI root bus backed by an already initialized
struct pci_host_bridge object, which simplifies the bus scan
interface and makes the PCI scan root bus interface easier to
generalize as members are added to the struct pci_host_bridge().

Convert PCI aardvark host code to pci_scan_root_bus_bridge() to
improve the PCI root bus scanning interface.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Joao Pinto <Joao.Pinto@synopsys.com>
---
 drivers/pci/host/pci-aardvark.c | 33 +++++++++++++++++++++++++++------
 1 file changed, 27 insertions(+), 6 deletions(-)

diff --git a/drivers/pci/host/pci-aardvark.c b/drivers/pci/host/pci-aardvark.c
index 4fce494..ee6fd51 100644
--- a/drivers/pci/host/pci-aardvark.c
+++ b/drivers/pci/host/pci-aardvark.c
@@ -917,6 +917,7 @@ static int advk_pcie_probe(struct platform_device *pdev)
 	struct advk_pcie *pcie;
 	struct resource *res;
 	struct pci_bus *bus, *child;
+	struct pci_host_bridge *bridge;
 	struct msi_controller *msi;
 	struct device_node *msi_node;
 	int ret, irq;
@@ -968,14 +969,25 @@ static int advk_pcie_probe(struct platform_device *pdev)
 	else
 		msi = NULL;
 
-	bus = pci_scan_root_bus_msi(dev, 0, &advk_pcie_ops,
-				    pcie, &pcie->resources, &pcie->msi);
-	if (!bus) {
-		advk_pcie_remove_msi_irq_domain(pcie);
-		advk_pcie_remove_irq_domain(pcie);
-		return -ENOMEM;
+	bridge = pci_alloc_host_bridge(0);
+	if (!bridge) {
+		ret = -ENOMEM;
+		goto error;
 	}
 
+	list_splice_init(&pcie->resources, &bridge->windows);
+	bridge->dev.parent = dev;
+	bridge->sysdata = pcie;
+	bridge->busnr = 0;
+	bridge->ops = &advk_pcie_ops;
+	bridge->msi = &pcie->msi;
+
+	ret = pci_scan_root_bus_bridge(bridge);
+	if (ret < 0)
+		goto error_bridge;
+
+	bus = bridge->bus;
+
 	pci_bus_assign_resources(bus);
 
 	list_for_each_entry(child, &bus->children, node)
@@ -983,6 +995,15 @@ static int advk_pcie_probe(struct platform_device *pdev)
 
 	pci_bus_add_devices(bus);
 	return 0;
+
+ error_bridge:
+	pci_free_host_bridge(bridge);
+
+ error:
+	advk_pcie_remove_msi_irq_domain(pcie);
+	advk_pcie_remove_irq_domain(pcie);
+
+	return ret;
 }
 
 static const struct of_device_id advk_pcie_of_match_table[] = {
-- 
2.10.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 09/18] PCI: aardvark: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

The introduction of pci_scan_root_bus_bridge() provides a PCI core
API to scan a PCI root bus backed by an already initialized
struct pci_host_bridge object, which simplifies the bus scan
interface and makes the PCI scan root bus interface easier to
generalize as members are added to the struct pci_host_bridge().

Convert PCI aardvark host code to pci_scan_root_bus_bridge() to
improve the PCI root bus scanning interface.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Joao Pinto <Joao.Pinto@synopsys.com>
---
 drivers/pci/host/pci-aardvark.c | 33 +++++++++++++++++++++++++++------
 1 file changed, 27 insertions(+), 6 deletions(-)

diff --git a/drivers/pci/host/pci-aardvark.c b/drivers/pci/host/pci-aardvark.c
index 4fce494..ee6fd51 100644
--- a/drivers/pci/host/pci-aardvark.c
+++ b/drivers/pci/host/pci-aardvark.c
@@ -917,6 +917,7 @@ static int advk_pcie_probe(struct platform_device *pdev)
 	struct advk_pcie *pcie;
 	struct resource *res;
 	struct pci_bus *bus, *child;
+	struct pci_host_bridge *bridge;
 	struct msi_controller *msi;
 	struct device_node *msi_node;
 	int ret, irq;
@@ -968,14 +969,25 @@ static int advk_pcie_probe(struct platform_device *pdev)
 	else
 		msi = NULL;
 
-	bus = pci_scan_root_bus_msi(dev, 0, &advk_pcie_ops,
-				    pcie, &pcie->resources, &pcie->msi);
-	if (!bus) {
-		advk_pcie_remove_msi_irq_domain(pcie);
-		advk_pcie_remove_irq_domain(pcie);
-		return -ENOMEM;
+	bridge = pci_alloc_host_bridge(0);
+	if (!bridge) {
+		ret = -ENOMEM;
+		goto error;
 	}
 
+	list_splice_init(&pcie->resources, &bridge->windows);
+	bridge->dev.parent = dev;
+	bridge->sysdata = pcie;
+	bridge->busnr = 0;
+	bridge->ops = &advk_pcie_ops;
+	bridge->msi = &pcie->msi;
+
+	ret = pci_scan_root_bus_bridge(bridge);
+	if (ret < 0)
+		goto error_bridge;
+
+	bus = bridge->bus;
+
 	pci_bus_assign_resources(bus);
 
 	list_for_each_entry(child, &bus->children, node)
@@ -983,6 +995,15 @@ static int advk_pcie_probe(struct platform_device *pdev)
 
 	pci_bus_add_devices(bus);
 	return 0;
+
+ error_bridge:
+	pci_free_host_bridge(bridge);
+
+ error:
+	advk_pcie_remove_msi_irq_domain(pcie);
+	advk_pcie_remove_irq_domain(pcie);
+
+	return ret;
 }
 
 static const struct of_device_id advk_pcie_of_match_table[] = {
-- 
2.10.0

[RFC/RFT PATCH 10/18] PCI: rcar: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

The introduction of pci_scan_root_bus_bridge() provides a PCI core
API to scan a PCI root bus backed by an already initialized
struct pci_host_bridge object, which simplifies the bus scan
interface and makes the PCI scan root bus interface easier to
generalize as members are added to the struct pci_host_bridge().

Convert PCI rcar host code to pci_scan_root_bus_bridge() to
improve the PCI root bus scanning interface.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Simon Horman <horms@verge.net.au>
---
 drivers/pci/host/pcie-rcar.c | 28 ++++++++++++++++++----------
 1 file changed, 18 insertions(+), 10 deletions(-)

diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
index cb07c45..051b4db 100644
--- a/drivers/pci/host/pcie-rcar.c
+++ b/drivers/pci/host/pcie-rcar.c
@@ -451,27 +451,35 @@ static int rcar_pcie_enable(struct rcar_pcie *pcie)
 {
 	struct device *dev = pcie->dev;
 	struct pci_bus *bus, *child;
-	LIST_HEAD(res);
+	struct pci_host_bridge *bridge;
+	int ret;
+
+	bridge = pci_alloc_host_bridge(0);
+	if (!bridge)
+		return -ENOMEM;
 
 	/* Try setting 5 GT/s link speed */
 	rcar_pcie_force_speedup(pcie);
 
-	rcar_pcie_setup(&res, pcie);
+	rcar_pcie_setup(&bridge->windows, pcie);
 
 	pci_add_flags(PCI_REASSIGN_ALL_RSRC | PCI_REASSIGN_ALL_BUS);
 
+	bridge->dev.parent = dev;
+	bridge->sysdata = pcie;
+	bridge->busnr = pcie->root_bus_nr;
+	bridge->ops = &rcar_pcie_ops;
 	if (IS_ENABLED(CONFIG_PCI_MSI))
-		bus = pci_scan_root_bus_msi(dev, pcie->root_bus_nr,
-				&rcar_pcie_ops, pcie, &res, &pcie->msi.chip);
-	else
-		bus = pci_scan_root_bus(dev, pcie->root_bus_nr,
-				&rcar_pcie_ops, pcie, &res);
+		bridge->msi = &pcie->msi.chip;
 
-	if (!bus) {
-		dev_err(dev, "Scanning rootbus failed");
-		return -ENODEV;
+	ret = pci_scan_root_bus_bridge(bridge);
+	if (ret < 0) {
+		kfree(bridge);
+		return ret;
 	}
 
+	bus = bridge->bus;
+
 	pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
 
 	pci_bus_size_bridges(bus);
-- 
2.10.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 10/18] PCI: rcar: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

The introduction of pci_scan_root_bus_bridge() provides a PCI core
API to scan a PCI root bus backed by an already initialized
struct pci_host_bridge object, which simplifies the bus scan
interface and makes the PCI scan root bus interface easier to
generalize as members are added to the struct pci_host_bridge().

Convert PCI rcar host code to pci_scan_root_bus_bridge() to
improve the PCI root bus scanning interface.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Simon Horman <horms@verge.net.au>
---
 drivers/pci/host/pcie-rcar.c | 28 ++++++++++++++++++----------
 1 file changed, 18 insertions(+), 10 deletions(-)

diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
index cb07c45..051b4db 100644
--- a/drivers/pci/host/pcie-rcar.c
+++ b/drivers/pci/host/pcie-rcar.c
@@ -451,27 +451,35 @@ static int rcar_pcie_enable(struct rcar_pcie *pcie)
 {
 	struct device *dev = pcie->dev;
 	struct pci_bus *bus, *child;
-	LIST_HEAD(res);
+	struct pci_host_bridge *bridge;
+	int ret;
+
+	bridge = pci_alloc_host_bridge(0);
+	if (!bridge)
+		return -ENOMEM;
 
 	/* Try setting 5 GT/s link speed */
 	rcar_pcie_force_speedup(pcie);
 
-	rcar_pcie_setup(&res, pcie);
+	rcar_pcie_setup(&bridge->windows, pcie);
 
 	pci_add_flags(PCI_REASSIGN_ALL_RSRC | PCI_REASSIGN_ALL_BUS);
 
+	bridge->dev.parent = dev;
+	bridge->sysdata = pcie;
+	bridge->busnr = pcie->root_bus_nr;
+	bridge->ops = &rcar_pcie_ops;
 	if (IS_ENABLED(CONFIG_PCI_MSI))
-		bus = pci_scan_root_bus_msi(dev, pcie->root_bus_nr,
-				&rcar_pcie_ops, pcie, &res, &pcie->msi.chip);
-	else
-		bus = pci_scan_root_bus(dev, pcie->root_bus_nr,
-				&rcar_pcie_ops, pcie, &res);
+		bridge->msi = &pcie->msi.chip;
 
-	if (!bus) {
-		dev_err(dev, "Scanning rootbus failed");
-		return -ENODEV;
+	ret = pci_scan_root_bus_bridge(bridge);
+	if (ret < 0) {
+		kfree(bridge);
+		return ret;
 	}
 
+	bus = bridge->bus;
+
 	pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
 
 	pci_bus_size_bridges(bus);
-- 
2.10.0

[RFC/RFT PATCH 11/18] PCI: Remove pci_scan_root_bus_msi()

[Lorenzo Pieralisi]

The pci_scan_root_bus_bridge() function allows passing a parameterized
struct pci_host_bridge and scanning the resulting PCI bus; since the
struct msi_controller is part of the struct pci_host_bridge and the
struct pci_host_bridge can now be passed to pci_scan_root_bus_bridge()
explicitly, there is no need for a scan interface with a MSI controller
parameter.

With all PCI host controller drivers and platform code relying
on pci_scan_root_bus_msi() converted over to pci_scan_root_bus_bridge()
the pci_scan_root_bus_msi() becomes obsolete and can be removed.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
---
 drivers/pci/probe.c | 27 +++++----------------------
 include/linux/pci.h |  4 ----
 2 files changed, 5 insertions(+), 26 deletions(-)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index c7a7f72..de259f3 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -2311,9 +2311,8 @@ void __weak pcibios_remove_bus(struct pci_bus *bus)
 {
 }
 
-static struct pci_bus *pci_create_root_bus_msi(struct device *parent,
-		int bus, struct pci_ops *ops, void *sysdata,
-		struct list_head *resources, struct msi_controller *msi)
+struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
+		struct pci_ops *ops, void *sysdata, struct list_head *resources)
 {
 	int error;
 	struct pci_host_bridge *bridge;
@@ -2328,7 +2327,6 @@ static struct pci_bus *pci_create_root_bus_msi(struct device *parent,
 	bridge->sysdata = sysdata;
 	bridge->busnr = bus;
 	bridge->ops = ops;
-	bridge->msi = msi;
 
 	error = pci_register_host_bridge(bridge);
 	if (error < 0)
@@ -2340,13 +2338,6 @@ static struct pci_bus *pci_create_root_bus_msi(struct device *parent,
 	kfree(bridge);
 	return NULL;
 }
-
-struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
-		struct pci_ops *ops, void *sysdata, struct list_head *resources)
-{
-	return pci_create_root_bus_msi(parent, bus, ops, sysdata, resources,
-				       NULL);
-}
 EXPORT_SYMBOL_GPL(pci_create_root_bus);
 
 int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int bus_max)
@@ -2450,9 +2441,8 @@ int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge)
 	return 0;
 }
 
-struct pci_bus *pci_scan_root_bus_msi(struct device *parent, int bus,
-		struct pci_ops *ops, void *sysdata,
-		struct list_head *resources, struct msi_controller *msi)
+struct pci_bus *pci_scan_root_bus(struct device *parent, int bus,
+		struct pci_ops *ops, void *sysdata, struct list_head *resources)
 {
 	struct resource_entry *window;
 	bool found = false;
@@ -2465,7 +2455,7 @@ struct pci_bus *pci_scan_root_bus_msi(struct device *parent, int bus,
 			break;
 		}
 
-	b = pci_create_root_bus_msi(parent, bus, ops, sysdata, resources, msi);
+	b = pci_create_root_bus(parent, bus, ops, sysdata, resources);
 	if (!b)
 		return NULL;
 
@@ -2483,13 +2473,6 @@ struct pci_bus *pci_scan_root_bus_msi(struct device *parent, int bus,
 
 	return b;
 }
-
-struct pci_bus *pci_scan_root_bus(struct device *parent, int bus,
-		struct pci_ops *ops, void *sysdata, struct list_head *resources)
-{
-	return pci_scan_root_bus_msi(parent, bus, ops, sysdata, resources,
-				     NULL);
-}
 EXPORT_SYMBOL(pci_scan_root_bus);
 
 struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops,
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 757779a..6aa0090 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -840,10 +840,6 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
 int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int busmax);
 int pci_bus_update_busn_res_end(struct pci_bus *b, int busmax);
 void pci_bus_release_busn_res(struct pci_bus *b);
-struct pci_bus *pci_scan_root_bus_msi(struct device *parent, int bus,
-				      struct pci_ops *ops, void *sysdata,
-				      struct list_head *resources,
-				      struct msi_controller *msi);
 struct pci_bus *pci_scan_root_bus(struct device *parent, int bus,
 					     struct pci_ops *ops, void *sysdata,
 					     struct list_head *resources);
-- 
2.10.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 11/18] PCI: Remove pci_scan_root_bus_msi()

[Lorenzo Pieralisi]

The pci_scan_root_bus_bridge() function allows passing a parameterized
struct pci_host_bridge and scanning the resulting PCI bus; since the
struct msi_controller is part of the struct pci_host_bridge and the
struct pci_host_bridge can now be passed to pci_scan_root_bus_bridge()
explicitly, there is no need for a scan interface with a MSI controller
parameter.

With all PCI host controller drivers and platform code relying
on pci_scan_root_bus_msi() converted over to pci_scan_root_bus_bridge()
the pci_scan_root_bus_msi() becomes obsolete and can be removed.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
---
 drivers/pci/probe.c | 27 +++++----------------------
 include/linux/pci.h |  4 ----
 2 files changed, 5 insertions(+), 26 deletions(-)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index c7a7f72..de259f3 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -2311,9 +2311,8 @@ void __weak pcibios_remove_bus(struct pci_bus *bus)
 {
 }
 
-static struct pci_bus *pci_create_root_bus_msi(struct device *parent,
-		int bus, struct pci_ops *ops, void *sysdata,
-		struct list_head *resources, struct msi_controller *msi)
+struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
+		struct pci_ops *ops, void *sysdata, struct list_head *resources)
 {
 	int error;
 	struct pci_host_bridge *bridge;
@@ -2328,7 +2327,6 @@ static struct pci_bus *pci_create_root_bus_msi(struct device *parent,
 	bridge->sysdata = sysdata;
 	bridge->busnr = bus;
 	bridge->ops = ops;
-	bridge->msi = msi;
 
 	error = pci_register_host_bridge(bridge);
 	if (error < 0)
@@ -2340,13 +2338,6 @@ static struct pci_bus *pci_create_root_bus_msi(struct device *parent,
 	kfree(bridge);
 	return NULL;
 }
-
-struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
-		struct pci_ops *ops, void *sysdata, struct list_head *resources)
-{
-	return pci_create_root_bus_msi(parent, bus, ops, sysdata, resources,
-				       NULL);
-}
 EXPORT_SYMBOL_GPL(pci_create_root_bus);
 
 int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int bus_max)
@@ -2450,9 +2441,8 @@ int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge)
 	return 0;
 }
 
-struct pci_bus *pci_scan_root_bus_msi(struct device *parent, int bus,
-		struct pci_ops *ops, void *sysdata,
-		struct list_head *resources, struct msi_controller *msi)
+struct pci_bus *pci_scan_root_bus(struct device *parent, int bus,
+		struct pci_ops *ops, void *sysdata, struct list_head *resources)
 {
 	struct resource_entry *window;
 	bool found = false;
@@ -2465,7 +2455,7 @@ struct pci_bus *pci_scan_root_bus_msi(struct device *parent, int bus,
 			break;
 		}
 
-	b = pci_create_root_bus_msi(parent, bus, ops, sysdata, resources, msi);
+	b = pci_create_root_bus(parent, bus, ops, sysdata, resources);
 	if (!b)
 		return NULL;
 
@@ -2483,13 +2473,6 @@ struct pci_bus *pci_scan_root_bus_msi(struct device *parent, int bus,
 
 	return b;
 }
-
-struct pci_bus *pci_scan_root_bus(struct device *parent, int bus,
-		struct pci_ops *ops, void *sysdata, struct list_head *resources)
-{
-	return pci_scan_root_bus_msi(parent, bus, ops, sysdata, resources,
-				     NULL);
-}
 EXPORT_SYMBOL(pci_scan_root_bus);
 
 struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops,
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 757779a..6aa0090 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -840,10 +840,6 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
 int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int busmax);
 int pci_bus_update_busn_res_end(struct pci_bus *b, int busmax);
 void pci_bus_release_busn_res(struct pci_bus *b);
-struct pci_bus *pci_scan_root_bus_msi(struct device *parent, int bus,
-				      struct pci_ops *ops, void *sysdata,
-				      struct list_head *resources,
-				      struct msi_controller *msi);
 struct pci_bus *pci_scan_root_bus(struct device *parent, int bus,
 					     struct pci_ops *ops, void *sysdata,
 					     struct list_head *resources);
-- 
2.10.0

[RFC/RFT PATCH 12/18] PCI: Build setup-irq.o on all arches

[Lorenzo Pieralisi]

From: Matthew Minter <matt@masarand.com>

The functions included in setup-irq.o currently apply only to a selection
of architectures which share common IRQ assignment code. However this
code needs to be generalised for all arches to allow deferred IRQ
assignment. So the first step is to build it on all architectures.

Signed-off-by: Matthew Minter <matt@masarand.com>
---
 drivers/pci/Makefile | 17 ++---------------
 1 file changed, 2 insertions(+), 15 deletions(-)

diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index 8db5079..9698239 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -4,7 +4,8 @@
 
 obj-y		+= access.o bus.o probe.o host-bridge.o remove.o pci.o \
 			pci-driver.o search.o pci-sysfs.o rom.o setup-res.o \
-			irq.o vpd.o setup-bus.o vc.o
+			irq.o vpd.o setup-bus.o vc.o setup-irq.o
+
 obj-$(CONFIG_PROC_FS) += proc.o
 obj-$(CONFIG_SYSFS) += slot.o
 
@@ -29,20 +30,6 @@ obj-$(CONFIG_PCI_ATS) += ats.o
 obj-$(CONFIG_PCI_IOV) += iov.o
 
 #
-# Some architectures use the generic PCI setup functions
-#
-obj-$(CONFIG_ALPHA) += setup-irq.o
-obj-$(CONFIG_ARC) += setup-irq.o
-obj-$(CONFIG_ARM) += setup-irq.o
-obj-$(CONFIG_ARM64) += setup-irq.o
-obj-$(CONFIG_UNICORE32) += setup-irq.o
-obj-$(CONFIG_SUPERH) += setup-irq.o
-obj-$(CONFIG_MIPS) += setup-irq.o
-obj-$(CONFIG_TILE) += setup-irq.o
-obj-$(CONFIG_SPARC_LEON) += setup-irq.o
-obj-$(CONFIG_M68K) += setup-irq.o
-
-#
 # ACPI Related PCI FW Functions
 # ACPI _DSM provided firmware instance and string name
 #
-- 
2.10.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 12/18] PCI: Build setup-irq.o on all arches

[Lorenzo Pieralisi]

From: Matthew Minter <matt@masarand.com>

The functions included in setup-irq.o currently apply only to a selection
of architectures which share common IRQ assignment code. However this
code needs to be generalised for all arches to allow deferred IRQ
assignment. So the first step is to build it on all architectures.

Signed-off-by: Matthew Minter <matt@masarand.com>
---
 drivers/pci/Makefile | 17 ++---------------
 1 file changed, 2 insertions(+), 15 deletions(-)

diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index 8db5079..9698239 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -4,7 +4,8 @@
 
 obj-y		+= access.o bus.o probe.o host-bridge.o remove.o pci.o \
 			pci-driver.o search.o pci-sysfs.o rom.o setup-res.o \
-			irq.o vpd.o setup-bus.o vc.o
+			irq.o vpd.o setup-bus.o vc.o setup-irq.o
+
 obj-$(CONFIG_PROC_FS) += proc.o
 obj-$(CONFIG_SYSFS) += slot.o
 
@@ -29,20 +30,6 @@ obj-$(CONFIG_PCI_ATS) += ats.o
 obj-$(CONFIG_PCI_IOV) += iov.o
 
 #
-# Some architectures use the generic PCI setup functions
-#
-obj-$(CONFIG_ALPHA) += setup-irq.o
-obj-$(CONFIG_ARC) += setup-irq.o
-obj-$(CONFIG_ARM) += setup-irq.o
-obj-$(CONFIG_ARM64) += setup-irq.o
-obj-$(CONFIG_UNICORE32) += setup-irq.o
-obj-$(CONFIG_SUPERH) += setup-irq.o
-obj-$(CONFIG_MIPS) += setup-irq.o
-obj-$(CONFIG_TILE) += setup-irq.o
-obj-$(CONFIG_SPARC_LEON) += setup-irq.o
-obj-$(CONFIG_M68K) += setup-irq.o
-
-#
 # ACPI Related PCI FW Functions
 # ACPI _DSM provided firmware instance and string name
 #
-- 
2.10.0

[RFC/RFT PATCH 13/18] PCI: Add IRQ mapping function pointers to pci_host_bridge struct

[Lorenzo Pieralisi]

From: Matthew Minter <matt@masarand.com>

In order to defer IRQ assignment arches must be able to register functions
to map and swizzle interrupts. These registered functions are stored in
the pci_host_bridge struct.

Signed-off-by: Matthew Minter <matt@masarand.com>
---
 include/linux/pci.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/linux/pci.h b/include/linux/pci.h
index 6aa0090..722a770 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -424,6 +424,8 @@ struct pci_host_bridge {
 	void *sysdata;
 	int busnr;
 	struct list_head windows;	/* resource_entry */
+	u8 (*swizzle_irq)(struct pci_dev *, u8 *); /* platform irq swizzler */
+	int (*map_irq)(const struct pci_dev *, u8, u8);
 	void (*release_fn)(struct pci_host_bridge *);
 	void *release_data;
 	struct msi_controller *msi;
-- 
2.10.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 13/18] PCI: Add IRQ mapping function pointers to pci_host_bridge struct

[Lorenzo Pieralisi]

From: Matthew Minter <matt@masarand.com>

In order to defer IRQ assignment arches must be able to register functions
to map and swizzle interrupts. These registered functions are stored in
the pci_host_bridge struct.

Signed-off-by: Matthew Minter <matt@masarand.com>
---
 include/linux/pci.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/linux/pci.h b/include/linux/pci.h
index 6aa0090..722a770 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -424,6 +424,8 @@ struct pci_host_bridge {
 	void *sysdata;
 	int busnr;
 	struct list_head windows;	/* resource_entry */
+	u8 (*swizzle_irq)(struct pci_dev *, u8 *); /* platform irq swizzler */
+	int (*map_irq)(const struct pci_dev *, u8, u8);
 	void (*release_fn)(struct pci_host_bridge *);
 	void *release_data;
 	struct msi_controller *msi;
-- 
2.10.0

[RFC/RFT PATCH 14/18] PCI: Add pci_assign_irq() function and have pci_fixup_irqs() use it

[Lorenzo Pieralisi]

From: Matthew Minter <matt@masarand.com>

Here we delete the static pdev_fixup_irq() function which is currently
what pci_fixup_irqs() uses to actually assign the irqs and replace it
with the pci_assign_irq() function which changes the interface and
makes use of the new function pointers stored in the host bridge
structure.

Eventually this will allow pci_fixup_irqs() to be removed entirely
and the new deferred assignment code path will call pci_assign_irq
directly. However to ensure current users continue to work a
new implementation of pci_fixup_irqs() is introduced which simply
wraps the functionality of pci_assign_irq().

Signed-off-by: Matthew Minter <matt@masarand.com>
[lorenzo.pieralisi@arm.com: reworked comments/log]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
---
 drivers/pci/setup-irq.c | 45 +++++++++++++++++++++++++++++++++++----------
 include/linux/pci.h     |  1 +
 2 files changed, 36 insertions(+), 10 deletions(-)

diff --git a/drivers/pci/setup-irq.c b/drivers/pci/setup-irq.c
index 95c225b..5eeee79 100644
--- a/drivers/pci/setup-irq.c
+++ b/drivers/pci/setup-irq.c
@@ -15,6 +15,7 @@
 #include <linux/errno.h>
 #include <linux/ioport.h>
 #include <linux/cache.h>
+#include "pci.h"
 
 void __weak pcibios_update_irq(struct pci_dev *dev, int irq)
 {
@@ -22,12 +23,17 @@ void __weak pcibios_update_irq(struct pci_dev *dev, int irq)
 	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
 }
 
-static void pdev_fixup_irq(struct pci_dev *dev,
-			   u8 (*swizzle)(struct pci_dev *, u8 *),
-			   int (*map_irq)(const struct pci_dev *, u8, u8))
+void pci_assign_irq(struct pci_dev *dev)
 {
-	u8 pin, slot;
+	u8 pin;
+	u8 slot = -1;
 	int irq = 0;
+	struct pci_host_bridge *hbrg = pci_find_host_bridge(dev->bus);
+
+	if (!(hbrg->map_irq)) {
+		dev_dbg(&dev->dev, "runtime irq mapping not provided by arch\n");
+		return;
+	}
 
 	/* If this device is not on the primary bus, we need to figure out
 	   which interrupt pin it will come in on.   We know which slot it
@@ -40,17 +46,22 @@ static void pdev_fixup_irq(struct pci_dev *dev,
 	if (pin > 4)
 		pin = 1;
 
-	if (pin != 0) {
+	if (pin) {
 		/* Follow the chain of bridges, swizzling as we go.  */
-		slot = (*swizzle)(dev, &pin);
+		if (hbrg->swizzle_irq)
+			slot = (*(hbrg->swizzle_irq))(dev, &pin);
 
-		irq = (*map_irq)(dev, slot, pin);
+		/*
+		 * If a swizzling function is not used map_irq must
+		 * ignore slot
+		 */
+		irq = (*(hbrg->map_irq))(dev, slot, pin);
 		if (irq == -1)
 			irq = 0;
 	}
 	dev->irq = irq;
 
-	dev_dbg(&dev->dev, "fixup irq: got %d\n", dev->irq);
+	dev_dbg(&dev->dev, "assign irq: got %d\n", dev->irq);
 
 	/* Always tell the device, so the driver knows what is
 	   the real IRQ to use; the device does not use it. */
@@ -60,9 +71,23 @@ static void pdev_fixup_irq(struct pci_dev *dev,
 void pci_fixup_irqs(u8 (*swizzle)(struct pci_dev *, u8 *),
 		    int (*map_irq)(const struct pci_dev *, u8, u8))
 {
+	/*
+	 * Implement pci_fixup_irqs() through pci_assign_irq().
+	 * This code should be remove eventually, it is a wrapper
+	 * around pci_assign_irq() interface to keep current
+	 * pci_fixup_irqs() behaviour unchanged on architecture
+	 * code still relying on its interface.
+	 */
 	struct pci_dev *dev = NULL;
+	struct pci_host_bridge *hbrg = NULL;
 
-	for_each_pci_dev(dev)
-		pdev_fixup_irq(dev, swizzle, map_irq);
+	for_each_pci_dev(dev) {
+		hbrg = pci_find_host_bridge(dev->bus);
+		hbrg->swizzle_irq = swizzle;
+		hbrg->map_irq = map_irq;
+		pci_assign_irq(dev);
+		hbrg->swizzle_irq = NULL;
+		hbrg->map_irq = NULL;
+	}
 }
 EXPORT_SYMBOL_GPL(pci_fixup_irqs);
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 722a770..688c669 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1152,6 +1152,7 @@ void pdev_enable_device(struct pci_dev *);
 int pci_enable_resources(struct pci_dev *, int mask);
 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
 		    int (*)(const struct pci_dev *, u8, u8));
+void pci_assign_irq(struct pci_dev *dev);
 struct resource *pci_find_resource(struct pci_dev *dev, struct resource *res);
 #define HAVE_PCI_REQ_REGIONS	2
 int __must_check pci_request_regions(struct pci_dev *, const char *);
-- 
2.10.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 14/18] PCI: Add pci_assign_irq() function and have pci_fixup_irqs() use it

[Lorenzo Pieralisi]

From: Matthew Minter <matt@masarand.com>

Here we delete the static pdev_fixup_irq() function which is currently
what pci_fixup_irqs() uses to actually assign the irqs and replace it
with the pci_assign_irq() function which changes the interface and
makes use of the new function pointers stored in the host bridge
structure.

Eventually this will allow pci_fixup_irqs() to be removed entirely
and the new deferred assignment code path will call pci_assign_irq
directly. However to ensure current users continue to work a
new implementation of pci_fixup_irqs() is introduced which simply
wraps the functionality of pci_assign_irq().

Signed-off-by: Matthew Minter <matt@masarand.com>
[lorenzo.pieralisi at arm.com: reworked comments/log]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
---
 drivers/pci/setup-irq.c | 45 +++++++++++++++++++++++++++++++++++----------
 include/linux/pci.h     |  1 +
 2 files changed, 36 insertions(+), 10 deletions(-)

diff --git a/drivers/pci/setup-irq.c b/drivers/pci/setup-irq.c
index 95c225b..5eeee79 100644
--- a/drivers/pci/setup-irq.c
+++ b/drivers/pci/setup-irq.c
@@ -15,6 +15,7 @@
 #include <linux/errno.h>
 #include <linux/ioport.h>
 #include <linux/cache.h>
+#include "pci.h"
 
 void __weak pcibios_update_irq(struct pci_dev *dev, int irq)
 {
@@ -22,12 +23,17 @@ void __weak pcibios_update_irq(struct pci_dev *dev, int irq)
 	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
 }
 
-static void pdev_fixup_irq(struct pci_dev *dev,
-			   u8 (*swizzle)(struct pci_dev *, u8 *),
-			   int (*map_irq)(const struct pci_dev *, u8, u8))
+void pci_assign_irq(struct pci_dev *dev)
 {
-	u8 pin, slot;
+	u8 pin;
+	u8 slot = -1;
 	int irq = 0;
+	struct pci_host_bridge *hbrg = pci_find_host_bridge(dev->bus);
+
+	if (!(hbrg->map_irq)) {
+		dev_dbg(&dev->dev, "runtime irq mapping not provided by arch\n");
+		return;
+	}
 
 	/* If this device is not on the primary bus, we need to figure out
 	   which interrupt pin it will come in on.   We know which slot it
@@ -40,17 +46,22 @@ static void pdev_fixup_irq(struct pci_dev *dev,
 	if (pin > 4)
 		pin = 1;
 
-	if (pin != 0) {
+	if (pin) {
 		/* Follow the chain of bridges, swizzling as we go.  */
-		slot = (*swizzle)(dev, &pin);
+		if (hbrg->swizzle_irq)
+			slot = (*(hbrg->swizzle_irq))(dev, &pin);
 
-		irq = (*map_irq)(dev, slot, pin);
+		/*
+		 * If a swizzling function is not used map_irq must
+		 * ignore slot
+		 */
+		irq = (*(hbrg->map_irq))(dev, slot, pin);
 		if (irq == -1)
 			irq = 0;
 	}
 	dev->irq = irq;
 
-	dev_dbg(&dev->dev, "fixup irq: got %d\n", dev->irq);
+	dev_dbg(&dev->dev, "assign irq: got %d\n", dev->irq);
 
 	/* Always tell the device, so the driver knows what is
 	   the real IRQ to use; the device does not use it. */
@@ -60,9 +71,23 @@ static void pdev_fixup_irq(struct pci_dev *dev,
 void pci_fixup_irqs(u8 (*swizzle)(struct pci_dev *, u8 *),
 		    int (*map_irq)(const struct pci_dev *, u8, u8))
 {
+	/*
+	 * Implement pci_fixup_irqs() through pci_assign_irq().
+	 * This code should be remove eventually, it is a wrapper
+	 * around pci_assign_irq() interface to keep current
+	 * pci_fixup_irqs() behaviour unchanged on architecture
+	 * code still relying on its interface.
+	 */
 	struct pci_dev *dev = NULL;
+	struct pci_host_bridge *hbrg = NULL;
 
-	for_each_pci_dev(dev)
-		pdev_fixup_irq(dev, swizzle, map_irq);
+	for_each_pci_dev(dev) {
+		hbrg = pci_find_host_bridge(dev->bus);
+		hbrg->swizzle_irq = swizzle;
+		hbrg->map_irq = map_irq;
+		pci_assign_irq(dev);
+		hbrg->swizzle_irq = NULL;
+		hbrg->map_irq = NULL;
+	}
 }
 EXPORT_SYMBOL_GPL(pci_fixup_irqs);
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 722a770..688c669 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1152,6 +1152,7 @@ void pdev_enable_device(struct pci_dev *);
 int pci_enable_resources(struct pci_dev *, int mask);
 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
 		    int (*)(const struct pci_dev *, u8, u8));
+void pci_assign_irq(struct pci_dev *dev);
 struct resource *pci_find_resource(struct pci_dev *dev, struct resource *res);
 #define HAVE_PCI_REQ_REGIONS	2
 int __must_check pci_request_regions(struct pci_dev *, const char *);
-- 
2.10.0

[RFC/RFT PATCH 15/18] OF/PCI: Update of_irq_parse_and_map_pci() comment

[Lorenzo Pieralisi]

From: Matthew Minter <matt@masarand.com>

With the introduction of struct pci_host_bridge.(*map_irq) function
pointer add another direct usage of of_irq_parse_and_map_pci().

Update the function comment to reflect this behaviour.

Signed-off-by: Matthew Minter <matt@masarand.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
---
 drivers/of/of_pci_irq.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/of/of_pci_irq.c b/drivers/of/of_pci_irq.c
index c175d9c..3a05568 100644
--- a/drivers/of/of_pci_irq.c
+++ b/drivers/of/of_pci_irq.c
@@ -113,7 +113,8 @@ EXPORT_SYMBOL_GPL(of_irq_parse_pci);
  * @pin: PCI irq pin number; passed when used as map_irq callback. Unused
  *
  * @slot and @pin are unused, but included in the function so that this
- * function can be used directly as the map_irq callback to pci_fixup_irqs().
+ * function can be used directly as the map_irq callback to
+ * pci_assign_irq() and struct pci_host_bridge.map_irq pointer
  */
 int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin)
 {
-- 
2.10.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 15/18] OF/PCI: Update of_irq_parse_and_map_pci() comment

[Lorenzo Pieralisi]

From: Matthew Minter <matt@masarand.com>

With the introduction of struct pci_host_bridge.(*map_irq) function
pointer add another direct usage of of_irq_parse_and_map_pci().

Update the function comment to reflect this behaviour.

Signed-off-by: Matthew Minter <matt@masarand.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
---
 drivers/of/of_pci_irq.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/of/of_pci_irq.c b/drivers/of/of_pci_irq.c
index c175d9c..3a05568 100644
--- a/drivers/of/of_pci_irq.c
+++ b/drivers/of/of_pci_irq.c
@@ -113,7 +113,8 @@ EXPORT_SYMBOL_GPL(of_irq_parse_pci);
  * @pin: PCI irq pin number; passed when used as map_irq callback. Unused
  *
  * @slot and @pin are unused, but included in the function so that this
- * function can be used directly as the map_irq callback to pci_fixup_irqs().
+ * function can be used directly as the map_irq callback to
+ * pci_assign_irq() and struct pci_host_bridge.map_irq pointer
  */
 int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin)
 {
-- 
2.10.0

[RFC/RFT PATCH 16/18] PCI: Add a call to pci_assign_irq() in pci_device_probe()

[Lorenzo Pieralisi]

From: Matthew Minter <matt@masarand.com>

The pci_assign_irq() function allows assignment of an irq to devices
during device enable time rather than only at boot. Therefore call it
in the pci_device_probe() function during the enable device code path
so this assignment can be performed.

This patch will do nothing on arches which do not set the irq mapping
function pointers and is therefore currently a nop, however as support
for these function pointers is added to arch specific code this will
cause irq assignment to migrate to device enable time allowing the new
code paths to be used.

Signed-off-by: Matthew Minter <matt@masarand.com>
[lorenzo.pieralisi@arm.com: moved pci_assign_irq() call site]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
---
 drivers/pci/pci-driver.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index afa7271..4632fa4 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -400,6 +400,8 @@ static int pci_device_probe(struct device *dev)
 	struct pci_dev *pci_dev = to_pci_dev(dev);
 	struct pci_driver *drv = to_pci_driver(dev->driver);
 
+	pci_assign_irq(pci_dev);
+
 	error = pcibios_alloc_irq(pci_dev);
 	if (error < 0)
 		return error;
-- 
2.10.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 16/18] PCI: Add a call to pci_assign_irq() in pci_device_probe()

[Lorenzo Pieralisi]

From: Matthew Minter <matt@masarand.com>

The pci_assign_irq() function allows assignment of an irq to devices
during device enable time rather than only at boot. Therefore call it
in the pci_device_probe() function during the enable device code path
so this assignment can be performed.

This patch will do nothing on arches which do not set the irq mapping
function pointers and is therefore currently a nop, however as support
for these function pointers is added to arch specific code this will
cause irq assignment to migrate to device enable time allowing the new
code paths to be used.

Signed-off-by: Matthew Minter <matt@masarand.com>
[lorenzo.pieralisi at arm.com: moved pci_assign_irq() call site]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
---
 drivers/pci/pci-driver.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index afa7271..4632fa4 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -400,6 +400,8 @@ static int pci_device_probe(struct device *dev)
 	struct pci_dev *pci_dev = to_pci_dev(dev);
 	struct pci_driver *drv = to_pci_driver(dev->driver);
 
+	pci_assign_irq(pci_dev);
+
 	error = pcibios_alloc_irq(pci_dev);
 	if (error < 0)
 		return error;
-- 
2.10.0

[RFC/RFT PATCH 17/18] ARM: PCI: Remove pci_fixup_irqs() call for bios32 host controllers

[Lorenzo Pieralisi]

Legacy PCI host controllers (ie host controllers that set-up the PCI bus
through the ARM pci_common_init() API) are currently relying on
pci_fixup_irqs() to assign legacy PCI irqs to devices. This is not ideal
in that pci_fixup_irqs() assign IRQs for all PCI devices present in a
given system some of which may well be enabled by the time
pci_fixup_irqs() is called (ie a system with multiple host controllers).
With the introduction of struct pci_host_bridge.(*map_irq) pointer it is
possible to assign IRQs for all devices originating from a PCI host
bridge at probe time; this is implemented through pci_assign_irq() that
relies on the struct pci_host_bridge.map_irq pointer to map IRQ for a
given device.

The benefits this brings are twofold:

- the IRQ for a device is assigned once at probe time
- the IRQ assignment works also for hotplugged devices

Remove pci_fixup_irqs() call from bios32 code and rely on
pci_assign_irq() to carry out the IRQ mapping at device probe
time.

The map_irq() and swizzle_irq() struct pci_host_bridge callbacks are
set-up in the struct pci_host_bridge created in the bios32
pcibios_init_hw() function and mach-* code paths (for PCI mach
implementations that require a specific struct hw_pci.(*scan) function
callback).

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/kernel/bios32.c    |  4 ++--
 arch/arm/mach-dove/pcie.c   | 18 ++++++++++--------
 arch/arm/mach-iop13xx/pci.c |  2 ++
 arch/arm/mach-orion5x/pci.c | 28 +++++++++++++++-------------
 4 files changed, 29 insertions(+), 23 deletions(-)

diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index e2095f5..a5b6d4f 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -497,6 +497,8 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
 				bridge->busnr = sys->busnr;
 				bridge->ops = hw->ops;
 				bridge->msi = hw->msi_ctrl;
+				bridge->map_irq = pcibios_map_irq;
+				bridge->swizzle_irq = pcibios_swizzle;
 				bridge->align_resource =
 						hw->align_resource;
 
@@ -537,8 +539,6 @@ void pci_common_init_dev(struct device *parent, struct hw_pci *hw)
 	if (hw->postinit)
 		hw->postinit();
 
-	pci_fixup_irqs(pcibios_swizzle, pcibios_map_irq);
-
 	list_for_each_entry(sys, &head, node) {
 		struct pci_bus *bus = sys->bus;
 
diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c
index 999e465..6df2be9 100644
--- a/arch/arm/mach-dove/pcie.c
+++ b/arch/arm/mach-dove/pcie.c
@@ -152,6 +152,14 @@ static void rc_pci_fixup(struct pci_dev *dev)
 }
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_ANY_ID, rc_pci_fixup);
 
+static int __init dove_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+	struct pci_sys_data *sys = dev->sysdata;
+	struct pcie_port *pp = sys->private_data;
+
+	return pp->index ? IRQ_DOVE_PCIE1 : IRQ_DOVE_PCIE0;
+}
+
 static struct pci_bus __init *
 dove_pcie_scan_bus(int nr, struct pci_sys_data *sys)
 {
@@ -172,6 +180,8 @@ dove_pcie_scan_bus(int nr, struct pci_sys_data *sys)
 	bridge->sysdata = sys;
 	bridge->busnr = sys->busnr;
 	bridge->ops = &pcie_ops;
+	bridge->map_irq = dove_pcie_map_irq;
+	bridge->swizzle_irq = pci_common_swizzle;
 
 	ret = pci_scan_root_bus_bridge(bridge);
 	if (ret < 0) {
@@ -182,14 +192,6 @@ dove_pcie_scan_bus(int nr, struct pci_sys_data *sys)
 	return bridge->bus;
 }
 
-static int __init dove_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
-	struct pci_sys_data *sys = dev->sysdata;
-	struct pcie_port *pp = sys->private_data;
-
-	return pp->index ? IRQ_DOVE_PCIE1 : IRQ_DOVE_PCIE0;
-}
-
 static struct hw_pci dove_pci __initdata = {
 	.nr_controllers	= 2,
 	.setup		= dove_pcie_setup,
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
index b0a8ded..3a7f960 100644
--- a/arch/arm/mach-iop13xx/pci.c
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -537,6 +537,7 @@ struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
 	bridge->dev.parent = NULL;
 	bridge->sysdata = sys;
 	bridge->busnr = sys->busnr;
+	bridge->swizzle_irq = pci_common_swizzle;
 
 	switch (which_atu) {
 	case IOP13XX_INIT_ATU_ATUX:
@@ -556,6 +557,7 @@ struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
 		break;
 	case IOP13XX_INIT_ATU_ATUE:
 		bridge->ops = &iop13xx_atue_ops;
+		bridge->map_irq = iop13xx_pcie_map_irq;
 		ret = pci_scan_root_bus_bridge(bridge);
 		if (ret < 0) {
 			pci_free_host_bridge(bridge);
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index 6dc4c89..86335e7 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -555,6 +555,19 @@ int __init orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys)
 	return 0;
 }
 
+int __init orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+	int bus = dev->bus->number;
+
+	/*
+	 * PCIe endpoint?
+	 */
+	if (orion5x_pci_disabled || bus < orion5x_pci_local_bus_nr())
+		return IRQ_ORION5X_PCIE0_INT;
+
+	return -1;
+}
+
 struct pci_bus __init *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys)
 {
 	struct pci_host_bridge *bridge;
@@ -568,6 +581,8 @@ struct pci_bus __init *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys
 	bridge->dev.parent = NULL;
 	bridge->sysdata = sys;
 	bridge->busnr = sys->busnr;
+	bridge->map_irq = orion5x_pci_map_irq;
+	bridge->swizzle_irq = pci_common_swizzle;
 
 	if (nr == 0) {
 		bridge->ops = &pcie_ops;
@@ -585,16 +600,3 @@ struct pci_bus __init *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys
 	BUG();
 	return NULL;
 }
-
-int __init orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
-	int bus = dev->bus->number;
-
-	/*
-	 * PCIe endpoint?
-	 */
-	if (orion5x_pci_disabled || bus < orion5x_pci_local_bus_nr())
-		return IRQ_ORION5X_PCIE0_INT;
-
-	return -1;
-}
-- 
2.10.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 17/18] ARM: PCI: Remove pci_fixup_irqs() call for bios32 host controllers

[Lorenzo Pieralisi]

Legacy PCI host controllers (ie host controllers that set-up the PCI bus
through the ARM pci_common_init() API) are currently relying on
pci_fixup_irqs() to assign legacy PCI irqs to devices. This is not ideal
in that pci_fixup_irqs() assign IRQs for all PCI devices present in a
given system some of which may well be enabled by the time
pci_fixup_irqs() is called (ie a system with multiple host controllers).
With the introduction of struct pci_host_bridge.(*map_irq) pointer it is
possible to assign IRQs for all devices originating from a PCI host
bridge at probe time; this is implemented through pci_assign_irq() that
relies on the struct pci_host_bridge.map_irq pointer to map IRQ for a
given device.

The benefits this brings are twofold:

- the IRQ for a device is assigned once at probe time
- the IRQ assignment works also for hotplugged devices

Remove pci_fixup_irqs() call from bios32 code and rely on
pci_assign_irq() to carry out the IRQ mapping at device probe
time.

The map_irq() and swizzle_irq() struct pci_host_bridge callbacks are
set-up in the struct pci_host_bridge created in the bios32
pcibios_init_hw() function and mach-* code paths (for PCI mach
implementations that require a specific struct hw_pci.(*scan) function
callback).

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/kernel/bios32.c    |  4 ++--
 arch/arm/mach-dove/pcie.c   | 18 ++++++++++--------
 arch/arm/mach-iop13xx/pci.c |  2 ++
 arch/arm/mach-orion5x/pci.c | 28 +++++++++++++++-------------
 4 files changed, 29 insertions(+), 23 deletions(-)

diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index e2095f5..a5b6d4f 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -497,6 +497,8 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
 				bridge->busnr = sys->busnr;
 				bridge->ops = hw->ops;
 				bridge->msi = hw->msi_ctrl;
+				bridge->map_irq = pcibios_map_irq;
+				bridge->swizzle_irq = pcibios_swizzle;
 				bridge->align_resource =
 						hw->align_resource;
 
@@ -537,8 +539,6 @@ void pci_common_init_dev(struct device *parent, struct hw_pci *hw)
 	if (hw->postinit)
 		hw->postinit();
 
-	pci_fixup_irqs(pcibios_swizzle, pcibios_map_irq);
-
 	list_for_each_entry(sys, &head, node) {
 		struct pci_bus *bus = sys->bus;
 
diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c
index 999e465..6df2be9 100644
--- a/arch/arm/mach-dove/pcie.c
+++ b/arch/arm/mach-dove/pcie.c
@@ -152,6 +152,14 @@ static void rc_pci_fixup(struct pci_dev *dev)
 }
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_ANY_ID, rc_pci_fixup);
 
+static int __init dove_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+	struct pci_sys_data *sys = dev->sysdata;
+	struct pcie_port *pp = sys->private_data;
+
+	return pp->index ? IRQ_DOVE_PCIE1 : IRQ_DOVE_PCIE0;
+}
+
 static struct pci_bus __init *
 dove_pcie_scan_bus(int nr, struct pci_sys_data *sys)
 {
@@ -172,6 +180,8 @@ dove_pcie_scan_bus(int nr, struct pci_sys_data *sys)
 	bridge->sysdata = sys;
 	bridge->busnr = sys->busnr;
 	bridge->ops = &pcie_ops;
+	bridge->map_irq = dove_pcie_map_irq;
+	bridge->swizzle_irq = pci_common_swizzle;
 
 	ret = pci_scan_root_bus_bridge(bridge);
 	if (ret < 0) {
@@ -182,14 +192,6 @@ dove_pcie_scan_bus(int nr, struct pci_sys_data *sys)
 	return bridge->bus;
 }
 
-static int __init dove_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
-	struct pci_sys_data *sys = dev->sysdata;
-	struct pcie_port *pp = sys->private_data;
-
-	return pp->index ? IRQ_DOVE_PCIE1 : IRQ_DOVE_PCIE0;
-}
-
 static struct hw_pci dove_pci __initdata = {
 	.nr_controllers	= 2,
 	.setup		= dove_pcie_setup,
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
index b0a8ded..3a7f960 100644
--- a/arch/arm/mach-iop13xx/pci.c
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -537,6 +537,7 @@ struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
 	bridge->dev.parent = NULL;
 	bridge->sysdata = sys;
 	bridge->busnr = sys->busnr;
+	bridge->swizzle_irq = pci_common_swizzle;
 
 	switch (which_atu) {
 	case IOP13XX_INIT_ATU_ATUX:
@@ -556,6 +557,7 @@ struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
 		break;
 	case IOP13XX_INIT_ATU_ATUE:
 		bridge->ops = &iop13xx_atue_ops;
+		bridge->map_irq = iop13xx_pcie_map_irq;
 		ret = pci_scan_root_bus_bridge(bridge);
 		if (ret < 0) {
 			pci_free_host_bridge(bridge);
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index 6dc4c89..86335e7 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -555,6 +555,19 @@ int __init orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys)
 	return 0;
 }
 
+int __init orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+	int bus = dev->bus->number;
+
+	/*
+	 * PCIe endpoint?
+	 */
+	if (orion5x_pci_disabled || bus < orion5x_pci_local_bus_nr())
+		return IRQ_ORION5X_PCIE0_INT;
+
+	return -1;
+}
+
 struct pci_bus __init *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys)
 {
 	struct pci_host_bridge *bridge;
@@ -568,6 +581,8 @@ struct pci_bus __init *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys
 	bridge->dev.parent = NULL;
 	bridge->sysdata = sys;
 	bridge->busnr = sys->busnr;
+	bridge->map_irq = orion5x_pci_map_irq;
+	bridge->swizzle_irq = pci_common_swizzle;
 
 	if (nr == 0) {
 		bridge->ops = &pcie_ops;
@@ -585,16 +600,3 @@ struct pci_bus __init *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys
 	BUG();
 	return NULL;
 }
-
-int __init orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
-	int bus = dev->bus->number;
-
-	/*
-	 * PCIe endpoint?
-	 */
-	if (orion5x_pci_disabled || bus < orion5x_pci_local_bus_nr())
-		return IRQ_ORION5X_PCIE0_INT;
-
-	return -1;
-}
-- 
2.10.0

[RFC/RFT PATCH 18/18] ARM/ARM64: PCI: Drop pci_fixup_irqs() usage for DT based host controllers

[Lorenzo Pieralisi]

DT based PCI host controllers are currently relying on
pci_fixup_irqs() to assign legacy PCI irqs to devices. This is
broken in that pci_fixup_irqs() assign IRQs for all PCI devices
present in a given system some of which may well be enabled by
the time pci_fixup_irqs() is called (ie a system with multiple
host controllers). With the introduction of
struct pci_host_bridge.map_irq pointer it is possible to assign IRQs
for all devices originating from a PCI host bridge at probe time;
this is implemented through pci_assign_irq() that relies on the
struct pci_host_bridge.map_irq pointer to map IRQ for a given device.

The benefits this brings are twofold:

- the IRQ for a device is assigned once at probe time
- the IRQ assignment works also for hotplugged devices

Remove pci_fixup_irqs() call from all DT based PCI host controller
drivers. The map_irq() and swizzle_irq() struct pci_host_bridge callbacks
are either set-up in the respective PCI host controller driver or
delegated to ARM/ARM64 pcibios_root_bridge_prepare() implementations,
where, upon DT probe detection, the functions are set to DT defaults (ie
of_irq_parse_and_map_pci() and pci_common_swizzle() respectively.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Simon Horman <horms@verge.net.au>
Cc: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Joao Pinto <Joao.Pinto@synopsys.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Ley Foon Tan <lftan@altera.com>
---
 arch/arm/kernel/bios32.c               | 25 ++++++++++++++++++++
 arch/arm64/kernel/pci.c                | 32 ++++++++++++++++++++-----
 drivers/pci/dwc/pcie-designware-host.c |  5 ----
 drivers/pci/host/pci-host-common.c     |  4 ----
 drivers/pci/host/pci-tegra.c           |  3 ++-
 drivers/pci/host/pci-versatile.c       |  1 -
 drivers/pci/host/pcie-altera.c         |  1 -
 drivers/pci/host/pcie-iproc.c          | 43 ++++++++++++++++++++++------------
 drivers/pci/host/pcie-rcar.c           |  2 --
 drivers/pci/host/pcie-xilinx.c         |  3 ---
 10 files changed, 81 insertions(+), 38 deletions(-)

diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index a5b6d4f..09b2278 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -8,6 +8,7 @@
 #include <linux/export.h>
 #include <linux/kernel.h>
 #include <linux/pci.h>
+#include <linux/of_pci.h>
 #include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/io.h>
@@ -527,6 +528,30 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
 	}
 }
 
+int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
+{
+	/*
+	 * Set-up IRQ mapping/swizzingly functions.
+	 * If the either function pointer is already set,
+	 * do not override any of them since it is a host
+	 * controller specific mapping/swizzling function.
+	 */
+	if (!bridge->map_irq && !bridge->swizzle_irq) {
+		struct device *parent = bridge->dev.parent;
+		/*
+		 * If we have a parent pointer with a valid
+		 * OF node this means we are probing a PCI host
+		 * controller configured through DT firmware.
+		 */
+		if (IS_ENABLED(CONFIG_OF) && parent && parent->of_node) {
+			bridge->map_irq = of_irq_parse_and_map_pci;
+			bridge->swizzle_irq = pci_common_swizzle;
+		}
+	}
+
+	return 0;
+}
+
 void pci_common_init_dev(struct device *parent, struct hw_pci *hw)
 {
 	struct pci_sys_data *sys;
diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c
index 4f0e3eb..a680dcc 100644
--- a/arch/arm64/kernel/pci.c
+++ b/arch/arm64/kernel/pci.c
@@ -39,20 +39,18 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res,
 	return res->start;
 }
 
+#ifdef CONFIG_ACPI
 /*
  * Try to assign the IRQ number when probing a new device
  */
 int pcibios_alloc_irq(struct pci_dev *dev)
 {
-	if (acpi_disabled)
-		dev->irq = of_irq_parse_and_map_pci(dev, 0, 0);
-#ifdef CONFIG_ACPI
-	else
-		return acpi_pci_irq_enable(dev);
-#endif
+	if (!acpi_disabled)
+		acpi_pci_irq_enable(dev);
 
 	return 0;
 }
+#endif
 
 /*
  * raw_pci_read/write - Platform-specific PCI config space access.
@@ -105,12 +103,34 @@ int acpi_pci_bus_find_domain_nr(struct pci_bus *bus)
 
 int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
 {
+	struct device *parent = bridge->dev.parent;
+
 	if (!acpi_disabled) {
 		struct pci_config_window *cfg = bridge->bus->sysdata;
 		struct acpi_device *adev = to_acpi_device(cfg->parent);
 		ACPI_COMPANION_SET(&bridge->dev, adev);
 	}
 
+	/*
+	 * DT and ACPI systems use different mechanism to set-up legacy
+	 * IRQs. Through the bridge map_irq and swizzle_irq function
+	 * pointer we are capable of setting up legacy IRQs on DT systems,
+	 * check if we are probing a DT based host controller and initialize
+	 * the host bridge mapping/swizzling IRQ function accordingly.
+	 */
+	if (parent && parent->of_node) {
+		/*
+		 * Set-up IRQ mapping/swizzingly functions.
+		 * If the either function pointer is already set,
+		 * do not override any of them since it is a host
+		 * controller specific mapping/swizzling function.
+		 */
+		if (!bridge->map_irq && !bridge->swizzle_irq) {
+			bridge->map_irq = of_irq_parse_and_map_pci;
+			bridge->swizzle_irq = pci_common_swizzle;
+		}
+	}
+
 	return 0;
 }
 
diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
index e43c21a..8eeddb9 100644
--- a/drivers/pci/dwc/pcie-designware-host.c
+++ b/drivers/pci/dwc/pcie-designware-host.c
@@ -421,11 +421,6 @@ int dw_pcie_host_init(struct pcie_port *pp)
 	if (pp->ops->scan_bus)
 		pp->ops->scan_bus(pp);
 
-#ifdef CONFIG_ARM
-	/* support old dtbs that incorrectly describe IRQs */
-	pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
-#endif
-
 	pci_bus_size_bridges(bus);
 	pci_bus_assign_resources(bus);
 
diff --git a/drivers/pci/host/pci-host-common.c b/drivers/pci/host/pci-host-common.c
index e9a53ba..3e8fb57 100644
--- a/drivers/pci/host/pci-host-common.c
+++ b/drivers/pci/host/pci-host-common.c
@@ -145,10 +145,6 @@ int pci_host_common_probe(struct platform_device *pdev,
 		return -ENODEV;
 	}
 
-#ifdef CONFIG_ARM
-	pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
-#endif
-
 	/*
 	 * We insert PCI resources into the iomem_resource and
 	 * ioport_resource trees in either pci_bus_claim_resources()
diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
index ed8a93f..0527a89 100644
--- a/drivers/pci/host/pci-tegra.c
+++ b/drivers/pci/host/pci-tegra.c
@@ -2284,6 +2284,8 @@ static int tegra_pcie_probe(struct platform_device *pdev)
 	host->busnr = pcie->busn.start;
 	host->dev.parent = &pdev->dev;
 	host->ops = &tegra_pcie_ops;
+	host->map_irq = tegra_pcie_map_irq;
+	host->swizzle_irq = pci_common_swizzle;
 
 	err = pci_register_host_bridge(host);
 	if (err < 0) {
@@ -2293,7 +2295,6 @@ static int tegra_pcie_probe(struct platform_device *pdev)
 
 	pci_scan_child_bus(host->bus);
 
-	pci_fixup_irqs(pci_common_swizzle, tegra_pcie_map_irq);
 	pci_bus_size_bridges(host->bus);
 	pci_bus_assign_resources(host->bus);
 
diff --git a/drivers/pci/host/pci-versatile.c b/drivers/pci/host/pci-versatile.c
index 5ebee7d..c364b6a8 100644
--- a/drivers/pci/host/pci-versatile.c
+++ b/drivers/pci/host/pci-versatile.c
@@ -202,7 +202,6 @@ static int versatile_pci_probe(struct platform_device *pdev)
 	if (!bus)
 		return -ENOMEM;
 
-	pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
 	pci_assign_unassigned_bus_resources(bus);
 	list_for_each_entry(child, &bus->children, node)
 		pcie_bus_configure_settings(child);
diff --git a/drivers/pci/host/pcie-altera.c b/drivers/pci/host/pcie-altera.c
index 75ec5ce..0550f9d 100644
--- a/drivers/pci/host/pcie-altera.c
+++ b/drivers/pci/host/pcie-altera.c
@@ -618,7 +618,6 @@ static int altera_pcie_probe(struct platform_device *pdev)
 	if (!bus)
 		return -ENOMEM;
 
-	pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
 	pci_assign_unassigned_bus_resources(bus);
 
 	/* Configure PCI Express setting. */
diff --git a/drivers/pci/host/pcie-iproc.c b/drivers/pci/host/pcie-iproc.c
index 0f39bd2..bc9e36a 100644
--- a/drivers/pci/host/pcie-iproc.c
+++ b/drivers/pci/host/pcie-iproc.c
@@ -1205,7 +1205,8 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
 	struct device *dev;
 	int ret;
 	void *sysdata;
-	struct pci_bus *bus, *child;
+	struct pci_bus *child;
+	struct pci_host_bridge *host;
 
 	dev = pcie->dev;
 
@@ -1252,15 +1253,30 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
 	sysdata = pcie;
 #endif
 
-	bus = pci_create_root_bus(dev, 0, &iproc_pcie_ops, sysdata, res);
-	if (!bus) {
-		dev_err(dev, "unable to create PCI root bus\n");
+	host = pci_alloc_host_bridge(0);
+	if (!host) {
+		dev_err(dev, "unable to allocate PCI host bridge\n");
 		ret = -ENOMEM;
 		goto err_power_off_phy;
 	}
-	pcie->root_bus = bus;
 
-	ret = iproc_pcie_check_link(pcie, bus);
+	list_splice_init(res, &host->windows);
+	host->busnr = 0;
+	host->dev.parent = dev;
+	host->ops = &iproc_pcie_ops;
+	host->sysdata = sysdata;
+	host->map_irq = pcie->map_irq;
+	host->swizzle_irq = pci_common_swizzle;
+
+	ret = pci_register_host_bridge(host);
+	if (ret < 0) {
+		dev_err(dev, "failed to register host: %d\n", ret);
+		goto err_power_off_phy;
+	}
+
+	pcie->root_bus = host->bus;
+
+	ret = iproc_pcie_check_link(pcie, host->bus);
 	if (ret) {
 		dev_err(dev, "no PCIe EP device detected\n");
 		goto err_rm_root_bus;
@@ -1272,22 +1288,19 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
 		if (iproc_pcie_msi_enable(pcie))
 			dev_info(dev, "not using iProc MSI\n");
 
-	pci_scan_child_bus(bus);
-	pci_assign_unassigned_bus_resources(bus);
-
-	if (pcie->map_irq)
-		pci_fixup_irqs(pci_common_swizzle, pcie->map_irq);
+	pci_scan_child_bus(host->bus);
+	pci_assign_unassigned_bus_resources(host->bus);
 
-	list_for_each_entry(child, &bus->children, node)
+	list_for_each_entry(child, &host->bus->children, node)
 		pcie_bus_configure_settings(child);
 
-	pci_bus_add_devices(bus);
+	pci_bus_add_devices(host->bus);
 
 	return 0;
 
 err_rm_root_bus:
-	pci_stop_root_bus(bus);
-	pci_remove_root_bus(bus);
+	pci_stop_root_bus(host->bus);
+	pci_remove_root_bus(host->bus);
 
 err_power_off_phy:
 	phy_power_off(pcie->phy);
diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
index 051b4db..d8b3679 100644
--- a/drivers/pci/host/pcie-rcar.c
+++ b/drivers/pci/host/pcie-rcar.c
@@ -480,8 +480,6 @@ static int rcar_pcie_enable(struct rcar_pcie *pcie)
 
 	bus = bridge->bus;
 
-	pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
-
 	pci_bus_size_bridges(bus);
 	pci_bus_assign_resources(bus);
 
diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c
index 7f030f5..22e7f61 100644
--- a/drivers/pci/host/pcie-xilinx.c
+++ b/drivers/pci/host/pcie-xilinx.c
@@ -683,9 +683,6 @@ static int xilinx_pcie_probe(struct platform_device *pdev)
 #endif
 	pci_scan_child_bus(bus);
 	pci_assign_unassigned_bus_resources(bus);
-#ifndef CONFIG_MICROBLAZE
-	pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
-#endif
 	list_for_each_entry(child, &bus->children, node)
 		pcie_bus_configure_settings(child);
 	pci_bus_add_devices(bus);
-- 
2.10.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 18/18] ARM/ARM64: PCI: Drop pci_fixup_irqs() usage for DT based host controllers

[Lorenzo Pieralisi]

DT based PCI host controllers are currently relying on
pci_fixup_irqs() to assign legacy PCI irqs to devices. This is
broken in that pci_fixup_irqs() assign IRQs for all PCI devices
present in a given system some of which may well be enabled by
the time pci_fixup_irqs() is called (ie a system with multiple
host controllers). With the introduction of
struct pci_host_bridge.map_irq pointer it is possible to assign IRQs
for all devices originating from a PCI host bridge at probe time;
this is implemented through pci_assign_irq() that relies on the
struct pci_host_bridge.map_irq pointer to map IRQ for a given device.

The benefits this brings are twofold:

- the IRQ for a device is assigned once at probe time
- the IRQ assignment works also for hotplugged devices

Remove pci_fixup_irqs() call from all DT based PCI host controller
drivers. The map_irq() and swizzle_irq() struct pci_host_bridge callbacks
are either set-up in the respective PCI host controller driver or
delegated to ARM/ARM64 pcibios_root_bridge_prepare() implementations,
where, upon DT probe detection, the functions are set to DT defaults (ie
of_irq_parse_and_map_pci() and pci_common_swizzle() respectively.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Simon Horman <horms@verge.net.au>
Cc: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Joao Pinto <Joao.Pinto@synopsys.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Ley Foon Tan <lftan@altera.com>
---
 arch/arm/kernel/bios32.c               | 25 ++++++++++++++++++++
 arch/arm64/kernel/pci.c                | 32 ++++++++++++++++++++-----
 drivers/pci/dwc/pcie-designware-host.c |  5 ----
 drivers/pci/host/pci-host-common.c     |  4 ----
 drivers/pci/host/pci-tegra.c           |  3 ++-
 drivers/pci/host/pci-versatile.c       |  1 -
 drivers/pci/host/pcie-altera.c         |  1 -
 drivers/pci/host/pcie-iproc.c          | 43 ++++++++++++++++++++++------------
 drivers/pci/host/pcie-rcar.c           |  2 --
 drivers/pci/host/pcie-xilinx.c         |  3 ---
 10 files changed, 81 insertions(+), 38 deletions(-)

diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index a5b6d4f..09b2278 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -8,6 +8,7 @@
 #include <linux/export.h>
 #include <linux/kernel.h>
 #include <linux/pci.h>
+#include <linux/of_pci.h>
 #include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/io.h>
@@ -527,6 +528,30 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
 	}
 }
 
+int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
+{
+	/*
+	 * Set-up IRQ mapping/swizzingly functions.
+	 * If the either function pointer is already set,
+	 * do not override any of them since it is a host
+	 * controller specific mapping/swizzling function.
+	 */
+	if (!bridge->map_irq && !bridge->swizzle_irq) {
+		struct device *parent = bridge->dev.parent;
+		/*
+		 * If we have a parent pointer with a valid
+		 * OF node this means we are probing a PCI host
+		 * controller configured through DT firmware.
+		 */
+		if (IS_ENABLED(CONFIG_OF) && parent && parent->of_node) {
+			bridge->map_irq = of_irq_parse_and_map_pci;
+			bridge->swizzle_irq = pci_common_swizzle;
+		}
+	}
+
+	return 0;
+}
+
 void pci_common_init_dev(struct device *parent, struct hw_pci *hw)
 {
 	struct pci_sys_data *sys;
diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c
index 4f0e3eb..a680dcc 100644
--- a/arch/arm64/kernel/pci.c
+++ b/arch/arm64/kernel/pci.c
@@ -39,20 +39,18 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res,
 	return res->start;
 }
 
+#ifdef CONFIG_ACPI
 /*
  * Try to assign the IRQ number when probing a new device
  */
 int pcibios_alloc_irq(struct pci_dev *dev)
 {
-	if (acpi_disabled)
-		dev->irq = of_irq_parse_and_map_pci(dev, 0, 0);
-#ifdef CONFIG_ACPI
-	else
-		return acpi_pci_irq_enable(dev);
-#endif
+	if (!acpi_disabled)
+		acpi_pci_irq_enable(dev);
 
 	return 0;
 }
+#endif
 
 /*
  * raw_pci_read/write - Platform-specific PCI config space access.
@@ -105,12 +103,34 @@ int acpi_pci_bus_find_domain_nr(struct pci_bus *bus)
 
 int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
 {
+	struct device *parent = bridge->dev.parent;
+
 	if (!acpi_disabled) {
 		struct pci_config_window *cfg = bridge->bus->sysdata;
 		struct acpi_device *adev = to_acpi_device(cfg->parent);
 		ACPI_COMPANION_SET(&bridge->dev, adev);
 	}
 
+	/*
+	 * DT and ACPI systems use different mechanism to set-up legacy
+	 * IRQs. Through the bridge map_irq and swizzle_irq function
+	 * pointer we are capable of setting up legacy IRQs on DT systems,
+	 * check if we are probing a DT based host controller and initialize
+	 * the host bridge mapping/swizzling IRQ function accordingly.
+	 */
+	if (parent && parent->of_node) {
+		/*
+		 * Set-up IRQ mapping/swizzingly functions.
+		 * If the either function pointer is already set,
+		 * do not override any of them since it is a host
+		 * controller specific mapping/swizzling function.
+		 */
+		if (!bridge->map_irq && !bridge->swizzle_irq) {
+			bridge->map_irq = of_irq_parse_and_map_pci;
+			bridge->swizzle_irq = pci_common_swizzle;
+		}
+	}
+
 	return 0;
 }
 
diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
index e43c21a..8eeddb9 100644
--- a/drivers/pci/dwc/pcie-designware-host.c
+++ b/drivers/pci/dwc/pcie-designware-host.c
@@ -421,11 +421,6 @@ int dw_pcie_host_init(struct pcie_port *pp)
 	if (pp->ops->scan_bus)
 		pp->ops->scan_bus(pp);
 
-#ifdef CONFIG_ARM
-	/* support old dtbs that incorrectly describe IRQs */
-	pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
-#endif
-
 	pci_bus_size_bridges(bus);
 	pci_bus_assign_resources(bus);
 
diff --git a/drivers/pci/host/pci-host-common.c b/drivers/pci/host/pci-host-common.c
index e9a53ba..3e8fb57 100644
--- a/drivers/pci/host/pci-host-common.c
+++ b/drivers/pci/host/pci-host-common.c
@@ -145,10 +145,6 @@ int pci_host_common_probe(struct platform_device *pdev,
 		return -ENODEV;
 	}
 
-#ifdef CONFIG_ARM
-	pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
-#endif
-
 	/*
 	 * We insert PCI resources into the iomem_resource and
 	 * ioport_resource trees in either pci_bus_claim_resources()
diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
index ed8a93f..0527a89 100644
--- a/drivers/pci/host/pci-tegra.c
+++ b/drivers/pci/host/pci-tegra.c
@@ -2284,6 +2284,8 @@ static int tegra_pcie_probe(struct platform_device *pdev)
 	host->busnr = pcie->busn.start;
 	host->dev.parent = &pdev->dev;
 	host->ops = &tegra_pcie_ops;
+	host->map_irq = tegra_pcie_map_irq;
+	host->swizzle_irq = pci_common_swizzle;
 
 	err = pci_register_host_bridge(host);
 	if (err < 0) {
@@ -2293,7 +2295,6 @@ static int tegra_pcie_probe(struct platform_device *pdev)
 
 	pci_scan_child_bus(host->bus);
 
-	pci_fixup_irqs(pci_common_swizzle, tegra_pcie_map_irq);
 	pci_bus_size_bridges(host->bus);
 	pci_bus_assign_resources(host->bus);
 
diff --git a/drivers/pci/host/pci-versatile.c b/drivers/pci/host/pci-versatile.c
index 5ebee7d..c364b6a8 100644
--- a/drivers/pci/host/pci-versatile.c
+++ b/drivers/pci/host/pci-versatile.c
@@ -202,7 +202,6 @@ static int versatile_pci_probe(struct platform_device *pdev)
 	if (!bus)
 		return -ENOMEM;
 
-	pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
 	pci_assign_unassigned_bus_resources(bus);
 	list_for_each_entry(child, &bus->children, node)
 		pcie_bus_configure_settings(child);
diff --git a/drivers/pci/host/pcie-altera.c b/drivers/pci/host/pcie-altera.c
index 75ec5ce..0550f9d 100644
--- a/drivers/pci/host/pcie-altera.c
+++ b/drivers/pci/host/pcie-altera.c
@@ -618,7 +618,6 @@ static int altera_pcie_probe(struct platform_device *pdev)
 	if (!bus)
 		return -ENOMEM;
 
-	pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
 	pci_assign_unassigned_bus_resources(bus);
 
 	/* Configure PCI Express setting. */
diff --git a/drivers/pci/host/pcie-iproc.c b/drivers/pci/host/pcie-iproc.c
index 0f39bd2..bc9e36a 100644
--- a/drivers/pci/host/pcie-iproc.c
+++ b/drivers/pci/host/pcie-iproc.c
@@ -1205,7 +1205,8 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
 	struct device *dev;
 	int ret;
 	void *sysdata;
-	struct pci_bus *bus, *child;
+	struct pci_bus *child;
+	struct pci_host_bridge *host;
 
 	dev = pcie->dev;
 
@@ -1252,15 +1253,30 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
 	sysdata = pcie;
 #endif
 
-	bus = pci_create_root_bus(dev, 0, &iproc_pcie_ops, sysdata, res);
-	if (!bus) {
-		dev_err(dev, "unable to create PCI root bus\n");
+	host = pci_alloc_host_bridge(0);
+	if (!host) {
+		dev_err(dev, "unable to allocate PCI host bridge\n");
 		ret = -ENOMEM;
 		goto err_power_off_phy;
 	}
-	pcie->root_bus = bus;
 
-	ret = iproc_pcie_check_link(pcie, bus);
+	list_splice_init(res, &host->windows);
+	host->busnr = 0;
+	host->dev.parent = dev;
+	host->ops = &iproc_pcie_ops;
+	host->sysdata = sysdata;
+	host->map_irq = pcie->map_irq;
+	host->swizzle_irq = pci_common_swizzle;
+
+	ret = pci_register_host_bridge(host);
+	if (ret < 0) {
+		dev_err(dev, "failed to register host: %d\n", ret);
+		goto err_power_off_phy;
+	}
+
+	pcie->root_bus = host->bus;
+
+	ret = iproc_pcie_check_link(pcie, host->bus);
 	if (ret) {
 		dev_err(dev, "no PCIe EP device detected\n");
 		goto err_rm_root_bus;
@@ -1272,22 +1288,19 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
 		if (iproc_pcie_msi_enable(pcie))
 			dev_info(dev, "not using iProc MSI\n");
 
-	pci_scan_child_bus(bus);
-	pci_assign_unassigned_bus_resources(bus);
-
-	if (pcie->map_irq)
-		pci_fixup_irqs(pci_common_swizzle, pcie->map_irq);
+	pci_scan_child_bus(host->bus);
+	pci_assign_unassigned_bus_resources(host->bus);
 
-	list_for_each_entry(child, &bus->children, node)
+	list_for_each_entry(child, &host->bus->children, node)
 		pcie_bus_configure_settings(child);
 
-	pci_bus_add_devices(bus);
+	pci_bus_add_devices(host->bus);
 
 	return 0;
 
 err_rm_root_bus:
-	pci_stop_root_bus(bus);
-	pci_remove_root_bus(bus);
+	pci_stop_root_bus(host->bus);
+	pci_remove_root_bus(host->bus);
 
 err_power_off_phy:
 	phy_power_off(pcie->phy);
diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
index 051b4db..d8b3679 100644
--- a/drivers/pci/host/pcie-rcar.c
+++ b/drivers/pci/host/pcie-rcar.c
@@ -480,8 +480,6 @@ static int rcar_pcie_enable(struct rcar_pcie *pcie)
 
 	bus = bridge->bus;
 
-	pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
-
 	pci_bus_size_bridges(bus);
 	pci_bus_assign_resources(bus);
 
diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c
index 7f030f5..22e7f61 100644
--- a/drivers/pci/host/pcie-xilinx.c
+++ b/drivers/pci/host/pcie-xilinx.c
@@ -683,9 +683,6 @@ static int xilinx_pcie_probe(struct platform_device *pdev)
 #endif
 	pci_scan_child_bus(bus);
 	pci_assign_unassigned_bus_resources(bus);
-#ifndef CONFIG_MICROBLAZE
-	pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
-#endif
 	list_for_each_entry(child, &bus->children, node)
 		pcie_bus_configure_settings(child);
 	pci_bus_add_devices(bus);
-- 
2.10.0

Re: [RFC/RFT PATCH 07/18] ARM: PCI: orion5x: Convert PCI scan API to pci_scan_root_bus_bridge()

[Andrew Lunn]

On Wed, Apr 26, 2017 at 12:17:58PM +0100, Lorenzo Pieralisi wrote:
> The introduction of pci_scan_root_bus_bridge() provides a PCI core
> API to scan a PCI root bus backed by an already initialized
> struct pci_host_bridge object, which simplifies the bus scan
> interface and makes the PCI scan root bus interface easier to
> generalize as members are added to the struct pci_host_bridge().
> 
> Convert ARM orion5x platform code to pci_scan_root_bus_bridge() to
> improve the PCI root bus scanning interface.

Hi Lorenzo

Maybe there is something not right here.

With plain 4.11-rc7 i get:

root@orion5x:~# lspci -v
0000:00:00.0 Memory controller: Marvell Technology Group Ltd. 88f5182 [Orion-NAS] ARM SoC (rev 02)
        Subsystem: Marvell Technology Group Ltd. Device 11ab
        Flags: bus master, fast devsel, latency 0, IRQ 12
        Memory at <ignored> (64-bit, prefetchable)
        Capabilities: [40] Power Management version 2
        Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
        Capabilities: [60] Express Root Port (Slot-), MSI 00

0001:01:00.0 Memory controller: Marvell Technology Group Ltd. 88f5182 [Orion-NAS] ARM SoC (rev 02)
        Flags: bus master, fast Back2Back, 66MHz, medium devsel, latency 0
        BIST result: 00
        Memory at <unassigned> (64-bit, prefetchable)
        Memory at <ignored> (64-bit, prefetchable)
        Memory at <ignored> (64-bit, non-prefetchable)
        Expansion ROM at <ignored> [disabled]
        Capabilities: [40] Power Management version 2
        Capabilities: [48] Vital Product Data
        Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
        Capabilities: [60] PCI-X non-bridge device
        Capabilities: [68] CompactPCI hot-swap <?>

However, with your patches applied i get:

0000:00:00.0 Memory controller: Marvell Technology Group Ltd. 88f5182 [Orion-NAS] ARM SoC (rev 02)
        Subsystem: Marvell Technology Group Ltd. Device 11ab
        Flags: bus master, fast devsel, latency 0
        Memory at <ignored> (64-bit, prefetchable)
        Capabilities: [40] Power Management version 2
        Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
        Capabilities: [60] Express Root Port (Slot-), MSI 00

0001:01:00.0 Memory controller: Marvell Technology Group Ltd. 88f5182 [Orion-NAS] ARM SoC (rev 02)
        Flags: bus master, fast Back2Back, 66MHz, medium devsel, latency 0
        BIST result: 00
        Memory at <unassigned> (64-bit, prefetchable)
        Memory at <ignored> (64-bit, prefetchable)
        Memory at <ignored> (64-bit, non-prefetchable)
        Expansion ROM at <ignored> [disabled]
        Capabilities: [40] Power Management version 2
        Capabilities: [48] Vital Product Data
        Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
        Capabilities: [60] PCI-X non-bridge device
        Capabilities: [68] CompactPCI hot-swap <?>

Note that IRQ 12 has disappeared from Flags: on 0000:00:00.0.

Since there are no actual PCI devices on this bus, i cannot test if
interrupts are broken.

	   Andrew

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 07/18] ARM: PCI: orion5x: Convert PCI scan API to pci_scan_root_bus_bridge()

[Andrew Lunn]

On Wed, Apr 26, 2017 at 12:17:58PM +0100, Lorenzo Pieralisi wrote:
> The introduction of pci_scan_root_bus_bridge() provides a PCI core
> API to scan a PCI root bus backed by an already initialized
> struct pci_host_bridge object, which simplifies the bus scan
> interface and makes the PCI scan root bus interface easier to
> generalize as members are added to the struct pci_host_bridge().
> 
> Convert ARM orion5x platform code to pci_scan_root_bus_bridge() to
> improve the PCI root bus scanning interface.

Hi Lorenzo

Maybe there is something not right here.

With plain 4.11-rc7 i get:

root at orion5x:~# lspci -v
0000:00:00.0 Memory controller: Marvell Technology Group Ltd. 88f5182 [Orion-NAS] ARM SoC (rev 02)
        Subsystem: Marvell Technology Group Ltd. Device 11ab
        Flags: bus master, fast devsel, latency 0, IRQ 12
        Memory at <ignored> (64-bit, prefetchable)
        Capabilities: [40] Power Management version 2
        Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
        Capabilities: [60] Express Root Port (Slot-), MSI 00

0001:01:00.0 Memory controller: Marvell Technology Group Ltd. 88f5182 [Orion-NAS] ARM SoC (rev 02)
        Flags: bus master, fast Back2Back, 66MHz, medium devsel, latency 0
        BIST result: 00
        Memory at <unassigned> (64-bit, prefetchable)
        Memory at <ignored> (64-bit, prefetchable)
        Memory at <ignored> (64-bit, non-prefetchable)
        Expansion ROM at <ignored> [disabled]
        Capabilities: [40] Power Management version 2
        Capabilities: [48] Vital Product Data
        Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
        Capabilities: [60] PCI-X non-bridge device
        Capabilities: [68] CompactPCI hot-swap <?>

However, with your patches applied i get:

0000:00:00.0 Memory controller: Marvell Technology Group Ltd. 88f5182 [Orion-NAS] ARM SoC (rev 02)
        Subsystem: Marvell Technology Group Ltd. Device 11ab
        Flags: bus master, fast devsel, latency 0
        Memory at <ignored> (64-bit, prefetchable)
        Capabilities: [40] Power Management version 2
        Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
        Capabilities: [60] Express Root Port (Slot-), MSI 00

0001:01:00.0 Memory controller: Marvell Technology Group Ltd. 88f5182 [Orion-NAS] ARM SoC (rev 02)
        Flags: bus master, fast Back2Back, 66MHz, medium devsel, latency 0
        BIST result: 00
        Memory at <unassigned> (64-bit, prefetchable)
        Memory at <ignored> (64-bit, prefetchable)
        Memory at <ignored> (64-bit, non-prefetchable)
        Expansion ROM at <ignored> [disabled]
        Capabilities: [40] Power Management version 2
        Capabilities: [48] Vital Product Data
        Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
        Capabilities: [60] PCI-X non-bridge device
        Capabilities: [68] CompactPCI hot-swap <?>

Note that IRQ 12 has disappeared from Flags: on 0000:00:00.0.

Since there are no actual PCI devices on this bus, i cannot test if
interrupts are broken.

	   Andrew

Re: [RFC/RFT PATCH 07/18] ARM: PCI: orion5x: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

On Wed, Apr 26, 2017 at 05:12:57PM +0200, Andrew Lunn wrote:
> On Wed, Apr 26, 2017 at 12:17:58PM +0100, Lorenzo Pieralisi wrote:
> > The introduction of pci_scan_root_bus_bridge() provides a PCI core
> > API to scan a PCI root bus backed by an already initialized
> > struct pci_host_bridge object, which simplifies the bus scan
> > interface and makes the PCI scan root bus interface easier to
> > generalize as members are added to the struct pci_host_bridge().
> > 
> > Convert ARM orion5x platform code to pci_scan_root_bus_bridge() to
> > improve the PCI root bus scanning interface.
> 
> Hi Lorenzo
> 
> Maybe there is something not right here.
> 
> With plain 4.11-rc7 i get:
> 
> root@orion5x:~# lspci -v
> 0000:00:00.0 Memory controller: Marvell Technology Group Ltd. 88f5182 [Orion-NAS] ARM SoC (rev 02)
>         Subsystem: Marvell Technology Group Ltd. Device 11ab
>         Flags: bus master, fast devsel, latency 0, IRQ 12
>         Memory at <ignored> (64-bit, prefetchable)
>         Capabilities: [40] Power Management version 2
>         Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
>         Capabilities: [60] Express Root Port (Slot-), MSI 00
> 
> 0001:01:00.0 Memory controller: Marvell Technology Group Ltd. 88f5182 [Orion-NAS] ARM SoC (rev 02)
>         Flags: bus master, fast Back2Back, 66MHz, medium devsel, latency 0
>         BIST result: 00
>         Memory at <unassigned> (64-bit, prefetchable)
>         Memory at <ignored> (64-bit, prefetchable)
>         Memory at <ignored> (64-bit, non-prefetchable)
>         Expansion ROM at <ignored> [disabled]
>         Capabilities: [40] Power Management version 2
>         Capabilities: [48] Vital Product Data
>         Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
>         Capabilities: [60] PCI-X non-bridge device
>         Capabilities: [68] CompactPCI hot-swap <?>
> 
> However, with your patches applied i get:
> 
> 0000:00:00.0 Memory controller: Marvell Technology Group Ltd. 88f5182 [Orion-NAS] ARM SoC (rev 02)
>         Subsystem: Marvell Technology Group Ltd. Device 11ab
>         Flags: bus master, fast devsel, latency 0
>         Memory at <ignored> (64-bit, prefetchable)
>         Capabilities: [40] Power Management version 2
>         Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
>         Capabilities: [60] Express Root Port (Slot-), MSI 00
> 
> 0001:01:00.0 Memory controller: Marvell Technology Group Ltd. 88f5182 [Orion-NAS] ARM SoC (rev 02)
>         Flags: bus master, fast Back2Back, 66MHz, medium devsel, latency 0
>         BIST result: 00
>         Memory at <unassigned> (64-bit, prefetchable)
>         Memory at <ignored> (64-bit, prefetchable)
>         Memory at <ignored> (64-bit, non-prefetchable)
>         Expansion ROM at <ignored> [disabled]
>         Capabilities: [40] Power Management version 2
>         Capabilities: [48] Vital Product Data
>         Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
>         Capabilities: [60] PCI-X non-bridge device
>         Capabilities: [68] CompactPCI hot-swap <?>
> 
> Note that IRQ 12 has disappeared from Flags: on 0000:00:00.0.

Thank you for testing it, that's exactly what we need.

To check if the plumbing is working (ie to check I have not messed
up the bus scan API rework), mind testing the patch below please
and report back (it applies on top of this series) ?

Thanks !
Lorenzo

-- >8 --
diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index 4632fa4..afa7271 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -400,8 +400,6 @@ static int pci_device_probe(struct device *dev)
 	struct pci_dev *pci_dev = to_pci_dev(dev);
 	struct pci_driver *drv = to_pci_driver(dev->driver);
 
-	pci_assign_irq(pci_dev);
-
 	error = pcibios_alloc_irq(pci_dev);
 	if (error < 0)
 		return error;
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index de259f3..dc9a1b6 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -1967,6 +1967,8 @@ void pci_device_add(struct pci_dev *dev, struct pci_bus *bus)
 	ret = pcibios_add_device(dev);
 	WARN_ON(ret < 0);
 
+	pci_assign_irq(dev);
+
 	/* Setup MSI irq domain */
 	pci_set_msi_domain(dev);
 

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 07/18] ARM: PCI: orion5x: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

On Wed, Apr 26, 2017 at 05:12:57PM +0200, Andrew Lunn wrote:
> On Wed, Apr 26, 2017 at 12:17:58PM +0100, Lorenzo Pieralisi wrote:
> > The introduction of pci_scan_root_bus_bridge() provides a PCI core
> > API to scan a PCI root bus backed by an already initialized
> > struct pci_host_bridge object, which simplifies the bus scan
> > interface and makes the PCI scan root bus interface easier to
> > generalize as members are added to the struct pci_host_bridge().
> > 
> > Convert ARM orion5x platform code to pci_scan_root_bus_bridge() to
> > improve the PCI root bus scanning interface.
> 
> Hi Lorenzo
> 
> Maybe there is something not right here.
> 
> With plain 4.11-rc7 i get:
> 
> root at orion5x:~# lspci -v
> 0000:00:00.0 Memory controller: Marvell Technology Group Ltd. 88f5182 [Orion-NAS] ARM SoC (rev 02)
>         Subsystem: Marvell Technology Group Ltd. Device 11ab
>         Flags: bus master, fast devsel, latency 0, IRQ 12
>         Memory at <ignored> (64-bit, prefetchable)
>         Capabilities: [40] Power Management version 2
>         Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
>         Capabilities: [60] Express Root Port (Slot-), MSI 00
> 
> 0001:01:00.0 Memory controller: Marvell Technology Group Ltd. 88f5182 [Orion-NAS] ARM SoC (rev 02)
>         Flags: bus master, fast Back2Back, 66MHz, medium devsel, latency 0
>         BIST result: 00
>         Memory at <unassigned> (64-bit, prefetchable)
>         Memory at <ignored> (64-bit, prefetchable)
>         Memory at <ignored> (64-bit, non-prefetchable)
>         Expansion ROM at <ignored> [disabled]
>         Capabilities: [40] Power Management version 2
>         Capabilities: [48] Vital Product Data
>         Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
>         Capabilities: [60] PCI-X non-bridge device
>         Capabilities: [68] CompactPCI hot-swap <?>
> 
> However, with your patches applied i get:
> 
> 0000:00:00.0 Memory controller: Marvell Technology Group Ltd. 88f5182 [Orion-NAS] ARM SoC (rev 02)
>         Subsystem: Marvell Technology Group Ltd. Device 11ab
>         Flags: bus master, fast devsel, latency 0
>         Memory at <ignored> (64-bit, prefetchable)
>         Capabilities: [40] Power Management version 2
>         Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
>         Capabilities: [60] Express Root Port (Slot-), MSI 00
> 
> 0001:01:00.0 Memory controller: Marvell Technology Group Ltd. 88f5182 [Orion-NAS] ARM SoC (rev 02)
>         Flags: bus master, fast Back2Back, 66MHz, medium devsel, latency 0
>         BIST result: 00
>         Memory at <unassigned> (64-bit, prefetchable)
>         Memory at <ignored> (64-bit, prefetchable)
>         Memory at <ignored> (64-bit, non-prefetchable)
>         Expansion ROM at <ignored> [disabled]
>         Capabilities: [40] Power Management version 2
>         Capabilities: [48] Vital Product Data
>         Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
>         Capabilities: [60] PCI-X non-bridge device
>         Capabilities: [68] CompactPCI hot-swap <?>
> 
> Note that IRQ 12 has disappeared from Flags: on 0000:00:00.0.

Thank you for testing it, that's exactly what we need.

To check if the plumbing is working (ie to check I have not messed
up the bus scan API rework), mind testing the patch below please
and report back (it applies on top of this series) ?

Thanks !
Lorenzo

-- >8 --
diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index 4632fa4..afa7271 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -400,8 +400,6 @@ static int pci_device_probe(struct device *dev)
 	struct pci_dev *pci_dev = to_pci_dev(dev);
 	struct pci_driver *drv = to_pci_driver(dev->driver);
 
-	pci_assign_irq(pci_dev);
-
 	error = pcibios_alloc_irq(pci_dev);
 	if (error < 0)
 		return error;
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index de259f3..dc9a1b6 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -1967,6 +1967,8 @@ void pci_device_add(struct pci_dev *dev, struct pci_bus *bus)
 	ret = pcibios_add_device(dev);
 	WARN_ON(ret < 0);
 
+	pci_assign_irq(dev);
+
 	/* Setup MSI irq domain */
 	pci_set_msi_domain(dev);
 

Re: [RFC/RFT PATCH 07/18] ARM: PCI: orion5x: Convert PCI scan API to pci_scan_root_bus_bridge()

[Andrew Lunn]

> > Note that IRQ 12 has disappeared from Flags: on 0000:00:00.0.
> 
> Thank you for testing it, that's exactly what we need.
> 
> To check if the plumbing is working (ie to check I have not messed
> up the bus scan API rework), mind testing the patch below please
> and report back (it applies on top of this series) ?

0000:00:00.0 Memory controller: Marvell Technology Group Ltd. 88f5182 [Orion-NAS] ARM SoC (rev 02)
        Subsystem: Marvell Technology Group Ltd. Device 11ab
        Flags: bus master, fast devsel, latency 0, IRQ 12

The interrupt is back with this patch.

    Andrew

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 07/18] ARM: PCI: orion5x: Convert PCI scan API to pci_scan_root_bus_bridge()

[Andrew Lunn]

> > Note that IRQ 12 has disappeared from Flags: on 0000:00:00.0.
> 
> Thank you for testing it, that's exactly what we need.
> 
> To check if the plumbing is working (ie to check I have not messed
> up the bus scan API rework), mind testing the patch below please
> and report back (it applies on top of this series) ?

0000:00:00.0 Memory controller: Marvell Technology Group Ltd. 88f5182 [Orion-NAS] ARM SoC (rev 02)
        Subsystem: Marvell Technology Group Ltd. Device 11ab
        Flags: bus master, fast devsel, latency 0, IRQ 12

The interrupt is back with this patch.

    Andrew

Re: [RFC/RFT PATCH 07/18] ARM: PCI: orion5x: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

On Wed, Apr 26, 2017 at 08:53:48PM +0200, Andrew Lunn wrote:
> > > Note that IRQ 12 has disappeared from Flags: on 0000:00:00.0.
> > 
> > Thank you for testing it, that's exactly what we need.
> > 
> > To check if the plumbing is working (ie to check I have not messed
> > up the bus scan API rework), mind testing the patch below please
> > and report back (it applies on top of this series) ?
> 
> 0000:00:00.0 Memory controller: Marvell Technology Group Ltd. 88f5182 [Orion-NAS] ARM SoC (rev 02)
>         Subsystem: Marvell Technology Group Ltd. Device 11ab
>         Flags: bus master, fast devsel, latency 0, IRQ 12
> 
> The interrupt is back with this patch.

Ok the IRQ allocation works then, the difference is when the mapping
is called, original patch series moves the IRQ allocation to device
probe time (that's why IRQ does not show up, there is no matching
driver in the kernel for the PCI device above), with the additional
patch the IRQ allocation is done when the PCI device is added.

It is a user visible change, not sure though if that's a real issue,
that's exactly the reason why I posted this series, to find out
and converge.

Thanks !
Lorenzo

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 07/18] ARM: PCI: orion5x: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

On Wed, Apr 26, 2017 at 08:53:48PM +0200, Andrew Lunn wrote:
> > > Note that IRQ 12 has disappeared from Flags: on 0000:00:00.0.
> > 
> > Thank you for testing it, that's exactly what we need.
> > 
> > To check if the plumbing is working (ie to check I have not messed
> > up the bus scan API rework), mind testing the patch below please
> > and report back (it applies on top of this series) ?
> 
> 0000:00:00.0 Memory controller: Marvell Technology Group Ltd. 88f5182 [Orion-NAS] ARM SoC (rev 02)
>         Subsystem: Marvell Technology Group Ltd. Device 11ab
>         Flags: bus master, fast devsel, latency 0, IRQ 12
> 
> The interrupt is back with this patch.

Ok the IRQ allocation works then, the difference is when the mapping
is called, original patch series moves the IRQ allocation to device
probe time (that's why IRQ does not show up, there is no matching
driver in the kernel for the PCI device above), with the additional
patch the IRQ allocation is done when the PCI device is added.

It is a user visible change, not sure though if that's a real issue,
that's exactly the reason why I posted this series, to find out
and converge.

Thanks !
Lorenzo

Re: [RFC/RFT PATCH 00/18] PCI: ARM/ARM64: remove pci_fixup_irqs() usage

[Thierry Reding]

[-- Attachment #1.1: Type: text/plain, Size: 3831 bytes --]

On Wed, Apr 26, 2017 at 12:17:51PM +0100, Lorenzo Pieralisi wrote:
> Current pci_fixup_irqs() usage on ARM/ARM64 host controller drivers is
> flawed in that pci_fixup_irqs() allocates IRQs for all PCI devices present
> in a system; those PCI devices possibly belong to different PCI bus trees
> (and possibly rooted at different host bridges) and may well be enabled
> (ie probed and bound to a driver) by the time pci_fixup_irqs() is called
> when probing a given host bridge driver.
> 
> Furthermore, current kernel code relying on pci_fixup_irqs() to
> assign legacy PCI IRQs to devices does not work at all for
> hotplugged devices in that the code carrying out the IRQ fixup
> is called at host bridge driver probe time, which just cannot take
> into account devices hotplugged after system has booted.
> 
> By leveraging Matthew Minter's patch series (and its purpose):
> 
> http://lkml.kernel.org/r/1445576642-29624-2-git-send-email-matt@masarand.com
> 
> this series[1] adds IRQs mapping and swizzling primitives to
> the struct pci_host_bridge which allows IRQs to be allocated for
> for a device at probe time with host bridge specific functions,
> fixing the aforementioned limitations.
> 
> Current series remove pci_fixup_irqs() usage on ARM/ARM64; removal
> can be extended to other architectures provided the IRQs map/swizzle
> functions are set-up properly in the respective host bridges
> set-up/probe paths.
> 
> Tested on kvmtool with PCI host generic.

I've tested this on Jetson TX1 (though I need a small patch specific to
Tegra on top to fix a preexisting issue) and things seem to be working
normally.

The output of "lspci -v" is identical before and after applying the
series (on top of next-20170427):

-sh-4.4# lspci -v
00:01.0 PCI bridge: NVIDIA Corporation Device 0fae (rev a1) (prog-if 00 [Normal decode])
        Flags: bus master, fast devsel, latency 0, IRQ 348
        Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
        I/O behind bridge: 00001000-00001fff [size=4K]
        Memory behind bridge: 13000000-130fffff [size=1M]
        Prefetchable memory behind bridge: 0000000020000000-00000000200fffff [size=1M]
        Capabilities: [40] Subsystem: NVIDIA Corporation Device 0000
        Capabilities: [48] Power Management version 3
        Capabilities: [50] MSI: Enable+ Count=1/2 Maskable- 64bit+
        Capabilities: [60] HyperTransport: MSI Mapping Enable- Fixed-
        Capabilities: [80] Express Root Port (Slot+), MSI 00
        Capabilities: [100] #00
        Capabilities: [140] L1 PM Substates
        Kernel driver in use: pcieport

01:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller (rev 02)
        Subsystem: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller
        Flags: bus master, fast devsel, latency 0, IRQ 349
        I/O ports at 1000 [size=256]
        Memory at 13000000 (64-bit, non-prefetchable) [size=4K]
        Memory at 20000000 (64-bit, prefetchable) [size=64K]
        Capabilities: [40] Power Management version 3
        Capabilities: [50] MSI: Enable+ Count=1/1 Maskable- 64bit+
        Capabilities: [70] Express Endpoint, MSI 01
        Capabilities: [b0] MSI-X: Enable- Count=2 Masked-
        Capabilities: [d0] Vital Product Data
        Capabilities: [100] Advanced Error Reporting
        Capabilities: [140] Virtual Channel
        Capabilities: [160] Device Serial Number 8d-08-00-00-68-4c-e0-00
        Kernel driver in use: r8169

Note that the Realtek card is initialized by the r8169 driver and the
network card is used to boot over NFS.

My understanding is that this is what's expected, so:

Tested-by: Thierry Reding <treding@nvidia.com>

[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

[-- Attachment #2: Type: text/plain, Size: 176 bytes --]

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 00/18] PCI: ARM/ARM64: remove pci_fixup_irqs() usage

[Thierry Reding]

On Wed, Apr 26, 2017 at 12:17:51PM +0100, Lorenzo Pieralisi wrote:
> Current pci_fixup_irqs() usage on ARM/ARM64 host controller drivers is
> flawed in that pci_fixup_irqs() allocates IRQs for all PCI devices present
> in a system; those PCI devices possibly belong to different PCI bus trees
> (and possibly rooted at different host bridges) and may well be enabled
> (ie probed and bound to a driver) by the time pci_fixup_irqs() is called
> when probing a given host bridge driver.
> 
> Furthermore, current kernel code relying on pci_fixup_irqs() to
> assign legacy PCI IRQs to devices does not work at all for
> hotplugged devices in that the code carrying out the IRQ fixup
> is called at host bridge driver probe time, which just cannot take
> into account devices hotplugged after system has booted.
> 
> By leveraging Matthew Minter's patch series (and its purpose):
> 
> http://lkml.kernel.org/r/1445576642-29624-2-git-send-email-matt at masarand.com
> 
> this series[1] adds IRQs mapping and swizzling primitives to
> the struct pci_host_bridge which allows IRQs to be allocated for
> for a device at probe time with host bridge specific functions,
> fixing the aforementioned limitations.
> 
> Current series remove pci_fixup_irqs() usage on ARM/ARM64; removal
> can be extended to other architectures provided the IRQs map/swizzle
> functions are set-up properly in the respective host bridges
> set-up/probe paths.
> 
> Tested on kvmtool with PCI host generic.

I've tested this on Jetson TX1 (though I need a small patch specific to
Tegra on top to fix a preexisting issue) and things seem to be working
normally.

The output of "lspci -v" is identical before and after applying the
series (on top of next-20170427):

-sh-4.4# lspci -v
00:01.0 PCI bridge: NVIDIA Corporation Device 0fae (rev a1) (prog-if 00 [Normal decode])
        Flags: bus master, fast devsel, latency 0, IRQ 348
        Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
        I/O behind bridge: 00001000-00001fff [size=4K]
        Memory behind bridge: 13000000-130fffff [size=1M]
        Prefetchable memory behind bridge: 0000000020000000-00000000200fffff [size=1M]
        Capabilities: [40] Subsystem: NVIDIA Corporation Device 0000
        Capabilities: [48] Power Management version 3
        Capabilities: [50] MSI: Enable+ Count=1/2 Maskable- 64bit+
        Capabilities: [60] HyperTransport: MSI Mapping Enable- Fixed-
        Capabilities: [80] Express Root Port (Slot+), MSI 00
        Capabilities: [100] #00
        Capabilities: [140] L1 PM Substates
        Kernel driver in use: pcieport

01:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller (rev 02)
        Subsystem: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller
        Flags: bus master, fast devsel, latency 0, IRQ 349
        I/O ports at 1000 [size=256]
        Memory at 13000000 (64-bit, non-prefetchable) [size=4K]
        Memory at 20000000 (64-bit, prefetchable) [size=64K]
        Capabilities: [40] Power Management version 3
        Capabilities: [50] MSI: Enable+ Count=1/1 Maskable- 64bit+
        Capabilities: [70] Express Endpoint, MSI 01
        Capabilities: [b0] MSI-X: Enable- Count=2 Masked-
        Capabilities: [d0] Vital Product Data
        Capabilities: [100] Advanced Error Reporting
        Capabilities: [140] Virtual Channel
        Capabilities: [160] Device Serial Number 8d-08-00-00-68-4c-e0-00
        Kernel driver in use: r8169

Note that the Realtek card is initialized by the r8169 driver and the
network card is used to boot over NFS.

My understanding is that this is what's expected, so:

Tested-by: Thierry Reding <treding@nvidia.com>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 833 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20170427/a7d62976/attachment.sig>

Re: [RFC/RFT PATCH 01/18] PCI: Initialize bridge release function at bridge allocation

[Arnd Bergmann]

On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> The introduction of pci_register_host_bridge() kernel interface
> allows PCI host controller drivers to create the struct pci_host_bridge
> object, initialize it and register it with the kernel so that its
> corresponding PCI bus can be scanned and its devices probed.
>
> The host bridge device release function pci_release_host_bridge_dev is a
> static function common for all struct pci_host_bridge allocated objects,
> so in its current form cannot be used by PCI host bridge controllers
> drivers to initialize the allocated struct pci_host_bridge, which
> leaves struct pci_host_bridge devices release function uninitialized.
>
> Since pci_release_host_bridge_dev is a function common to all PCI
> host bridge objects, initialize it in pci_alloc_host_bridge() (ie
> common host bridge allocation interface) so that all struct
> pci_host_bridge objects have their release function initialized by
> default at allocation time, removing the need for exporting the
> common pci_release_host_bridge_dev function to other compilation
> units.
>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Arnd Bergmann <arnd@arndb.de>
> Cc: Bjorn Helgaas <bhelgaas@google.com>

Makes sense. I think originally I did not have the bridge->release_fn
callback, so drivers would have to provide their won release callback,
but this is no longer needed as they can override the release_fn instead.

Acked-by: Arnd Bergmann <arnd@arndb.de>

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 01/18] PCI: Initialize bridge release function at bridge allocation

[Arnd Bergmann]

On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> The introduction of pci_register_host_bridge() kernel interface
> allows PCI host controller drivers to create the struct pci_host_bridge
> object, initialize it and register it with the kernel so that its
> corresponding PCI bus can be scanned and its devices probed.
>
> The host bridge device release function pci_release_host_bridge_dev is a
> static function common for all struct pci_host_bridge allocated objects,
> so in its current form cannot be used by PCI host bridge controllers
> drivers to initialize the allocated struct pci_host_bridge, which
> leaves struct pci_host_bridge devices release function uninitialized.
>
> Since pci_release_host_bridge_dev is a function common to all PCI
> host bridge objects, initialize it in pci_alloc_host_bridge() (ie
> common host bridge allocation interface) so that all struct
> pci_host_bridge objects have their release function initialized by
> default at allocation time, removing the need for exporting the
> common pci_release_host_bridge_dev function to other compilation
> units.
>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Arnd Bergmann <arnd@arndb.de>
> Cc: Bjorn Helgaas <bhelgaas@google.com>

Makes sense. I think originally I did not have the bridge->release_fn
callback, so drivers would have to provide their won release callback,
but this is no longer needed as they can override the release_fn instead.

Acked-by: Arnd Bergmann <arnd@arndb.de>

Re: [RFC/RFT PATCH 02/18] PCI: Add pci_free_host_bridge interface

[Arnd Bergmann]

On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> Commit a52d1443bba1 ("PCI: Export host bridge registration interface")
> exported the pci_alloc_host_bridge() interface so that PCI host
> controllers drivers can make use of it.
>
> Introduce pci_alloc_host_bridge() kernel counterpart to free the
> host bridge data structures, pci_free_host_bridge(), export it
> and update kernel functions releasing host bridge objects allocated
> memory to make use of it.
>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Arnd Bergmann <arnd@arndb.de>
> Cc: Bjorn Helgaas <bhelgaas@google.com>

Acked-by: Arnd Bergmann <arnd@arndb.de>

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 02/18] PCI: Add pci_free_host_bridge interface

[Arnd Bergmann]

On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> Commit a52d1443bba1 ("PCI: Export host bridge registration interface")
> exported the pci_alloc_host_bridge() interface so that PCI host
> controllers drivers can make use of it.
>
> Introduce pci_alloc_host_bridge() kernel counterpart to free the
> host bridge data structures, pci_free_host_bridge(), export it
> and update kernel functions releasing host bridge objects allocated
> memory to make use of it.
>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Arnd Bergmann <arnd@arndb.de>
> Cc: Bjorn Helgaas <bhelgaas@google.com>

Acked-by: Arnd Bergmann <arnd@arndb.de>

Re: [RFC/RFT PATCH 03/18] PCI: Introduce pci_scan_root_bus_bridge()

[Arnd Bergmann]

On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> Current pci_scan_root_bus() interface is made up of two main
> code paths:
>
> - pci_create_root_bus()
> - pci_scan_child_bus()
>
> pci_create_root_bus() is a wrapper function that allows to create
> a struct pci_host_bridge structure, initialize it with the passed
> parameters and register it with the kernel.
>
> As the struct pci_host_bridge require additional struct members,
> pci_create_root_bus() parameters list has grown in time, making
> it unwieldy to add further parameters to it in case the struct
> pci_host_bridge gains more members fields to augment its functionality.
>
> Since PCI core code provides functions to allocate struct
> pci_host_bridge, instead of forcing the pci_create_root_bus() interface
> to add new parameters to cater for new struct pci_host_bridge
> functionality, it is more suitable to add an interface in PCI
> core code to scan a PCI bus straight from a struct pci_host_bridge
> created and customized by each specific PCI host controller driver.
>
> Add a pci_scan_root_bus_bridge() function to allow PCI host controller
> drivers to create and initialize struct pci_host_bridge and scan
> the resulting bus.
>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Arnd Bergmann <arnd@arndb.de>
> Cc: Bjorn Helgaas <bhelgaas@google.com>

Good idea, yes. To avoid growing the number of interfaces too
much, should we change the existing users of pci_register_host_bridge
in host drivers over to this entry point, and make the other one
local to probe.c then?

> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> index 7e4ffc4..c7a7f72 100644
> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -2412,6 +2412,44 @@ void pci_bus_release_busn_res(struct pci_bus *b)
>                         res, ret ? "can not be" : "is");
>  }
>
> +int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge)
> +{
> +       struct resource_entry *window;
> +       bool found = false;
> +       struct pci_bus *b;
> +       int max, bus, ret;
> +
> +       if (!bridge)
> +               return -EINVAL;
> +
> +       resource_list_for_each_entry(window, &bridge->windows)
> +               if (window->res->flags & IORESOURCE_BUS) {
> +                       found = true;
> +                       break;
> +               }
> +
> +       ret = pci_register_host_bridge(bridge);
> +       if (ret < 0)
> +               return ret;
> +
> +       b = bridge->bus;
> +       bus = bridge->busnr;
> +
> +       if (!found) {
> +               dev_info(&b->dev,
> +                "No busn resource found for root bus, will use [bus %02x-ff]\n",
> +                       bus);
> +               pci_bus_insert_busn_res(b, bus, 255);
> +       }
> +
> +       max = pci_scan_child_bus(b);
> +
> +       if (!found)
> +               pci_bus_update_busn_res_end(b, max);
> +
> +       return 0;
> +}
> +

We probably want an EXPORT_SYMBOL() here as well.

     Arnd

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 03/18] PCI: Introduce pci_scan_root_bus_bridge()

[Arnd Bergmann]

On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> Current pci_scan_root_bus() interface is made up of two main
> code paths:
>
> - pci_create_root_bus()
> - pci_scan_child_bus()
>
> pci_create_root_bus() is a wrapper function that allows to create
> a struct pci_host_bridge structure, initialize it with the passed
> parameters and register it with the kernel.
>
> As the struct pci_host_bridge require additional struct members,
> pci_create_root_bus() parameters list has grown in time, making
> it unwieldy to add further parameters to it in case the struct
> pci_host_bridge gains more members fields to augment its functionality.
>
> Since PCI core code provides functions to allocate struct
> pci_host_bridge, instead of forcing the pci_create_root_bus() interface
> to add new parameters to cater for new struct pci_host_bridge
> functionality, it is more suitable to add an interface in PCI
> core code to scan a PCI bus straight from a struct pci_host_bridge
> created and customized by each specific PCI host controller driver.
>
> Add a pci_scan_root_bus_bridge() function to allow PCI host controller
> drivers to create and initialize struct pci_host_bridge and scan
> the resulting bus.
>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Arnd Bergmann <arnd@arndb.de>
> Cc: Bjorn Helgaas <bhelgaas@google.com>

Good idea, yes. To avoid growing the number of interfaces too
much, should we change the existing users of pci_register_host_bridge
in host drivers over to this entry point, and make the other one
local to probe.c then?

> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> index 7e4ffc4..c7a7f72 100644
> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -2412,6 +2412,44 @@ void pci_bus_release_busn_res(struct pci_bus *b)
>                         res, ret ? "can not be" : "is");
>  }
>
> +int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge)
> +{
> +       struct resource_entry *window;
> +       bool found = false;
> +       struct pci_bus *b;
> +       int max, bus, ret;
> +
> +       if (!bridge)
> +               return -EINVAL;
> +
> +       resource_list_for_each_entry(window, &bridge->windows)
> +               if (window->res->flags & IORESOURCE_BUS) {
> +                       found = true;
> +                       break;
> +               }
> +
> +       ret = pci_register_host_bridge(bridge);
> +       if (ret < 0)
> +               return ret;
> +
> +       b = bridge->bus;
> +       bus = bridge->busnr;
> +
> +       if (!found) {
> +               dev_info(&b->dev,
> +                "No busn resource found for root bus, will use [bus %02x-ff]\n",
> +                       bus);
> +               pci_bus_insert_busn_res(b, bus, 255);
> +       }
> +
> +       max = pci_scan_child_bus(b);
> +
> +       if (!found)
> +               pci_bus_update_busn_res_end(b, max);
> +
> +       return 0;
> +}
> +

We probably want an EXPORT_SYMBOL() here as well.

     Arnd

Re: [RFC/RFT PATCH 05/18] ARM: PCI: dove: Convert PCI scan API to pci_scan_root_bus_bridge()

[Arnd Bergmann]

On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> The introduction of pci_scan_root_bus_bridge() provides a PCI core
> API to scan a PCI root bus backed by an already initialized
> struct pci_host_bridge object, which simplifies the bus scan
> interface and makes the PCI scan root bus interface easier to
> generalize as members are added to the struct pci_host_bridge().
>
> Convert ARM dove platform code to pci_scan_root_bus_bridge() to improve
> the PCI root bus scanning interface.
>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>

Is this patch required for one of the later steps in the series?

As non-DT dove uses the traditional pci_common_init() helper rather
than registering its own driver, I wonder if there is anything to gain here.

        Arnd

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 05/18] ARM: PCI: dove: Convert PCI scan API to pci_scan_root_bus_bridge()

[Arnd Bergmann]

On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> The introduction of pci_scan_root_bus_bridge() provides a PCI core
> API to scan a PCI root bus backed by an already initialized
> struct pci_host_bridge object, which simplifies the bus scan
> interface and makes the PCI scan root bus interface easier to
> generalize as members are added to the struct pci_host_bridge().
>
> Convert ARM dove platform code to pci_scan_root_bus_bridge() to improve
> the PCI root bus scanning interface.
>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>

Is this patch required for one of the later steps in the series?

As non-DT dove uses the traditional pci_common_init() helper rather
than registering its own driver, I wonder if there is anything to gain here.

        Arnd

Re: [RFC/RFT PATCH 04/18] ARM: PCI: bios32: Convert PCI scan API to pci_scan_root_bus_bridge()

[Arnd Bergmann]

On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:

> @@ -483,10 +483,31 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
>
>                         if (hw->scan)
>                                 sys->bus = hw->scan(nr, sys);
> -                       else
> -                               sys->bus = pci_scan_root_bus_msi(parent,
> -                                       sys->busnr, hw->ops, sys,
> -                                       &sys->resources, hw->msi_ctrl);
> +                       else {
> +                               bridge = pci_alloc_host_bridge(0);
> +                               if (!bridge) {
> +                                       kfree(sys);
> +                                       break;
> +                               }

I think for consistency, the pci_alloc_host_bridge() here should replace
the sys=kzalloc(sizeof(struct pci_sys_data), GFP_KERNEL), and
the pci_sys_data made the bridge->private pointer.

      Arnd

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 04/18] ARM: PCI: bios32: Convert PCI scan API to pci_scan_root_bus_bridge()

[Arnd Bergmann]

On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:

> @@ -483,10 +483,31 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
>
>                         if (hw->scan)
>                                 sys->bus = hw->scan(nr, sys);
> -                       else
> -                               sys->bus = pci_scan_root_bus_msi(parent,
> -                                       sys->busnr, hw->ops, sys,
> -                                       &sys->resources, hw->msi_ctrl);
> +                       else {
> +                               bridge = pci_alloc_host_bridge(0);
> +                               if (!bridge) {
> +                                       kfree(sys);
> +                                       break;
> +                               }

I think for consistency, the pci_alloc_host_bridge() here should replace
the sys=kzalloc(sizeof(struct pci_sys_data), GFP_KERNEL), and
the pci_sys_data made the bridge->private pointer.

      Arnd

Re: [RFC/RFT PATCH 05/18] ARM: PCI: dove: Convert PCI scan API to pci_scan_root_bus_bridge()

[Arnd Bergmann]

On Fri, Apr 28, 2017 at 2:38 PM, Arnd Bergmann <arnd@arndb.de> wrote:
> On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
> <lorenzo.pieralisi@arm.com> wrote:
>> The introduction of pci_scan_root_bus_bridge() provides a PCI core
>> API to scan a PCI root bus backed by an already initialized
>> struct pci_host_bridge object, which simplifies the bus scan
>> interface and makes the PCI scan root bus interface easier to
>> generalize as members are added to the struct pci_host_bridge().
>>
>> Convert ARM dove platform code to pci_scan_root_bus_bridge() to improve
>> the PCI root bus scanning interface.
>>
>> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
>
> Is this patch required for one of the later steps in the series?
>
> As non-DT dove uses the traditional pci_common_init() helper rather
> than registering its own driver, I wonder if there is anything to gain here.

Thinking about it some more, if we make the change to allocate from
pcibios_init_hw(), we can also initialize most of the fields there and
do the cleanup in common code when the scan callback fails, which
in turn makes the changes in arch/arm/mach*/pci.c drivers very simple.

        Arnd

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 05/18] ARM: PCI: dove: Convert PCI scan API to pci_scan_root_bus_bridge()

[Arnd Bergmann]

On Fri, Apr 28, 2017 at 2:38 PM, Arnd Bergmann <arnd@arndb.de> wrote:
> On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
> <lorenzo.pieralisi@arm.com> wrote:
>> The introduction of pci_scan_root_bus_bridge() provides a PCI core
>> API to scan a PCI root bus backed by an already initialized
>> struct pci_host_bridge object, which simplifies the bus scan
>> interface and makes the PCI scan root bus interface easier to
>> generalize as members are added to the struct pci_host_bridge().
>>
>> Convert ARM dove platform code to pci_scan_root_bus_bridge() to improve
>> the PCI root bus scanning interface.
>>
>> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
>
> Is this patch required for one of the later steps in the series?
>
> As non-DT dove uses the traditional pci_common_init() helper rather
> than registering its own driver, I wonder if there is anything to gain here.

Thinking about it some more, if we make the change to allocate from
pcibios_init_hw(), we can also initialize most of the fields there and
do the cleanup in common code when the scan callback fails, which
in turn makes the changes in arch/arm/mach*/pci.c drivers very simple.

        Arnd

Re: [RFC/RFT PATCH 10/18] PCI: rcar: Convert PCI scan API to pci_scan_root_bus_bridge()

[Arnd Bergmann]

On Wed, Apr 26, 2017 at 1:18 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> The introduction of pci_scan_root_bus_bridge() provides a PCI core
> API to scan a PCI root bus backed by an already initialized
> struct pci_host_bridge object, which simplifies the bus scan
> interface and makes the PCI scan root bus interface easier to
> generalize as members are added to the struct pci_host_bridge().
>
> Convert PCI rcar host code to pci_scan_root_bus_bridge() to
> improve the PCI root bus scanning interface.
>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Cc: Simon Horman <horms@verge.net.au>
> ---
>  drivers/pci/host/pcie-rcar.c | 28 ++++++++++++++++++----------
>  1 file changed, 18 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
> index cb07c45..051b4db 100644
> --- a/drivers/pci/host/pcie-rcar.c
> +++ b/drivers/pci/host/pcie-rcar.c
> @@ -451,27 +451,35 @@ static int rcar_pcie_enable(struct rcar_pcie *pcie)
>  {
>         struct device *dev = pcie->dev;
>         struct pci_bus *bus, *child;
> -       LIST_HEAD(res);
> +       struct pci_host_bridge *bridge;
> +       int ret;
> +
> +       bridge = pci_alloc_host_bridge(0);
> +       if (!bridge)
> +               return -ENOMEM;

The pci_alloc_host_bridge() here should also be moved into
rcare_pcie_probe(), replacing the devm_kzalloc there.

        Arnd

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 10/18] PCI: rcar: Convert PCI scan API to pci_scan_root_bus_bridge()

[Arnd Bergmann]

On Wed, Apr 26, 2017 at 1:18 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> The introduction of pci_scan_root_bus_bridge() provides a PCI core
> API to scan a PCI root bus backed by an already initialized
> struct pci_host_bridge object, which simplifies the bus scan
> interface and makes the PCI scan root bus interface easier to
> generalize as members are added to the struct pci_host_bridge().
>
> Convert PCI rcar host code to pci_scan_root_bus_bridge() to
> improve the PCI root bus scanning interface.
>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Cc: Simon Horman <horms@verge.net.au>
> ---
>  drivers/pci/host/pcie-rcar.c | 28 ++++++++++++++++++----------
>  1 file changed, 18 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
> index cb07c45..051b4db 100644
> --- a/drivers/pci/host/pcie-rcar.c
> +++ b/drivers/pci/host/pcie-rcar.c
> @@ -451,27 +451,35 @@ static int rcar_pcie_enable(struct rcar_pcie *pcie)
>  {
>         struct device *dev = pcie->dev;
>         struct pci_bus *bus, *child;
> -       LIST_HEAD(res);
> +       struct pci_host_bridge *bridge;
> +       int ret;
> +
> +       bridge = pci_alloc_host_bridge(0);
> +       if (!bridge)
> +               return -ENOMEM;

The pci_alloc_host_bridge() here should also be moved into
rcare_pcie_probe(), replacing the devm_kzalloc there.

        Arnd

Re: [RFC/RFT PATCH 18/18] ARM/ARM64: PCI: Drop pci_fixup_irqs() usage for DT based host controllers

[Arnd Bergmann]

On Wed, Apr 26, 2017 at 1:18 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> DT based PCI host controllers are currently relying on
> pci_fixup_irqs() to assign legacy PCI irqs to devices. This is
> broken in that pci_fixup_irqs() assign IRQs for all PCI devices
> present in a given system some of which may well be enabled by
> the time pci_fixup_irqs() is called (ie a system with multiple
> host controllers). With the introduction of
> struct pci_host_bridge.map_irq pointer it is possible to assign IRQs
> for all devices originating from a PCI host bridge at probe time;
> this is implemented through pci_assign_irq() that relies on the
> struct pci_host_bridge.map_irq pointer to map IRQ for a given device.
>
> The benefits this brings are twofold:
>
> - the IRQ for a device is assigned once at probe time
> - the IRQ assignment works also for hotplugged devices
>
> Remove pci_fixup_irqs() call from all DT based PCI host controller
> drivers. The map_irq() and swizzle_irq() struct pci_host_bridge callbacks
> are either set-up in the respective PCI host controller driver or
> delegated to ARM/ARM64 pcibios_root_bridge_prepare() implementations,
> where, upon DT probe detection, the functions are set to DT defaults (ie
> of_irq_parse_and_map_pci() and pci_common_swizzle() respectively.
>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>

Nice!

> +int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
> +{
> +       /*
> +        * Set-up IRQ mapping/swizzingly functions.
> +        * If the either function pointer is already set,
> +        * do not override any of them since it is a host
> +        * controller specific mapping/swizzling function.
> +        */
> +       if (!bridge->map_irq && !bridge->swizzle_irq) {
> +               struct device *parent = bridge->dev.parent;
> +               /*
> +                * If we have a parent pointer with a valid
> +                * OF node this means we are probing a PCI host
> +                * controller configured through DT firmware.
> +                */
> +               if (IS_ENABLED(CONFIG_OF) && parent && parent->of_node) {
> +                       bridge->map_irq = of_irq_parse_and_map_pci;
> +                       bridge->swizzle_irq = pci_common_swizzle;
> +               }
> +       }
> +
> +       return 0;
> +}

I think it would be better to reduce the number of global functions defined
by common code to be called from PCI core code, and instead use
additional callback pointers from the pci_host_bridge operations.

In particular, there are only very few existing users of
pcibios_root_bridge_prepare() at the moment, so we should
be able to get rid of those quite easily now.

> diff --git a/drivers/pci/host/pcie-iproc.c b/drivers/pci/host/pcie-iproc.c
> index 0f39bd2..bc9e36a 100644
> --- a/drivers/pci/host/pcie-iproc.c
> +++ b/drivers/pci/host/pcie-iproc.c
> @@ -1205,7 +1205,8 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
>         struct device *dev;
>         int ret;
>         void *sysdata;
> -       struct pci_bus *bus, *child;
> +       struct pci_bus *child;
> +       struct pci_host_bridge *host;
>
>         dev = pcie->dev;
>
> @@ -1252,15 +1253,30 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
>         sysdata = pcie;
>  #endif
>
> -       bus = pci_create_root_bus(dev, 0, &iproc_pcie_ops, sysdata, res);
> -       if (!bus) {

Could this be a separate patch?

      Arnd

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 18/18] ARM/ARM64: PCI: Drop pci_fixup_irqs() usage for DT based host controllers

[Arnd Bergmann]

On Wed, Apr 26, 2017 at 1:18 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> DT based PCI host controllers are currently relying on
> pci_fixup_irqs() to assign legacy PCI irqs to devices. This is
> broken in that pci_fixup_irqs() assign IRQs for all PCI devices
> present in a given system some of which may well be enabled by
> the time pci_fixup_irqs() is called (ie a system with multiple
> host controllers). With the introduction of
> struct pci_host_bridge.map_irq pointer it is possible to assign IRQs
> for all devices originating from a PCI host bridge at probe time;
> this is implemented through pci_assign_irq() that relies on the
> struct pci_host_bridge.map_irq pointer to map IRQ for a given device.
>
> The benefits this brings are twofold:
>
> - the IRQ for a device is assigned once at probe time
> - the IRQ assignment works also for hotplugged devices
>
> Remove pci_fixup_irqs() call from all DT based PCI host controller
> drivers. The map_irq() and swizzle_irq() struct pci_host_bridge callbacks
> are either set-up in the respective PCI host controller driver or
> delegated to ARM/ARM64 pcibios_root_bridge_prepare() implementations,
> where, upon DT probe detection, the functions are set to DT defaults (ie
> of_irq_parse_and_map_pci() and pci_common_swizzle() respectively.
>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>

Nice!

> +int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
> +{
> +       /*
> +        * Set-up IRQ mapping/swizzingly functions.
> +        * If the either function pointer is already set,
> +        * do not override any of them since it is a host
> +        * controller specific mapping/swizzling function.
> +        */
> +       if (!bridge->map_irq && !bridge->swizzle_irq) {
> +               struct device *parent = bridge->dev.parent;
> +               /*
> +                * If we have a parent pointer with a valid
> +                * OF node this means we are probing a PCI host
> +                * controller configured through DT firmware.
> +                */
> +               if (IS_ENABLED(CONFIG_OF) && parent && parent->of_node) {
> +                       bridge->map_irq = of_irq_parse_and_map_pci;
> +                       bridge->swizzle_irq = pci_common_swizzle;
> +               }
> +       }
> +
> +       return 0;
> +}

I think it would be better to reduce the number of global functions defined
by common code to be called from PCI core code, and instead use
additional callback pointers from the pci_host_bridge operations.

In particular, there are only very few existing users of
pcibios_root_bridge_prepare() at the moment, so we should
be able to get rid of those quite easily now.

> diff --git a/drivers/pci/host/pcie-iproc.c b/drivers/pci/host/pcie-iproc.c
> index 0f39bd2..bc9e36a 100644
> --- a/drivers/pci/host/pcie-iproc.c
> +++ b/drivers/pci/host/pcie-iproc.c
> @@ -1205,7 +1205,8 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
>         struct device *dev;
>         int ret;
>         void *sysdata;
> -       struct pci_bus *bus, *child;
> +       struct pci_bus *child;
> +       struct pci_host_bridge *host;
>
>         dev = pcie->dev;
>
> @@ -1252,15 +1253,30 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
>         sysdata = pcie;
>  #endif
>
> -       bus = pci_create_root_bus(dev, 0, &iproc_pcie_ops, sysdata, res);
> -       if (!bus) {

Could this be a separate patch?

      Arnd

Re: [RFC/RFT PATCH 08/18] PCI: designware: Convert PCI scan API to pci_scan_root_bus_bridge()

[Arnd Bergmann]

On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> The introduction of pci_scan_root_bus_bridge() provides a PCI core
> API to scan a PCI root bus backed by an already initialized
> struct pci_host_bridge object, which simplifies the bus scan
> interface and makes the PCI scan root bus interface easier to
> generalize as members are added to the struct pci_host_bridge().
>
> Convert PCI designware host code to pci_scan_root_bus_bridge() to
> improve the PCI root bus scanning interface.
>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Jingoo Han <jingoohan1@gmail.com>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Cc: Joao Pinto <Joao.Pinto@synopsys.com>
> ---
>  drivers/pci/dwc/pcie-designware-host.c | 36 +++++++++++++++++++++-------------
>  1 file changed, 22 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
> index 5ba3349..e43c21a 100644
> --- a/drivers/pci/dwc/pcie-designware-host.c
> +++ b/drivers/pci/dwc/pcie-designware-host.c
> @@ -294,16 +294,21 @@ int dw_pcie_host_init(struct pcie_port *pp)
>                 dev_err(dev, "missing *config* reg space\n");
>         }
>
> -       ret = of_pci_get_host_bridge_resources(np, 0, 0xff, &res, &pp->io_base);
> +       bridge = pci_alloc_host_bridge(0);
> +       if (!bridge)
> +               return  -ENOMEM;
> +

I think here we warn to have the pci_alloc_host_bridge() called in the
individual
drivers, to have them allocate the dw_pcie structure as part of the host
bridge allocation, before calling hisi_add_pcie_port().

      Arnd

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 08/18] PCI: designware: Convert PCI scan API to pci_scan_root_bus_bridge()

[Arnd Bergmann]

On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> The introduction of pci_scan_root_bus_bridge() provides a PCI core
> API to scan a PCI root bus backed by an already initialized
> struct pci_host_bridge object, which simplifies the bus scan
> interface and makes the PCI scan root bus interface easier to
> generalize as members are added to the struct pci_host_bridge().
>
> Convert PCI designware host code to pci_scan_root_bus_bridge() to
> improve the PCI root bus scanning interface.
>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Jingoo Han <jingoohan1@gmail.com>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Cc: Joao Pinto <Joao.Pinto@synopsys.com>
> ---
>  drivers/pci/dwc/pcie-designware-host.c | 36 +++++++++++++++++++++-------------
>  1 file changed, 22 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
> index 5ba3349..e43c21a 100644
> --- a/drivers/pci/dwc/pcie-designware-host.c
> +++ b/drivers/pci/dwc/pcie-designware-host.c
> @@ -294,16 +294,21 @@ int dw_pcie_host_init(struct pcie_port *pp)
>                 dev_err(dev, "missing *config* reg space\n");
>         }
>
> -       ret = of_pci_get_host_bridge_resources(np, 0, 0xff, &res, &pp->io_base);
> +       bridge = pci_alloc_host_bridge(0);
> +       if (!bridge)
> +               return  -ENOMEM;
> +

I think here we warn to have the pci_alloc_host_bridge() called in the
individual
drivers, to have them allocate the dw_pcie structure as part of the host
bridge allocation, before calling hisi_add_pcie_port().

      Arnd

Re: [RFC/RFT PATCH 03/18] PCI: Introduce pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

On Fri, Apr 28, 2017 at 02:28:38PM +0200, Arnd Bergmann wrote:
> On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
> <lorenzo.pieralisi@arm.com> wrote:
> > Current pci_scan_root_bus() interface is made up of two main
> > code paths:
> >
> > - pci_create_root_bus()
> > - pci_scan_child_bus()
> >
> > pci_create_root_bus() is a wrapper function that allows to create
> > a struct pci_host_bridge structure, initialize it with the passed
> > parameters and register it with the kernel.
> >
> > As the struct pci_host_bridge require additional struct members,
> > pci_create_root_bus() parameters list has grown in time, making
> > it unwieldy to add further parameters to it in case the struct
> > pci_host_bridge gains more members fields to augment its functionality.
> >
> > Since PCI core code provides functions to allocate struct
> > pci_host_bridge, instead of forcing the pci_create_root_bus() interface
> > to add new parameters to cater for new struct pci_host_bridge
> > functionality, it is more suitable to add an interface in PCI
> > core code to scan a PCI bus straight from a struct pci_host_bridge
> > created and customized by each specific PCI host controller driver.
> >
> > Add a pci_scan_root_bus_bridge() function to allow PCI host controller
> > drivers to create and initialize struct pci_host_bridge and scan
> > the resulting bus.
> >
> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: Arnd Bergmann <arnd@arndb.de>
> > Cc: Bjorn Helgaas <bhelgaas@google.com>
> 
> Good idea, yes. To avoid growing the number of interfaces too
> much, should we change the existing users of pci_register_host_bridge
> in host drivers over to this entry point, and make the other one
> local to probe.c then?

Yes, the problem is that there are drivers (ie pcie-iproc.c) that
require the struct pci_bus (created by pci_register_host_bridge())
to fiddle with it to check link status and THEN scan the bus (so
the pci_register_host_bridge() call can't be embedded in the scan
interface - the driver requires struct pci_bus for pci_ops to work
before scanning the bus itself).

I will see how I can accommodate this change because you definitely
have a point.

> > diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> > index 7e4ffc4..c7a7f72 100644
> > --- a/drivers/pci/probe.c
> > +++ b/drivers/pci/probe.c
> > @@ -2412,6 +2412,44 @@ void pci_bus_release_busn_res(struct pci_bus *b)
> >                         res, ret ? "can not be" : "is");
> >  }
> >
> > +int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge)
> > +{
> > +       struct resource_entry *window;
> > +       bool found = false;
> > +       struct pci_bus *b;
> > +       int max, bus, ret;
> > +
> > +       if (!bridge)
> > +               return -EINVAL;
> > +
> > +       resource_list_for_each_entry(window, &bridge->windows)
> > +               if (window->res->flags & IORESOURCE_BUS) {
> > +                       found = true;
> > +                       break;
> > +               }
> > +
> > +       ret = pci_register_host_bridge(bridge);
> > +       if (ret < 0)
> > +               return ret;
> > +
> > +       b = bridge->bus;
> > +       bus = bridge->busnr;
> > +
> > +       if (!found) {
> > +               dev_info(&b->dev,
> > +                "No busn resource found for root bus, will use [bus %02x-ff]\n",
> > +                       bus);
> > +               pci_bus_insert_busn_res(b, bus, 255);
> > +       }
> > +
> > +       max = pci_scan_child_bus(b);
> > +
> > +       if (!found)
> > +               pci_bus_update_busn_res_end(b, max);
> > +
> > +       return 0;
> > +}
> > +
> 
> We probably want an EXPORT_SYMBOL() here as well.

Yep, sure.

Thanks for having a look !

Lorenzo

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 03/18] PCI: Introduce pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

On Fri, Apr 28, 2017 at 02:28:38PM +0200, Arnd Bergmann wrote:
> On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
> <lorenzo.pieralisi@arm.com> wrote:
> > Current pci_scan_root_bus() interface is made up of two main
> > code paths:
> >
> > - pci_create_root_bus()
> > - pci_scan_child_bus()
> >
> > pci_create_root_bus() is a wrapper function that allows to create
> > a struct pci_host_bridge structure, initialize it with the passed
> > parameters and register it with the kernel.
> >
> > As the struct pci_host_bridge require additional struct members,
> > pci_create_root_bus() parameters list has grown in time, making
> > it unwieldy to add further parameters to it in case the struct
> > pci_host_bridge gains more members fields to augment its functionality.
> >
> > Since PCI core code provides functions to allocate struct
> > pci_host_bridge, instead of forcing the pci_create_root_bus() interface
> > to add new parameters to cater for new struct pci_host_bridge
> > functionality, it is more suitable to add an interface in PCI
> > core code to scan a PCI bus straight from a struct pci_host_bridge
> > created and customized by each specific PCI host controller driver.
> >
> > Add a pci_scan_root_bus_bridge() function to allow PCI host controller
> > drivers to create and initialize struct pci_host_bridge and scan
> > the resulting bus.
> >
> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: Arnd Bergmann <arnd@arndb.de>
> > Cc: Bjorn Helgaas <bhelgaas@google.com>
> 
> Good idea, yes. To avoid growing the number of interfaces too
> much, should we change the existing users of pci_register_host_bridge
> in host drivers over to this entry point, and make the other one
> local to probe.c then?

Yes, the problem is that there are drivers (ie pcie-iproc.c) that
require the struct pci_bus (created by pci_register_host_bridge())
to fiddle with it to check link status and THEN scan the bus (so
the pci_register_host_bridge() call can't be embedded in the scan
interface - the driver requires struct pci_bus for pci_ops to work
before scanning the bus itself).

I will see how I can accommodate this change because you definitely
have a point.

> > diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> > index 7e4ffc4..c7a7f72 100644
> > --- a/drivers/pci/probe.c
> > +++ b/drivers/pci/probe.c
> > @@ -2412,6 +2412,44 @@ void pci_bus_release_busn_res(struct pci_bus *b)
> >                         res, ret ? "can not be" : "is");
> >  }
> >
> > +int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge)
> > +{
> > +       struct resource_entry *window;
> > +       bool found = false;
> > +       struct pci_bus *b;
> > +       int max, bus, ret;
> > +
> > +       if (!bridge)
> > +               return -EINVAL;
> > +
> > +       resource_list_for_each_entry(window, &bridge->windows)
> > +               if (window->res->flags & IORESOURCE_BUS) {
> > +                       found = true;
> > +                       break;
> > +               }
> > +
> > +       ret = pci_register_host_bridge(bridge);
> > +       if (ret < 0)
> > +               return ret;
> > +
> > +       b = bridge->bus;
> > +       bus = bridge->busnr;
> > +
> > +       if (!found) {
> > +               dev_info(&b->dev,
> > +                "No busn resource found for root bus, will use [bus %02x-ff]\n",
> > +                       bus);
> > +               pci_bus_insert_busn_res(b, bus, 255);
> > +       }
> > +
> > +       max = pci_scan_child_bus(b);
> > +
> > +       if (!found)
> > +               pci_bus_update_busn_res_end(b, max);
> > +
> > +       return 0;
> > +}
> > +
> 
> We probably want an EXPORT_SYMBOL() here as well.

Yep, sure.

Thanks for having a look !

Lorenzo

Re: [RFC/RFT PATCH 03/18] PCI: Introduce pci_scan_root_bus_bridge()

[Arnd Bergmann]

On Tue, May 2, 2017 at 7:15 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> On Fri, Apr 28, 2017 at 02:28:38PM +0200, Arnd Bergmann wrote:
>> On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
>> <lorenzo.pieralisi@arm.com> wrote:
>>
>> Good idea, yes. To avoid growing the number of interfaces too
>> much, should we change the existing users of pci_register_host_bridge
>> in host drivers over to this entry point, and make the other one
>> local to probe.c then?
>
> Yes, the problem is that there are drivers (ie pcie-iproc.c) that
> require the struct pci_bus (created by pci_register_host_bridge())
> to fiddle with it to check link status and THEN scan the bus (so
> the pci_register_host_bridge() call can't be embedded in the scan
> interface - the driver requires struct pci_bus for pci_ops to work
> before scanning the bus itself).
>
> I will see how I can accommodate this change because you definitely
> have a point.

The obvious answer for that particular problem would be a link_check()
callback in the bridge operations. I think that would also fit in well with
the dw_pcie driver that has some private infrastructure for it. I don't
know if that callback is sufficient to solve all related problems though.

       Arnd

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 03/18] PCI: Introduce pci_scan_root_bus_bridge()

[Arnd Bergmann]

On Tue, May 2, 2017 at 7:15 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> On Fri, Apr 28, 2017 at 02:28:38PM +0200, Arnd Bergmann wrote:
>> On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
>> <lorenzo.pieralisi@arm.com> wrote:
>>
>> Good idea, yes. To avoid growing the number of interfaces too
>> much, should we change the existing users of pci_register_host_bridge
>> in host drivers over to this entry point, and make the other one
>> local to probe.c then?
>
> Yes, the problem is that there are drivers (ie pcie-iproc.c) that
> require the struct pci_bus (created by pci_register_host_bridge())
> to fiddle with it to check link status and THEN scan the bus (so
> the pci_register_host_bridge() call can't be embedded in the scan
> interface - the driver requires struct pci_bus for pci_ops to work
> before scanning the bus itself).
>
> I will see how I can accommodate this change because you definitely
> have a point.

The obvious answer for that particular problem would be a link_check()
callback in the bridge operations. I think that would also fit in well with
the dw_pcie driver that has some private infrastructure for it. I don't
know if that callback is sufficient to solve all related problems though.

       Arnd

Re: [RFC/RFT PATCH 08/18] PCI: designware: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

On Fri, Apr 28, 2017 at 03:13:04PM +0200, Arnd Bergmann wrote:
> On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
> <lorenzo.pieralisi@arm.com> wrote:
> > The introduction of pci_scan_root_bus_bridge() provides a PCI core
> > API to scan a PCI root bus backed by an already initialized
> > struct pci_host_bridge object, which simplifies the bus scan
> > interface and makes the PCI scan root bus interface easier to
> > generalize as members are added to the struct pci_host_bridge().
> >
> > Convert PCI designware host code to pci_scan_root_bus_bridge() to
> > improve the PCI root bus scanning interface.
> >
> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: Jingoo Han <jingoohan1@gmail.com>
> > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > Cc: Joao Pinto <Joao.Pinto@synopsys.com>
> > ---
> >  drivers/pci/dwc/pcie-designware-host.c | 36 +++++++++++++++++++++-------------
> >  1 file changed, 22 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
> > index 5ba3349..e43c21a 100644
> > --- a/drivers/pci/dwc/pcie-designware-host.c
> > +++ b/drivers/pci/dwc/pcie-designware-host.c
> > @@ -294,16 +294,21 @@ int dw_pcie_host_init(struct pcie_port *pp)
> >                 dev_err(dev, "missing *config* reg space\n");
> >         }
> >
> > -       ret = of_pci_get_host_bridge_resources(np, 0, 0xff, &res, &pp->io_base);
> > +       bridge = pci_alloc_host_bridge(0);
> > +       if (!bridge)
> > +               return  -ENOMEM;
> > +
> 
> I think here we warn to have the pci_alloc_host_bridge() called in the

s/warn/want, correct ?

> individual drivers, to have them allocate the dw_pcie structure as
> part of the host bridge allocation, before calling
> hisi_add_pcie_port().

I see what you mean I will see how I can do it with this series or
another one, it won't certainly make this DW stuff any shinier, it
is really really hard to read.

Thanks,
Lorenzo

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 08/18] PCI: designware: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

On Fri, Apr 28, 2017 at 03:13:04PM +0200, Arnd Bergmann wrote:
> On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
> <lorenzo.pieralisi@arm.com> wrote:
> > The introduction of pci_scan_root_bus_bridge() provides a PCI core
> > API to scan a PCI root bus backed by an already initialized
> > struct pci_host_bridge object, which simplifies the bus scan
> > interface and makes the PCI scan root bus interface easier to
> > generalize as members are added to the struct pci_host_bridge().
> >
> > Convert PCI designware host code to pci_scan_root_bus_bridge() to
> > improve the PCI root bus scanning interface.
> >
> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: Jingoo Han <jingoohan1@gmail.com>
> > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > Cc: Joao Pinto <Joao.Pinto@synopsys.com>
> > ---
> >  drivers/pci/dwc/pcie-designware-host.c | 36 +++++++++++++++++++++-------------
> >  1 file changed, 22 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
> > index 5ba3349..e43c21a 100644
> > --- a/drivers/pci/dwc/pcie-designware-host.c
> > +++ b/drivers/pci/dwc/pcie-designware-host.c
> > @@ -294,16 +294,21 @@ int dw_pcie_host_init(struct pcie_port *pp)
> >                 dev_err(dev, "missing *config* reg space\n");
> >         }
> >
> > -       ret = of_pci_get_host_bridge_resources(np, 0, 0xff, &res, &pp->io_base);
> > +       bridge = pci_alloc_host_bridge(0);
> > +       if (!bridge)
> > +               return  -ENOMEM;
> > +
> 
> I think here we warn to have the pci_alloc_host_bridge() called in the

s/warn/want, correct ?

> individual drivers, to have them allocate the dw_pcie structure as
> part of the host bridge allocation, before calling
> hisi_add_pcie_port().

I see what you mean I will see how I can do it with this series or
another one, it won't certainly make this DW stuff any shinier, it
is really really hard to read.

Thanks,
Lorenzo

Re: [RFC/RFT PATCH 05/18] ARM: PCI: dove: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

On Fri, Apr 28, 2017 at 02:38:48PM +0200, Arnd Bergmann wrote:
> On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
> <lorenzo.pieralisi@arm.com> wrote:
> > The introduction of pci_scan_root_bus_bridge() provides a PCI core
> > API to scan a PCI root bus backed by an already initialized
> > struct pci_host_bridge object, which simplifies the bus scan
> > interface and makes the PCI scan root bus interface easier to
> > generalize as members are added to the struct pci_host_bridge().
> >
> > Convert ARM dove platform code to pci_scan_root_bus_bridge() to improve
> > the PCI root bus scanning interface.
> >
> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> 
> Is this patch required for one of the later steps in the series?
> 
> As non-DT dove uses the traditional pci_common_init() helper rather
> than registering its own driver, I wonder if there is anything to gain here.

Well, the point is, the non-DT platforms I patched implement a custom
.scan method in struct hw_pci. If we move the bridge allocation to
pcibios_init_hw() we would end up initializing some struct
pci_host_bridge fields in pcibios_init_hw() and some in the custom .scan
method (ie custom pci_ops) which I found not very elegant but it could be
done I reckon, I need to give it a go to see how the code looks like.

Lorenzo

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 05/18] ARM: PCI: dove: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

On Fri, Apr 28, 2017 at 02:38:48PM +0200, Arnd Bergmann wrote:
> On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
> <lorenzo.pieralisi@arm.com> wrote:
> > The introduction of pci_scan_root_bus_bridge() provides a PCI core
> > API to scan a PCI root bus backed by an already initialized
> > struct pci_host_bridge object, which simplifies the bus scan
> > interface and makes the PCI scan root bus interface easier to
> > generalize as members are added to the struct pci_host_bridge().
> >
> > Convert ARM dove platform code to pci_scan_root_bus_bridge() to improve
> > the PCI root bus scanning interface.
> >
> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> 
> Is this patch required for one of the later steps in the series?
> 
> As non-DT dove uses the traditional pci_common_init() helper rather
> than registering its own driver, I wonder if there is anything to gain here.

Well, the point is, the non-DT platforms I patched implement a custom
.scan method in struct hw_pci. If we move the bridge allocation to
pcibios_init_hw() we would end up initializing some struct
pci_host_bridge fields in pcibios_init_hw() and some in the custom .scan
method (ie custom pci_ops) which I found not very elegant but it could be
done I reckon, I need to give it a go to see how the code looks like.

Lorenzo

Re: [RFC/RFT PATCH 00/18] PCI: ARM/ARM64: remove pci_fixup_irqs() usage

[Lorenzo Pieralisi]

On Thu, Apr 27, 2017 at 10:06:35PM +0200, Thierry Reding wrote:
> On Wed, Apr 26, 2017 at 12:17:51PM +0100, Lorenzo Pieralisi wrote:
> > Current pci_fixup_irqs() usage on ARM/ARM64 host controller drivers is
> > flawed in that pci_fixup_irqs() allocates IRQs for all PCI devices present
> > in a system; those PCI devices possibly belong to different PCI bus trees
> > (and possibly rooted at different host bridges) and may well be enabled
> > (ie probed and bound to a driver) by the time pci_fixup_irqs() is called
> > when probing a given host bridge driver.
> > 
> > Furthermore, current kernel code relying on pci_fixup_irqs() to
> > assign legacy PCI IRQs to devices does not work at all for
> > hotplugged devices in that the code carrying out the IRQ fixup
> > is called at host bridge driver probe time, which just cannot take
> > into account devices hotplugged after system has booted.
> > 
> > By leveraging Matthew Minter's patch series (and its purpose):
> > 
> > http://lkml.kernel.org/r/1445576642-29624-2-git-send-email-matt@masarand.com
> > 
> > this series[1] adds IRQs mapping and swizzling primitives to
> > the struct pci_host_bridge which allows IRQs to be allocated for
> > for a device at probe time with host bridge specific functions,
> > fixing the aforementioned limitations.
> > 
> > Current series remove pci_fixup_irqs() usage on ARM/ARM64; removal
> > can be extended to other architectures provided the IRQs map/swizzle
> > functions are set-up properly in the respective host bridges
> > set-up/probe paths.
> > 
> > Tested on kvmtool with PCI host generic.
> 
> I've tested this on Jetson TX1 (though I need a small patch specific to
> Tegra on top to fix a preexisting issue) and things seem to be working
> normally.
> 
> The output of "lspci -v" is identical before and after applying the
> series (on top of next-20170427):
> 
> -sh-4.4# lspci -v
> 00:01.0 PCI bridge: NVIDIA Corporation Device 0fae (rev a1) (prog-if 00 [Normal decode])
>         Flags: bus master, fast devsel, latency 0, IRQ 348
>         Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
>         I/O behind bridge: 00001000-00001fff [size=4K]
>         Memory behind bridge: 13000000-130fffff [size=1M]
>         Prefetchable memory behind bridge: 0000000020000000-00000000200fffff [size=1M]
>         Capabilities: [40] Subsystem: NVIDIA Corporation Device 0000
>         Capabilities: [48] Power Management version 3
>         Capabilities: [50] MSI: Enable+ Count=1/2 Maskable- 64bit+
>         Capabilities: [60] HyperTransport: MSI Mapping Enable- Fixed-
>         Capabilities: [80] Express Root Port (Slot+), MSI 00
>         Capabilities: [100] #00
>         Capabilities: [140] L1 PM Substates
>         Kernel driver in use: pcieport
> 
> 01:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller (rev 02)
>         Subsystem: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller
>         Flags: bus master, fast devsel, latency 0, IRQ 349
>         I/O ports at 1000 [size=256]
>         Memory at 13000000 (64-bit, non-prefetchable) [size=4K]
>         Memory at 20000000 (64-bit, prefetchable) [size=64K]
>         Capabilities: [40] Power Management version 3
>         Capabilities: [50] MSI: Enable+ Count=1/1 Maskable- 64bit+
>         Capabilities: [70] Express Endpoint, MSI 01
>         Capabilities: [b0] MSI-X: Enable- Count=2 Masked-
>         Capabilities: [d0] Vital Product Data
>         Capabilities: [100] Advanced Error Reporting
>         Capabilities: [140] Virtual Channel
>         Capabilities: [160] Device Serial Number 8d-08-00-00-68-4c-e0-00
>         Kernel driver in use: r8169
> 
> Note that the Realtek card is initialized by the r8169 driver and the
> network card is used to boot over NFS.
> 
> My understanding is that this is what's expected, so:
> 
> Tested-by: Thierry Reding <treding@nvidia.com>

Hi Thierry,

thanks a lot, that's very appreciated, it is exactly what I need.

Please let me know if you have comments on the individual patches too.

Thanks !
Lorenzo

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 00/18] PCI: ARM/ARM64: remove pci_fixup_irqs() usage

[Lorenzo Pieralisi]

On Thu, Apr 27, 2017 at 10:06:35PM +0200, Thierry Reding wrote:
> On Wed, Apr 26, 2017 at 12:17:51PM +0100, Lorenzo Pieralisi wrote:
> > Current pci_fixup_irqs() usage on ARM/ARM64 host controller drivers is
> > flawed in that pci_fixup_irqs() allocates IRQs for all PCI devices present
> > in a system; those PCI devices possibly belong to different PCI bus trees
> > (and possibly rooted at different host bridges) and may well be enabled
> > (ie probed and bound to a driver) by the time pci_fixup_irqs() is called
> > when probing a given host bridge driver.
> > 
> > Furthermore, current kernel code relying on pci_fixup_irqs() to
> > assign legacy PCI IRQs to devices does not work at all for
> > hotplugged devices in that the code carrying out the IRQ fixup
> > is called at host bridge driver probe time, which just cannot take
> > into account devices hotplugged after system has booted.
> > 
> > By leveraging Matthew Minter's patch series (and its purpose):
> > 
> > http://lkml.kernel.org/r/1445576642-29624-2-git-send-email-matt at masarand.com
> > 
> > this series[1] adds IRQs mapping and swizzling primitives to
> > the struct pci_host_bridge which allows IRQs to be allocated for
> > for a device at probe time with host bridge specific functions,
> > fixing the aforementioned limitations.
> > 
> > Current series remove pci_fixup_irqs() usage on ARM/ARM64; removal
> > can be extended to other architectures provided the IRQs map/swizzle
> > functions are set-up properly in the respective host bridges
> > set-up/probe paths.
> > 
> > Tested on kvmtool with PCI host generic.
> 
> I've tested this on Jetson TX1 (though I need a small patch specific to
> Tegra on top to fix a preexisting issue) and things seem to be working
> normally.
> 
> The output of "lspci -v" is identical before and after applying the
> series (on top of next-20170427):
> 
> -sh-4.4# lspci -v
> 00:01.0 PCI bridge: NVIDIA Corporation Device 0fae (rev a1) (prog-if 00 [Normal decode])
>         Flags: bus master, fast devsel, latency 0, IRQ 348
>         Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
>         I/O behind bridge: 00001000-00001fff [size=4K]
>         Memory behind bridge: 13000000-130fffff [size=1M]
>         Prefetchable memory behind bridge: 0000000020000000-00000000200fffff [size=1M]
>         Capabilities: [40] Subsystem: NVIDIA Corporation Device 0000
>         Capabilities: [48] Power Management version 3
>         Capabilities: [50] MSI: Enable+ Count=1/2 Maskable- 64bit+
>         Capabilities: [60] HyperTransport: MSI Mapping Enable- Fixed-
>         Capabilities: [80] Express Root Port (Slot+), MSI 00
>         Capabilities: [100] #00
>         Capabilities: [140] L1 PM Substates
>         Kernel driver in use: pcieport
> 
> 01:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller (rev 02)
>         Subsystem: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller
>         Flags: bus master, fast devsel, latency 0, IRQ 349
>         I/O ports at 1000 [size=256]
>         Memory at 13000000 (64-bit, non-prefetchable) [size=4K]
>         Memory at 20000000 (64-bit, prefetchable) [size=64K]
>         Capabilities: [40] Power Management version 3
>         Capabilities: [50] MSI: Enable+ Count=1/1 Maskable- 64bit+
>         Capabilities: [70] Express Endpoint, MSI 01
>         Capabilities: [b0] MSI-X: Enable- Count=2 Masked-
>         Capabilities: [d0] Vital Product Data
>         Capabilities: [100] Advanced Error Reporting
>         Capabilities: [140] Virtual Channel
>         Capabilities: [160] Device Serial Number 8d-08-00-00-68-4c-e0-00
>         Kernel driver in use: r8169
> 
> Note that the Realtek card is initialized by the r8169 driver and the
> network card is used to boot over NFS.
> 
> My understanding is that this is what's expected, so:
> 
> Tested-by: Thierry Reding <treding@nvidia.com>

Hi Thierry,

thanks a lot, that's very appreciated, it is exactly what I need.

Please let me know if you have comments on the individual patches too.

Thanks !
Lorenzo

Re: [RFC/RFT PATCH 18/18] ARM/ARM64: PCI: Drop pci_fixup_irqs() usage for DT based host controllers

[Lorenzo Pieralisi]

On Fri, Apr 28, 2017 at 03:05:44PM +0200, Arnd Bergmann wrote:
> On Wed, Apr 26, 2017 at 1:18 PM, Lorenzo Pieralisi
> <lorenzo.pieralisi@arm.com> wrote:
> > DT based PCI host controllers are currently relying on
> > pci_fixup_irqs() to assign legacy PCI irqs to devices. This is
> > broken in that pci_fixup_irqs() assign IRQs for all PCI devices
> > present in a given system some of which may well be enabled by
> > the time pci_fixup_irqs() is called (ie a system with multiple
> > host controllers). With the introduction of
> > struct pci_host_bridge.map_irq pointer it is possible to assign IRQs
> > for all devices originating from a PCI host bridge at probe time;
> > this is implemented through pci_assign_irq() that relies on the
> > struct pci_host_bridge.map_irq pointer to map IRQ for a given device.
> >
> > The benefits this brings are twofold:
> >
> > - the IRQ for a device is assigned once at probe time
> > - the IRQ assignment works also for hotplugged devices
> >
> > Remove pci_fixup_irqs() call from all DT based PCI host controller
> > drivers. The map_irq() and swizzle_irq() struct pci_host_bridge callbacks
> > are either set-up in the respective PCI host controller driver or
> > delegated to ARM/ARM64 pcibios_root_bridge_prepare() implementations,
> > where, upon DT probe detection, the functions are set to DT defaults (ie
> > of_irq_parse_and_map_pci() and pci_common_swizzle() respectively.
> >
> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> 
> Nice!
> 
> > +int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
> > +{
> > +       /*
> > +        * Set-up IRQ mapping/swizzingly functions.
> > +        * If the either function pointer is already set,
> > +        * do not override any of them since it is a host
> > +        * controller specific mapping/swizzling function.
> > +        */
> > +       if (!bridge->map_irq && !bridge->swizzle_irq) {
> > +               struct device *parent = bridge->dev.parent;
> > +               /*
> > +                * If we have a parent pointer with a valid
> > +                * OF node this means we are probing a PCI host
> > +                * controller configured through DT firmware.
> > +                */
> > +               if (IS_ENABLED(CONFIG_OF) && parent && parent->of_node) {
> > +                       bridge->map_irq = of_irq_parse_and_map_pci;
> > +                       bridge->swizzle_irq = pci_common_swizzle;
> > +               }
> > +       }
> > +
> > +       return 0;
> > +}
> 
> I think it would be better to reduce the number of global functions defined
> by common code to be called from PCI core code, and instead use
> additional callback pointers from the pci_host_bridge operations.

Yes but this means duplicating the whole map_irq/swizzle_irq
initialization thing in all DT PCI host controllers, it is getting
quite cumbersome to be frank, we should try to consolidate DT PCI
host controllers code, it is becoming a bit unwieldy to manage and
there is too much code duplication.

> In particular, there are only very few existing users of
> pcibios_root_bridge_prepare() at the moment, so we should
> be able to get rid of those quite easily now.

I could do but please see my comment above.

> > diff --git a/drivers/pci/host/pcie-iproc.c b/drivers/pci/host/pcie-iproc.c
> > index 0f39bd2..bc9e36a 100644
> > --- a/drivers/pci/host/pcie-iproc.c
> > +++ b/drivers/pci/host/pcie-iproc.c
> > @@ -1205,7 +1205,8 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
> >         struct device *dev;
> >         int ret;
> >         void *sysdata;
> > -       struct pci_bus *bus, *child;
> > +       struct pci_bus *child;
> > +       struct pci_host_bridge *host;
> >
> >         dev = pcie->dev;
> >
> > @@ -1252,15 +1253,30 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
> >         sysdata = pcie;
> >  #endif
> >
> > -       bus = pci_create_root_bus(dev, 0, &iproc_pcie_ops, sysdata, res);
> > -       if (!bus) {
> 
> Could this be a separate patch?

Yes, I can split it from the pci_fixup_irqs() removal.

Thanks,
Lorenzo

[RFC/RFT PATCH 18/18] ARM/ARM64: PCI: Drop pci_fixup_irqs() usage for DT based host controllers

[Lorenzo Pieralisi]

On Fri, Apr 28, 2017 at 03:05:44PM +0200, Arnd Bergmann wrote:
> On Wed, Apr 26, 2017 at 1:18 PM, Lorenzo Pieralisi
> <lorenzo.pieralisi@arm.com> wrote:
> > DT based PCI host controllers are currently relying on
> > pci_fixup_irqs() to assign legacy PCI irqs to devices. This is
> > broken in that pci_fixup_irqs() assign IRQs for all PCI devices
> > present in a given system some of which may well be enabled by
> > the time pci_fixup_irqs() is called (ie a system with multiple
> > host controllers). With the introduction of
> > struct pci_host_bridge.map_irq pointer it is possible to assign IRQs
> > for all devices originating from a PCI host bridge at probe time;
> > this is implemented through pci_assign_irq() that relies on the
> > struct pci_host_bridge.map_irq pointer to map IRQ for a given device.
> >
> > The benefits this brings are twofold:
> >
> > - the IRQ for a device is assigned once at probe time
> > - the IRQ assignment works also for hotplugged devices
> >
> > Remove pci_fixup_irqs() call from all DT based PCI host controller
> > drivers. The map_irq() and swizzle_irq() struct pci_host_bridge callbacks
> > are either set-up in the respective PCI host controller driver or
> > delegated to ARM/ARM64 pcibios_root_bridge_prepare() implementations,
> > where, upon DT probe detection, the functions are set to DT defaults (ie
> > of_irq_parse_and_map_pci() and pci_common_swizzle() respectively.
> >
> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> 
> Nice!
> 
> > +int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
> > +{
> > +       /*
> > +        * Set-up IRQ mapping/swizzingly functions.
> > +        * If the either function pointer is already set,
> > +        * do not override any of them since it is a host
> > +        * controller specific mapping/swizzling function.
> > +        */
> > +       if (!bridge->map_irq && !bridge->swizzle_irq) {
> > +               struct device *parent = bridge->dev.parent;
> > +               /*
> > +                * If we have a parent pointer with a valid
> > +                * OF node this means we are probing a PCI host
> > +                * controller configured through DT firmware.
> > +                */
> > +               if (IS_ENABLED(CONFIG_OF) && parent && parent->of_node) {
> > +                       bridge->map_irq = of_irq_parse_and_map_pci;
> > +                       bridge->swizzle_irq = pci_common_swizzle;
> > +               }
> > +       }
> > +
> > +       return 0;
> > +}
> 
> I think it would be better to reduce the number of global functions defined
> by common code to be called from PCI core code, and instead use
> additional callback pointers from the pci_host_bridge operations.

Yes but this means duplicating the whole map_irq/swizzle_irq
initialization thing in all DT PCI host controllers, it is getting
quite cumbersome to be frank, we should try to consolidate DT PCI
host controllers code, it is becoming a bit unwieldy to manage and
there is too much code duplication.

> In particular, there are only very few existing users of
> pcibios_root_bridge_prepare() at the moment, so we should
> be able to get rid of those quite easily now.

I could do but please see my comment above.

> > diff --git a/drivers/pci/host/pcie-iproc.c b/drivers/pci/host/pcie-iproc.c
> > index 0f39bd2..bc9e36a 100644
> > --- a/drivers/pci/host/pcie-iproc.c
> > +++ b/drivers/pci/host/pcie-iproc.c
> > @@ -1205,7 +1205,8 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
> >         struct device *dev;
> >         int ret;
> >         void *sysdata;
> > -       struct pci_bus *bus, *child;
> > +       struct pci_bus *child;
> > +       struct pci_host_bridge *host;
> >
> >         dev = pcie->dev;
> >
> > @@ -1252,15 +1253,30 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
> >         sysdata = pcie;
> >  #endif
> >
> > -       bus = pci_create_root_bus(dev, 0, &iproc_pcie_ops, sysdata, res);
> > -       if (!bus) {
> 
> Could this be a separate patch?

Yes, I can split it from the pci_fixup_irqs() removal.

Thanks,
Lorenzo

Re: [RFC/RFT PATCH 05/18] ARM: PCI: dove: Convert PCI scan API to pci_scan_root_bus_bridge()

[Arnd Bergmann]

On Wed, May 3, 2017 at 12:31 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> On Fri, Apr 28, 2017 at 02:38:48PM +0200, Arnd Bergmann wrote:
>> On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
>> <lorenzo.pieralisi@arm.com> wrote:
>> > The introduction of pci_scan_root_bus_bridge() provides a PCI core
>> > API to scan a PCI root bus backed by an already initialized
>> > struct pci_host_bridge object, which simplifies the bus scan
>> > interface and makes the PCI scan root bus interface easier to
>> > generalize as members are added to the struct pci_host_bridge().
>> >
>> > Convert ARM dove platform code to pci_scan_root_bus_bridge() to improve
>> > the PCI root bus scanning interface.
>> >
>> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
>>
>> Is this patch required for one of the later steps in the series?
>>
>> As non-DT dove uses the traditional pci_common_init() helper rather
>> than registering its own driver, I wonder if there is anything to gain here.
>
> Well, the point is, the non-DT platforms I patched implement a custom
> .scan method in struct hw_pci. If we move the bridge allocation to
> pcibios_init_hw() we would end up initializing some struct
> pci_host_bridge fields in pcibios_init_hw() and some in the custom .scan
> method (ie custom pci_ops) which I found not very elegant but it could be
> done I reckon, I need to give it a go to see how the code looks like.

I don't see anything wrong with initializing the members in different
places. The first set would give you a default that works for basic
drivers, and the second set is a way to override the defaults for drivers
that do something special. Conceptually we do this all the time in
other places.

     Arnd

[RFC/RFT PATCH 05/18] ARM: PCI: dove: Convert PCI scan API to pci_scan_root_bus_bridge()

[Arnd Bergmann]

On Wed, May 3, 2017 at 12:31 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> On Fri, Apr 28, 2017 at 02:38:48PM +0200, Arnd Bergmann wrote:
>> On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
>> <lorenzo.pieralisi@arm.com> wrote:
>> > The introduction of pci_scan_root_bus_bridge() provides a PCI core
>> > API to scan a PCI root bus backed by an already initialized
>> > struct pci_host_bridge object, which simplifies the bus scan
>> > interface and makes the PCI scan root bus interface easier to
>> > generalize as members are added to the struct pci_host_bridge().
>> >
>> > Convert ARM dove platform code to pci_scan_root_bus_bridge() to improve
>> > the PCI root bus scanning interface.
>> >
>> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
>>
>> Is this patch required for one of the later steps in the series?
>>
>> As non-DT dove uses the traditional pci_common_init() helper rather
>> than registering its own driver, I wonder if there is anything to gain here.
>
> Well, the point is, the non-DT platforms I patched implement a custom
> .scan method in struct hw_pci. If we move the bridge allocation to
> pcibios_init_hw() we would end up initializing some struct
> pci_host_bridge fields in pcibios_init_hw() and some in the custom .scan
> method (ie custom pci_ops) which I found not very elegant but it could be
> done I reckon, I need to give it a go to see how the code looks like.

I don't see anything wrong with initializing the members in different
places. The first set would give you a default that works for basic
drivers, and the second set is a way to override the defaults for drivers
that do something special. Conceptually we do this all the time in
other places.

     Arnd

Re: [RFC/RFT PATCH 03/18] PCI: Introduce pci_scan_root_bus_bridge()

[Bjorn Helgaas]

[+cc Ray, Scott, Jon]

On Tue, May 02, 2017 at 06:15:01PM +0100, Lorenzo Pieralisi wrote:
> On Fri, Apr 28, 2017 at 02:28:38PM +0200, Arnd Bergmann wrote:
> > On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
> > <lorenzo.pieralisi@arm.com> wrote:
> > > Current pci_scan_root_bus() interface is made up of two main
> > > code paths:
> > >
> > > - pci_create_root_bus()
> > > - pci_scan_child_bus()
> > >
> > > pci_create_root_bus() is a wrapper function that allows to create
> > > a struct pci_host_bridge structure, initialize it with the passed
> > > parameters and register it with the kernel.
> > >
> > > As the struct pci_host_bridge require additional struct members,
> > > pci_create_root_bus() parameters list has grown in time, making
> > > it unwieldy to add further parameters to it in case the struct
> > > pci_host_bridge gains more members fields to augment its functionality.
> > >
> > > Since PCI core code provides functions to allocate struct
> > > pci_host_bridge, instead of forcing the pci_create_root_bus() interface
> > > to add new parameters to cater for new struct pci_host_bridge
> > > functionality, it is more suitable to add an interface in PCI
> > > core code to scan a PCI bus straight from a struct pci_host_bridge
> > > created and customized by each specific PCI host controller driver.
> > >
> > > Add a pci_scan_root_bus_bridge() function to allow PCI host controller
> > > drivers to create and initialize struct pci_host_bridge and scan
> > > the resulting bus.
> > >
> > > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > > Cc: Arnd Bergmann <arnd@arndb.de>
> > > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > 
> > Good idea, yes. To avoid growing the number of interfaces too
> > much, should we change the existing users of pci_register_host_bridge
> > in host drivers over to this entry point, and make the other one
> > local to probe.c then?
> 
> Yes, the problem is that there are drivers (ie pcie-iproc.c) that
> require the struct pci_bus (created by pci_register_host_bridge())
> to fiddle with it to check link status and THEN scan the bus (so
> the pci_register_host_bridge() call can't be embedded in the scan
> interface - the driver requires struct pci_bus for pci_ops to work
> before scanning the bus itself).

I think code like iproc_pcie_check_link() that requires a struct
pci_bus before we even scan the bus is lame.  I think the driver
should be able to bring up the link before telling the PCI core about
the bridge.  Aardvark uses a typical pattern:

  advk_pcie_probe
    advk_pcie_setup_hw
      advk_pcie_wait_for_link
    pci_scan_root_bus

I would rather see iproc restructured along that line than add a
callback.

That would require replacing the pci_bus_read_config uses in
iproc_pcie_check_link() with something different, maybe iproc-internal 
accessors.  Slightly messy, but I think doable.

> I will see how I can accommodate this change because you definitely
> have a point.
> 
> > > diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> > > index 7e4ffc4..c7a7f72 100644
> > > --- a/drivers/pci/probe.c
> > > +++ b/drivers/pci/probe.c
> > > @@ -2412,6 +2412,44 @@ void pci_bus_release_busn_res(struct pci_bus *b)
> > >                         res, ret ? "can not be" : "is");
> > >  }
> > >
> > > +int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge)
> > > +{
> > > +       struct resource_entry *window;
> > > +       bool found = false;
> > > +       struct pci_bus *b;
> > > +       int max, bus, ret;
> > > +
> > > +       if (!bridge)
> > > +               return -EINVAL;
> > > +
> > > +       resource_list_for_each_entry(window, &bridge->windows)
> > > +               if (window->res->flags & IORESOURCE_BUS) {
> > > +                       found = true;
> > > +                       break;
> > > +               }
> > > +
> > > +       ret = pci_register_host_bridge(bridge);
> > > +       if (ret < 0)
> > > +               return ret;
> > > +
> > > +       b = bridge->bus;
> > > +       bus = bridge->busnr;
> > > +
> > > +       if (!found) {
> > > +               dev_info(&b->dev,
> > > +                "No busn resource found for root bus, will use [bus %02x-ff]\n",
> > > +                       bus);
> > > +               pci_bus_insert_busn_res(b, bus, 255);
> > > +       }
> > > +
> > > +       max = pci_scan_child_bus(b);
> > > +
> > > +       if (!found)
> > > +               pci_bus_update_busn_res_end(b, max);
> > > +
> > > +       return 0;
> > > +}
> > > +
> > 
> > We probably want an EXPORT_SYMBOL() here as well.
> 
> Yep, sure.
> 
> Thanks for having a look !
> 
> Lorenzo
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 03/18] PCI: Introduce pci_scan_root_bus_bridge()

[Bjorn Helgaas]

[+cc Ray, Scott, Jon]

On Tue, May 02, 2017 at 06:15:01PM +0100, Lorenzo Pieralisi wrote:
> On Fri, Apr 28, 2017 at 02:28:38PM +0200, Arnd Bergmann wrote:
> > On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
> > <lorenzo.pieralisi@arm.com> wrote:
> > > Current pci_scan_root_bus() interface is made up of two main
> > > code paths:
> > >
> > > - pci_create_root_bus()
> > > - pci_scan_child_bus()
> > >
> > > pci_create_root_bus() is a wrapper function that allows to create
> > > a struct pci_host_bridge structure, initialize it with the passed
> > > parameters and register it with the kernel.
> > >
> > > As the struct pci_host_bridge require additional struct members,
> > > pci_create_root_bus() parameters list has grown in time, making
> > > it unwieldy to add further parameters to it in case the struct
> > > pci_host_bridge gains more members fields to augment its functionality.
> > >
> > > Since PCI core code provides functions to allocate struct
> > > pci_host_bridge, instead of forcing the pci_create_root_bus() interface
> > > to add new parameters to cater for new struct pci_host_bridge
> > > functionality, it is more suitable to add an interface in PCI
> > > core code to scan a PCI bus straight from a struct pci_host_bridge
> > > created and customized by each specific PCI host controller driver.
> > >
> > > Add a pci_scan_root_bus_bridge() function to allow PCI host controller
> > > drivers to create and initialize struct pci_host_bridge and scan
> > > the resulting bus.
> > >
> > > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > > Cc: Arnd Bergmann <arnd@arndb.de>
> > > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > 
> > Good idea, yes. To avoid growing the number of interfaces too
> > much, should we change the existing users of pci_register_host_bridge
> > in host drivers over to this entry point, and make the other one
> > local to probe.c then?
> 
> Yes, the problem is that there are drivers (ie pcie-iproc.c) that
> require the struct pci_bus (created by pci_register_host_bridge())
> to fiddle with it to check link status and THEN scan the bus (so
> the pci_register_host_bridge() call can't be embedded in the scan
> interface - the driver requires struct pci_bus for pci_ops to work
> before scanning the bus itself).

I think code like iproc_pcie_check_link() that requires a struct
pci_bus before we even scan the bus is lame.  I think the driver
should be able to bring up the link before telling the PCI core about
the bridge.  Aardvark uses a typical pattern:

  advk_pcie_probe
    advk_pcie_setup_hw
      advk_pcie_wait_for_link
    pci_scan_root_bus

I would rather see iproc restructured along that line than add a
callback.

That would require replacing the pci_bus_read_config uses in
iproc_pcie_check_link() with something different, maybe iproc-internal 
accessors.  Slightly messy, but I think doable.

> I will see how I can accommodate this change because you definitely
> have a point.
> 
> > > diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> > > index 7e4ffc4..c7a7f72 100644
> > > --- a/drivers/pci/probe.c
> > > +++ b/drivers/pci/probe.c
> > > @@ -2412,6 +2412,44 @@ void pci_bus_release_busn_res(struct pci_bus *b)
> > >                         res, ret ? "can not be" : "is");
> > >  }
> > >
> > > +int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge)
> > > +{
> > > +       struct resource_entry *window;
> > > +       bool found = false;
> > > +       struct pci_bus *b;
> > > +       int max, bus, ret;
> > > +
> > > +       if (!bridge)
> > > +               return -EINVAL;
> > > +
> > > +       resource_list_for_each_entry(window, &bridge->windows)
> > > +               if (window->res->flags & IORESOURCE_BUS) {
> > > +                       found = true;
> > > +                       break;
> > > +               }
> > > +
> > > +       ret = pci_register_host_bridge(bridge);
> > > +       if (ret < 0)
> > > +               return ret;
> > > +
> > > +       b = bridge->bus;
> > > +       bus = bridge->busnr;
> > > +
> > > +       if (!found) {
> > > +               dev_info(&b->dev,
> > > +                "No busn resource found for root bus, will use [bus %02x-ff]\n",
> > > +                       bus);
> > > +               pci_bus_insert_busn_res(b, bus, 255);
> > > +       }
> > > +
> > > +       max = pci_scan_child_bus(b);
> > > +
> > > +       if (!found)
> > > +               pci_bus_update_busn_res_end(b, max);
> > > +
> > > +       return 0;
> > > +}
> > > +
> > 
> > We probably want an EXPORT_SYMBOL() here as well.
> 
> Yep, sure.
> 
> Thanks for having a look !
> 
> Lorenzo
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [RFC/RFT PATCH 03/18] PCI: Introduce pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

On Thu, May 25, 2017 at 03:56:43PM -0500, Bjorn Helgaas wrote:
> [+cc Ray, Scott, Jon]
> 
> On Tue, May 02, 2017 at 06:15:01PM +0100, Lorenzo Pieralisi wrote:
> > On Fri, Apr 28, 2017 at 02:28:38PM +0200, Arnd Bergmann wrote:
> > > On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
> > > <lorenzo.pieralisi@arm.com> wrote:
> > > > Current pci_scan_root_bus() interface is made up of two main
> > > > code paths:
> > > >
> > > > - pci_create_root_bus()
> > > > - pci_scan_child_bus()
> > > >
> > > > pci_create_root_bus() is a wrapper function that allows to create
> > > > a struct pci_host_bridge structure, initialize it with the passed
> > > > parameters and register it with the kernel.
> > > >
> > > > As the struct pci_host_bridge require additional struct members,
> > > > pci_create_root_bus() parameters list has grown in time, making
> > > > it unwieldy to add further parameters to it in case the struct
> > > > pci_host_bridge gains more members fields to augment its functionality.
> > > >
> > > > Since PCI core code provides functions to allocate struct
> > > > pci_host_bridge, instead of forcing the pci_create_root_bus() interface
> > > > to add new parameters to cater for new struct pci_host_bridge
> > > > functionality, it is more suitable to add an interface in PCI
> > > > core code to scan a PCI bus straight from a struct pci_host_bridge
> > > > created and customized by each specific PCI host controller driver.
> > > >
> > > > Add a pci_scan_root_bus_bridge() function to allow PCI host controller
> > > > drivers to create and initialize struct pci_host_bridge and scan
> > > > the resulting bus.
> > > >
> > > > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > > > Cc: Arnd Bergmann <arnd@arndb.de>
> > > > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > > 
> > > Good idea, yes. To avoid growing the number of interfaces too
> > > much, should we change the existing users of pci_register_host_bridge
> > > in host drivers over to this entry point, and make the other one
> > > local to probe.c then?
> > 
> > Yes, the problem is that there are drivers (ie pcie-iproc.c) that
> > require the struct pci_bus (created by pci_register_host_bridge())
> > to fiddle with it to check link status and THEN scan the bus (so
> > the pci_register_host_bridge() call can't be embedded in the scan
> > interface - the driver requires struct pci_bus for pci_ops to work
> > before scanning the bus itself).
> 
> I think code like iproc_pcie_check_link() that requires a struct
> pci_bus before we even scan the bus is lame.  I think the driver
> should be able to bring up the link before telling the PCI core about
> the bridge.  Aardvark uses a typical pattern:
> 
>   advk_pcie_probe
>     advk_pcie_setup_hw
>       advk_pcie_wait_for_link
>     pci_scan_root_bus
> 
> I would rather see iproc restructured along that line than add a
> callback.
> 
> That would require replacing the pci_bus_read_config uses in
> iproc_pcie_check_link() with something different, maybe iproc-internal 
> accessors.  Slightly messy, but I think doable.

I agree with you, it probably requires some cfg space accessors copy
and paste though but that's doable. I can write the patch myself but
I can't test it so help is appreciated here.

Thanks,
Lorenzo

> > I will see how I can accommodate this change because you definitely
> > have a point.
> > 
> > > > diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> > > > index 7e4ffc4..c7a7f72 100644
> > > > --- a/drivers/pci/probe.c
> > > > +++ b/drivers/pci/probe.c
> > > > @@ -2412,6 +2412,44 @@ void pci_bus_release_busn_res(struct pci_bus *b)
> > > >                         res, ret ? "can not be" : "is");
> > > >  }
> > > >
> > > > +int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge)
> > > > +{
> > > > +       struct resource_entry *window;
> > > > +       bool found = false;
> > > > +       struct pci_bus *b;
> > > > +       int max, bus, ret;
> > > > +
> > > > +       if (!bridge)
> > > > +               return -EINVAL;
> > > > +
> > > > +       resource_list_for_each_entry(window, &bridge->windows)
> > > > +               if (window->res->flags & IORESOURCE_BUS) {
> > > > +                       found = true;
> > > > +                       break;
> > > > +               }
> > > > +
> > > > +       ret = pci_register_host_bridge(bridge);
> > > > +       if (ret < 0)
> > > > +               return ret;
> > > > +
> > > > +       b = bridge->bus;
> > > > +       bus = bridge->busnr;
> > > > +
> > > > +       if (!found) {
> > > > +               dev_info(&b->dev,
> > > > +                "No busn resource found for root bus, will use [bus %02x-ff]\n",
> > > > +                       bus);
> > > > +               pci_bus_insert_busn_res(b, bus, 255);
> > > > +       }
> > > > +
> > > > +       max = pci_scan_child_bus(b);
> > > > +
> > > > +       if (!found)
> > > > +               pci_bus_update_busn_res_end(b, max);
> > > > +
> > > > +       return 0;
> > > > +}
> > > > +
> > > 
> > > We probably want an EXPORT_SYMBOL() here as well.
> > 
> > Yep, sure.
> > 
> > Thanks for having a look !
> > 
> > Lorenzo
> > 
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 03/18] PCI: Introduce pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

On Thu, May 25, 2017 at 03:56:43PM -0500, Bjorn Helgaas wrote:
> [+cc Ray, Scott, Jon]
> 
> On Tue, May 02, 2017 at 06:15:01PM +0100, Lorenzo Pieralisi wrote:
> > On Fri, Apr 28, 2017 at 02:28:38PM +0200, Arnd Bergmann wrote:
> > > On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
> > > <lorenzo.pieralisi@arm.com> wrote:
> > > > Current pci_scan_root_bus() interface is made up of two main
> > > > code paths:
> > > >
> > > > - pci_create_root_bus()
> > > > - pci_scan_child_bus()
> > > >
> > > > pci_create_root_bus() is a wrapper function that allows to create
> > > > a struct pci_host_bridge structure, initialize it with the passed
> > > > parameters and register it with the kernel.
> > > >
> > > > As the struct pci_host_bridge require additional struct members,
> > > > pci_create_root_bus() parameters list has grown in time, making
> > > > it unwieldy to add further parameters to it in case the struct
> > > > pci_host_bridge gains more members fields to augment its functionality.
> > > >
> > > > Since PCI core code provides functions to allocate struct
> > > > pci_host_bridge, instead of forcing the pci_create_root_bus() interface
> > > > to add new parameters to cater for new struct pci_host_bridge
> > > > functionality, it is more suitable to add an interface in PCI
> > > > core code to scan a PCI bus straight from a struct pci_host_bridge
> > > > created and customized by each specific PCI host controller driver.
> > > >
> > > > Add a pci_scan_root_bus_bridge() function to allow PCI host controller
> > > > drivers to create and initialize struct pci_host_bridge and scan
> > > > the resulting bus.
> > > >
> > > > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > > > Cc: Arnd Bergmann <arnd@arndb.de>
> > > > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > > 
> > > Good idea, yes. To avoid growing the number of interfaces too
> > > much, should we change the existing users of pci_register_host_bridge
> > > in host drivers over to this entry point, and make the other one
> > > local to probe.c then?
> > 
> > Yes, the problem is that there are drivers (ie pcie-iproc.c) that
> > require the struct pci_bus (created by pci_register_host_bridge())
> > to fiddle with it to check link status and THEN scan the bus (so
> > the pci_register_host_bridge() call can't be embedded in the scan
> > interface - the driver requires struct pci_bus for pci_ops to work
> > before scanning the bus itself).
> 
> I think code like iproc_pcie_check_link() that requires a struct
> pci_bus before we even scan the bus is lame.  I think the driver
> should be able to bring up the link before telling the PCI core about
> the bridge.  Aardvark uses a typical pattern:
> 
>   advk_pcie_probe
>     advk_pcie_setup_hw
>       advk_pcie_wait_for_link
>     pci_scan_root_bus
> 
> I would rather see iproc restructured along that line than add a
> callback.
> 
> That would require replacing the pci_bus_read_config uses in
> iproc_pcie_check_link() with something different, maybe iproc-internal 
> accessors.  Slightly messy, but I think doable.

I agree with you, it probably requires some cfg space accessors copy
and paste though but that's doable. I can write the patch myself but
I can't test it so help is appreciated here.

Thanks,
Lorenzo

> > I will see how I can accommodate this change because you definitely
> > have a point.
> > 
> > > > diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> > > > index 7e4ffc4..c7a7f72 100644
> > > > --- a/drivers/pci/probe.c
> > > > +++ b/drivers/pci/probe.c
> > > > @@ -2412,6 +2412,44 @@ void pci_bus_release_busn_res(struct pci_bus *b)
> > > >                         res, ret ? "can not be" : "is");
> > > >  }
> > > >
> > > > +int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge)
> > > > +{
> > > > +       struct resource_entry *window;
> > > > +       bool found = false;
> > > > +       struct pci_bus *b;
> > > > +       int max, bus, ret;
> > > > +
> > > > +       if (!bridge)
> > > > +               return -EINVAL;
> > > > +
> > > > +       resource_list_for_each_entry(window, &bridge->windows)
> > > > +               if (window->res->flags & IORESOURCE_BUS) {
> > > > +                       found = true;
> > > > +                       break;
> > > > +               }
> > > > +
> > > > +       ret = pci_register_host_bridge(bridge);
> > > > +       if (ret < 0)
> > > > +               return ret;
> > > > +
> > > > +       b = bridge->bus;
> > > > +       bus = bridge->busnr;
> > > > +
> > > > +       if (!found) {
> > > > +               dev_info(&b->dev,
> > > > +                "No busn resource found for root bus, will use [bus %02x-ff]\n",
> > > > +                       bus);
> > > > +               pci_bus_insert_busn_res(b, bus, 255);
> > > > +       }
> > > > +
> > > > +       max = pci_scan_child_bus(b);
> > > > +
> > > > +       if (!found)
> > > > +               pci_bus_update_busn_res_end(b, max);
> > > > +
> > > > +       return 0;
> > > > +}
> > > > +
> > > 
> > > We probably want an EXPORT_SYMBOL() here as well.
> > 
> > Yep, sure.
> > 
> > Thanks for having a look !
> > 
> > Lorenzo
> > 
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel at lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [RFC/RFT PATCH 03/18] PCI: Introduce pci_scan_root_bus_bridge()

[Ray Jui]

On 5/26/17 6:07 AM, Lorenzo Pieralisi wrote:
> On Thu, May 25, 2017 at 03:56:43PM -0500, Bjorn Helgaas wrote:
>> [+cc Ray, Scott, Jon]
>>
>> On Tue, May 02, 2017 at 06:15:01PM +0100, Lorenzo Pieralisi wrote:
>>> On Fri, Apr 28, 2017 at 02:28:38PM +0200, Arnd Bergmann wrote:
>>>> On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
>>>> <lorenzo.pieralisi@arm.com> wrote:
>>>>> Current pci_scan_root_bus() interface is made up of two main
>>>>> code paths:
>>>>>
>>>>> - pci_create_root_bus()
>>>>> - pci_scan_child_bus()
>>>>>
>>>>> pci_create_root_bus() is a wrapper function that allows to create
>>>>> a struct pci_host_bridge structure, initialize it with the passed
>>>>> parameters and register it with the kernel.
>>>>>
>>>>> As the struct pci_host_bridge require additional struct members,
>>>>> pci_create_root_bus() parameters list has grown in time, making
>>>>> it unwieldy to add further parameters to it in case the struct
>>>>> pci_host_bridge gains more members fields to augment its functionality.
>>>>>
>>>>> Since PCI core code provides functions to allocate struct
>>>>> pci_host_bridge, instead of forcing the pci_create_root_bus() interface
>>>>> to add new parameters to cater for new struct pci_host_bridge
>>>>> functionality, it is more suitable to add an interface in PCI
>>>>> core code to scan a PCI bus straight from a struct pci_host_bridge
>>>>> created and customized by each specific PCI host controller driver.
>>>>>
>>>>> Add a pci_scan_root_bus_bridge() function to allow PCI host controller
>>>>> drivers to create and initialize struct pci_host_bridge and scan
>>>>> the resulting bus.
>>>>>
>>>>> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
>>>>> Cc: Arnd Bergmann <arnd@arndb.de>
>>>>> Cc: Bjorn Helgaas <bhelgaas@google.com>
>>>>
>>>> Good idea, yes. To avoid growing the number of interfaces too
>>>> much, should we change the existing users of pci_register_host_bridge
>>>> in host drivers over to this entry point, and make the other one
>>>> local to probe.c then?
>>>
>>> Yes, the problem is that there are drivers (ie pcie-iproc.c) that
>>> require the struct pci_bus (created by pci_register_host_bridge())
>>> to fiddle with it to check link status and THEN scan the bus (so
>>> the pci_register_host_bridge() call can't be embedded in the scan
>>> interface - the driver requires struct pci_bus for pci_ops to work
>>> before scanning the bus itself).
>>
>> I think code like iproc_pcie_check_link() that requires a struct
>> pci_bus before we even scan the bus is lame.  I think the driver
>> should be able to bring up the link before telling the PCI core about
>> the bridge.  Aardvark uses a typical pattern:
>>
>>   advk_pcie_probe
>>     advk_pcie_setup_hw
>>       advk_pcie_wait_for_link
>>     pci_scan_root_bus
>>
>> I would rather see iproc restructured along that line than add a
>> callback.
>>
>> That would require replacing the pci_bus_read_config uses in
>> iproc_pcie_check_link() with something different, maybe iproc-internal 
>> accessors.  Slightly messy, but I think doable.
> 
> I agree with you, it probably requires some cfg space accessors copy
> and paste though but that's doable. I can write the patch myself but
> I can't test it so help is appreciated here.
> 
> Thanks,
> Lorenzo
> 

I agree with Bjorn on the new proposed sequence that link check should
be done before the standard root bus scan starts.

Lorenzo, I'm getting quite busy and won't have time to re-write this in
the near term. I appreciate that you offer to help to re-organize the
code. Once you have a patch, I can help to test it on our platforms.

Thanks,

Ray

>>> I will see how I can accommodate this change because you definitely
>>> have a point.
>>>
>>>>> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
>>>>> index 7e4ffc4..c7a7f72 100644
>>>>> --- a/drivers/pci/probe.c
>>>>> +++ b/drivers/pci/probe.c
>>>>> @@ -2412,6 +2412,44 @@ void pci_bus_release_busn_res(struct pci_bus *b)
>>>>>                         res, ret ? "can not be" : "is");
>>>>>  }
>>>>>
>>>>> +int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge)
>>>>> +{
>>>>> +       struct resource_entry *window;
>>>>> +       bool found = false;
>>>>> +       struct pci_bus *b;
>>>>> +       int max, bus, ret;
>>>>> +
>>>>> +       if (!bridge)
>>>>> +               return -EINVAL;
>>>>> +
>>>>> +       resource_list_for_each_entry(window, &bridge->windows)
>>>>> +               if (window->res->flags & IORESOURCE_BUS) {
>>>>> +                       found = true;
>>>>> +                       break;
>>>>> +               }
>>>>> +
>>>>> +       ret = pci_register_host_bridge(bridge);
>>>>> +       if (ret < 0)
>>>>> +               return ret;
>>>>> +
>>>>> +       b = bridge->bus;
>>>>> +       bus = bridge->busnr;
>>>>> +
>>>>> +       if (!found) {
>>>>> +               dev_info(&b->dev,
>>>>> +                "No busn resource found for root bus, will use [bus %02x-ff]\n",
>>>>> +                       bus);
>>>>> +               pci_bus_insert_busn_res(b, bus, 255);
>>>>> +       }
>>>>> +
>>>>> +       max = pci_scan_child_bus(b);
>>>>> +
>>>>> +       if (!found)
>>>>> +               pci_bus_update_busn_res_end(b, max);
>>>>> +
>>>>> +       return 0;
>>>>> +}
>>>>> +
>>>>
>>>> We probably want an EXPORT_SYMBOL() here as well.
>>>
>>> Yep, sure.
>>>
>>> Thanks for having a look !
>>>
>>> Lorenzo
>>>
>>> _______________________________________________
>>> linux-arm-kernel mailing list
>>> linux-arm-kernel@lists.infradead.org
>>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 03/18] PCI: Introduce pci_scan_root_bus_bridge()

[Ray Jui]

On 5/26/17 6:07 AM, Lorenzo Pieralisi wrote:
> On Thu, May 25, 2017 at 03:56:43PM -0500, Bjorn Helgaas wrote:
>> [+cc Ray, Scott, Jon]
>>
>> On Tue, May 02, 2017 at 06:15:01PM +0100, Lorenzo Pieralisi wrote:
>>> On Fri, Apr 28, 2017 at 02:28:38PM +0200, Arnd Bergmann wrote:
>>>> On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
>>>> <lorenzo.pieralisi@arm.com> wrote:
>>>>> Current pci_scan_root_bus() interface is made up of two main
>>>>> code paths:
>>>>>
>>>>> - pci_create_root_bus()
>>>>> - pci_scan_child_bus()
>>>>>
>>>>> pci_create_root_bus() is a wrapper function that allows to create
>>>>> a struct pci_host_bridge structure, initialize it with the passed
>>>>> parameters and register it with the kernel.
>>>>>
>>>>> As the struct pci_host_bridge require additional struct members,
>>>>> pci_create_root_bus() parameters list has grown in time, making
>>>>> it unwieldy to add further parameters to it in case the struct
>>>>> pci_host_bridge gains more members fields to augment its functionality.
>>>>>
>>>>> Since PCI core code provides functions to allocate struct
>>>>> pci_host_bridge, instead of forcing the pci_create_root_bus() interface
>>>>> to add new parameters to cater for new struct pci_host_bridge
>>>>> functionality, it is more suitable to add an interface in PCI
>>>>> core code to scan a PCI bus straight from a struct pci_host_bridge
>>>>> created and customized by each specific PCI host controller driver.
>>>>>
>>>>> Add a pci_scan_root_bus_bridge() function to allow PCI host controller
>>>>> drivers to create and initialize struct pci_host_bridge and scan
>>>>> the resulting bus.
>>>>>
>>>>> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
>>>>> Cc: Arnd Bergmann <arnd@arndb.de>
>>>>> Cc: Bjorn Helgaas <bhelgaas@google.com>
>>>>
>>>> Good idea, yes. To avoid growing the number of interfaces too
>>>> much, should we change the existing users of pci_register_host_bridge
>>>> in host drivers over to this entry point, and make the other one
>>>> local to probe.c then?
>>>
>>> Yes, the problem is that there are drivers (ie pcie-iproc.c) that
>>> require the struct pci_bus (created by pci_register_host_bridge())
>>> to fiddle with it to check link status and THEN scan the bus (so
>>> the pci_register_host_bridge() call can't be embedded in the scan
>>> interface - the driver requires struct pci_bus for pci_ops to work
>>> before scanning the bus itself).
>>
>> I think code like iproc_pcie_check_link() that requires a struct
>> pci_bus before we even scan the bus is lame.  I think the driver
>> should be able to bring up the link before telling the PCI core about
>> the bridge.  Aardvark uses a typical pattern:
>>
>>   advk_pcie_probe
>>     advk_pcie_setup_hw
>>       advk_pcie_wait_for_link
>>     pci_scan_root_bus
>>
>> I would rather see iproc restructured along that line than add a
>> callback.
>>
>> That would require replacing the pci_bus_read_config uses in
>> iproc_pcie_check_link() with something different, maybe iproc-internal 
>> accessors.  Slightly messy, but I think doable.
> 
> I agree with you, it probably requires some cfg space accessors copy
> and paste though but that's doable. I can write the patch myself but
> I can't test it so help is appreciated here.
> 
> Thanks,
> Lorenzo
> 

I agree with Bjorn on the new proposed sequence that link check should
be done before the standard root bus scan starts.

Lorenzo, I'm getting quite busy and won't have time to re-write this in
the near term. I appreciate that you offer to help to re-organize the
code. Once you have a patch, I can help to test it on our platforms.

Thanks,

Ray

>>> I will see how I can accommodate this change because you definitely
>>> have a point.
>>>
>>>>> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
>>>>> index 7e4ffc4..c7a7f72 100644
>>>>> --- a/drivers/pci/probe.c
>>>>> +++ b/drivers/pci/probe.c
>>>>> @@ -2412,6 +2412,44 @@ void pci_bus_release_busn_res(struct pci_bus *b)
>>>>>                         res, ret ? "can not be" : "is");
>>>>>  }
>>>>>
>>>>> +int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge)
>>>>> +{
>>>>> +       struct resource_entry *window;
>>>>> +       bool found = false;
>>>>> +       struct pci_bus *b;
>>>>> +       int max, bus, ret;
>>>>> +
>>>>> +       if (!bridge)
>>>>> +               return -EINVAL;
>>>>> +
>>>>> +       resource_list_for_each_entry(window, &bridge->windows)
>>>>> +               if (window->res->flags & IORESOURCE_BUS) {
>>>>> +                       found = true;
>>>>> +                       break;
>>>>> +               }
>>>>> +
>>>>> +       ret = pci_register_host_bridge(bridge);
>>>>> +       if (ret < 0)
>>>>> +               return ret;
>>>>> +
>>>>> +       b = bridge->bus;
>>>>> +       bus = bridge->busnr;
>>>>> +
>>>>> +       if (!found) {
>>>>> +               dev_info(&b->dev,
>>>>> +                "No busn resource found for root bus, will use [bus %02x-ff]\n",
>>>>> +                       bus);
>>>>> +               pci_bus_insert_busn_res(b, bus, 255);
>>>>> +       }
>>>>> +
>>>>> +       max = pci_scan_child_bus(b);
>>>>> +
>>>>> +       if (!found)
>>>>> +               pci_bus_update_busn_res_end(b, max);
>>>>> +
>>>>> +       return 0;
>>>>> +}
>>>>> +
>>>>
>>>> We probably want an EXPORT_SYMBOL() here as well.
>>>
>>> Yep, sure.
>>>
>>> Thanks for having a look !
>>>
>>> Lorenzo
>>>
>>> _______________________________________________
>>> linux-arm-kernel mailing list
>>> linux-arm-kernel at lists.infradead.org
>>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [RFC/RFT PATCH 03/18] PCI: Introduce pci_scan_root_bus_bridge()

[Oza Oza]

On Fri, May 26, 2017 at 6:37 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> On Thu, May 25, 2017 at 03:56:43PM -0500, Bjorn Helgaas wrote:
>> [+cc Ray, Scott, Jon]
>>
>> On Tue, May 02, 2017 at 06:15:01PM +0100, Lorenzo Pieralisi wrote:
>> > On Fri, Apr 28, 2017 at 02:28:38PM +0200, Arnd Bergmann wrote:
>> > > On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
>> > > <lorenzo.pieralisi@arm.com> wrote:
>> > > > Current pci_scan_root_bus() interface is made up of two main
>> > > > code paths:
>> > > >
>> > > > - pci_create_root_bus()
>> > > > - pci_scan_child_bus()
>> > > >
>> > > > pci_create_root_bus() is a wrapper function that allows to create
>> > > > a struct pci_host_bridge structure, initialize it with the passed
>> > > > parameters and register it with the kernel.
>> > > >
>> > > > As the struct pci_host_bridge require additional struct members,
>> > > > pci_create_root_bus() parameters list has grown in time, making
>> > > > it unwieldy to add further parameters to it in case the struct
>> > > > pci_host_bridge gains more members fields to augment its functionality.
>> > > >
>> > > > Since PCI core code provides functions to allocate struct
>> > > > pci_host_bridge, instead of forcing the pci_create_root_bus() interface
>> > > > to add new parameters to cater for new struct pci_host_bridge
>> > > > functionality, it is more suitable to add an interface in PCI
>> > > > core code to scan a PCI bus straight from a struct pci_host_bridge
>> > > > created and customized by each specific PCI host controller driver.
>> > > >
>> > > > Add a pci_scan_root_bus_bridge() function to allow PCI host controller
>> > > > drivers to create and initialize struct pci_host_bridge and scan
>> > > > the resulting bus.
>> > > >
>> > > > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
>> > > > Cc: Arnd Bergmann <arnd@arndb.de>
>> > > > Cc: Bjorn Helgaas <bhelgaas@google.com>
>> > >
>> > > Good idea, yes. To avoid growing the number of interfaces too
>> > > much, should we change the existing users of pci_register_host_bridge
>> > > in host drivers over to this entry point, and make the other one
>> > > local to probe.c then?
>> >
>> > Yes, the problem is that there are drivers (ie pcie-iproc.c) that
>> > require the struct pci_bus (created by pci_register_host_bridge())
>> > to fiddle with it to check link status and THEN scan the bus (so
>> > the pci_register_host_bridge() call can't be embedded in the scan
>> > interface - the driver requires struct pci_bus for pci_ops to work
>> > before scanning the bus itself).
>>
>> I think code like iproc_pcie_check_link() that requires a struct
>> pci_bus before we even scan the bus is lame.  I think the driver
>> should be able to bring up the link before telling the PCI core about
>> the bridge.  Aardvark uses a typical pattern:
>>
>>   advk_pcie_probe
>>     advk_pcie_setup_hw
>>       advk_pcie_wait_for_link
>>     pci_scan_root_bus
>>
>> I would rather see iproc restructured along that line than add a
>> callback.
>>
>> That would require replacing the pci_bus_read_config uses in
>> iproc_pcie_check_link() with something different, maybe iproc-internal
>> accessors.  Slightly messy, but I think doable.
>
> I agree with you, it probably requires some cfg space accessors copy
> and paste though but that's doable. I can write the patch myself but
> I can't test it so help is appreciated here.
>
> Thanks,
> Lorenzo
>
>> > I will see how I can accommodate this change because you definitely
>> > have a point.
>> >
>> > > > diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
>> > > > index 7e4ffc4..c7a7f72 100644
>> > > > --- a/drivers/pci/probe.c
>> > > > +++ b/drivers/pci/probe.c
>> > > > @@ -2412,6 +2412,44 @@ void pci_bus_release_busn_res(struct pci_bus *b)
>> > > >                         res, ret ? "can not be" : "is");
>> > > >  }
>> > > >
>> > > > +int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge)
>> > > > +{
>> > > > +       struct resource_entry *window;
>> > > > +       bool found = false;
>> > > > +       struct pci_bus *b;
>> > > > +       int max, bus, ret;
>> > > > +
>> > > > +       if (!bridge)
>> > > > +               return -EINVAL;
>> > > > +
>> > > > +       resource_list_for_each_entry(window, &bridge->windows)
>> > > > +               if (window->res->flags & IORESOURCE_BUS) {
>> > > > +                       found = true;
>> > > > +                       break;
>> > > > +               }
>> > > > +
>> > > > +       ret = pci_register_host_bridge(bridge);
>> > > > +       if (ret < 0)
>> > > > +               return ret;
>> > > > +
>> > > > +       b = bridge->bus;
>> > > > +       bus = bridge->busnr;
>> > > > +
>> > > > +       if (!found) {
>> > > > +               dev_info(&b->dev,
>> > > > +                "No busn resource found for root bus, will use [bus %02x-ff]\n",
>> > > > +                       bus);
>> > > > +               pci_bus_insert_busn_res(b, bus, 255);
>> > > > +       }
>> > > > +
>> > > > +       max = pci_scan_child_bus(b);
>> > > > +
>> > > > +       if (!found)
>> > > > +               pci_bus_update_busn_res_end(b, max);
>> > > > +
>> > > > +       return 0;
>> > > > +}
>> > > > +
>> > >
>> > > We probably want an EXPORT_SYMBOL() here as well.
>> >
>> > Yep, sure.
>> >
>> > Thanks for having a look !
>> >
>> > Lorenzo
>> >
>> > _______________________________________________
>> > linux-arm-kernel mailing list
>> > linux-arm-kernel@lists.infradead.org
>> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel


Hi,

This is good idea,
because the following patch of mine attempts to add inbound windows,
and I had to create another API pci_create_root_bus2

[PATCH v7 2/3] PCI: Add support for PCI inbound windows resources

Lorenzo : Once this API is ready, please send it across.
I can test it with respect to inbound resources and IOVA reservation
on our platform.

Regards,
Oza.

[RFC/RFT PATCH 03/18] PCI: Introduce pci_scan_root_bus_bridge()

[Oza Oza]

On Fri, May 26, 2017 at 6:37 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> On Thu, May 25, 2017 at 03:56:43PM -0500, Bjorn Helgaas wrote:
>> [+cc Ray, Scott, Jon]
>>
>> On Tue, May 02, 2017 at 06:15:01PM +0100, Lorenzo Pieralisi wrote:
>> > On Fri, Apr 28, 2017 at 02:28:38PM +0200, Arnd Bergmann wrote:
>> > > On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
>> > > <lorenzo.pieralisi@arm.com> wrote:
>> > > > Current pci_scan_root_bus() interface is made up of two main
>> > > > code paths:
>> > > >
>> > > > - pci_create_root_bus()
>> > > > - pci_scan_child_bus()
>> > > >
>> > > > pci_create_root_bus() is a wrapper function that allows to create
>> > > > a struct pci_host_bridge structure, initialize it with the passed
>> > > > parameters and register it with the kernel.
>> > > >
>> > > > As the struct pci_host_bridge require additional struct members,
>> > > > pci_create_root_bus() parameters list has grown in time, making
>> > > > it unwieldy to add further parameters to it in case the struct
>> > > > pci_host_bridge gains more members fields to augment its functionality.
>> > > >
>> > > > Since PCI core code provides functions to allocate struct
>> > > > pci_host_bridge, instead of forcing the pci_create_root_bus() interface
>> > > > to add new parameters to cater for new struct pci_host_bridge
>> > > > functionality, it is more suitable to add an interface in PCI
>> > > > core code to scan a PCI bus straight from a struct pci_host_bridge
>> > > > created and customized by each specific PCI host controller driver.
>> > > >
>> > > > Add a pci_scan_root_bus_bridge() function to allow PCI host controller
>> > > > drivers to create and initialize struct pci_host_bridge and scan
>> > > > the resulting bus.
>> > > >
>> > > > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
>> > > > Cc: Arnd Bergmann <arnd@arndb.de>
>> > > > Cc: Bjorn Helgaas <bhelgaas@google.com>
>> > >
>> > > Good idea, yes. To avoid growing the number of interfaces too
>> > > much, should we change the existing users of pci_register_host_bridge
>> > > in host drivers over to this entry point, and make the other one
>> > > local to probe.c then?
>> >
>> > Yes, the problem is that there are drivers (ie pcie-iproc.c) that
>> > require the struct pci_bus (created by pci_register_host_bridge())
>> > to fiddle with it to check link status and THEN scan the bus (so
>> > the pci_register_host_bridge() call can't be embedded in the scan
>> > interface - the driver requires struct pci_bus for pci_ops to work
>> > before scanning the bus itself).
>>
>> I think code like iproc_pcie_check_link() that requires a struct
>> pci_bus before we even scan the bus is lame.  I think the driver
>> should be able to bring up the link before telling the PCI core about
>> the bridge.  Aardvark uses a typical pattern:
>>
>>   advk_pcie_probe
>>     advk_pcie_setup_hw
>>       advk_pcie_wait_for_link
>>     pci_scan_root_bus
>>
>> I would rather see iproc restructured along that line than add a
>> callback.
>>
>> That would require replacing the pci_bus_read_config uses in
>> iproc_pcie_check_link() with something different, maybe iproc-internal
>> accessors.  Slightly messy, but I think doable.
>
> I agree with you, it probably requires some cfg space accessors copy
> and paste though but that's doable. I can write the patch myself but
> I can't test it so help is appreciated here.
>
> Thanks,
> Lorenzo
>
>> > I will see how I can accommodate this change because you definitely
>> > have a point.
>> >
>> > > > diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
>> > > > index 7e4ffc4..c7a7f72 100644
>> > > > --- a/drivers/pci/probe.c
>> > > > +++ b/drivers/pci/probe.c
>> > > > @@ -2412,6 +2412,44 @@ void pci_bus_release_busn_res(struct pci_bus *b)
>> > > >                         res, ret ? "can not be" : "is");
>> > > >  }
>> > > >
>> > > > +int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge)
>> > > > +{
>> > > > +       struct resource_entry *window;
>> > > > +       bool found = false;
>> > > > +       struct pci_bus *b;
>> > > > +       int max, bus, ret;
>> > > > +
>> > > > +       if (!bridge)
>> > > > +               return -EINVAL;
>> > > > +
>> > > > +       resource_list_for_each_entry(window, &bridge->windows)
>> > > > +               if (window->res->flags & IORESOURCE_BUS) {
>> > > > +                       found = true;
>> > > > +                       break;
>> > > > +               }
>> > > > +
>> > > > +       ret = pci_register_host_bridge(bridge);
>> > > > +       if (ret < 0)
>> > > > +               return ret;
>> > > > +
>> > > > +       b = bridge->bus;
>> > > > +       bus = bridge->busnr;
>> > > > +
>> > > > +       if (!found) {
>> > > > +               dev_info(&b->dev,
>> > > > +                "No busn resource found for root bus, will use [bus %02x-ff]\n",
>> > > > +                       bus);
>> > > > +               pci_bus_insert_busn_res(b, bus, 255);
>> > > > +       }
>> > > > +
>> > > > +       max = pci_scan_child_bus(b);
>> > > > +
>> > > > +       if (!found)
>> > > > +               pci_bus_update_busn_res_end(b, max);
>> > > > +
>> > > > +       return 0;
>> > > > +}
>> > > > +
>> > >
>> > > We probably want an EXPORT_SYMBOL() here as well.
>> >
>> > Yep, sure.
>> >
>> > Thanks for having a look !
>> >
>> > Lorenzo
>> >
>> > _______________________________________________
>> > linux-arm-kernel mailing list
>> > linux-arm-kernel at lists.infradead.org
>> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel


Hi,

This is good idea,
because the following patch of mine attempts to add inbound windows,
and I had to create another API pci_create_root_bus2

[PATCH v7 2/3] PCI: Add support for PCI inbound windows resources

Lorenzo : Once this API is ready, please send it across.
I can test it with respect to inbound resources and IOVA reservation
on our platform.

Regards,
Oza.

Re: [RFC/RFT PATCH 03/18] PCI: Introduce pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

On Fri, May 26, 2017 at 10:29:39AM -0700, Ray Jui wrote:
> 
> 
> On 5/26/17 6:07 AM, Lorenzo Pieralisi wrote:
> > On Thu, May 25, 2017 at 03:56:43PM -0500, Bjorn Helgaas wrote:
> >> [+cc Ray, Scott, Jon]
> >>
> >> On Tue, May 02, 2017 at 06:15:01PM +0100, Lorenzo Pieralisi wrote:
> >>> On Fri, Apr 28, 2017 at 02:28:38PM +0200, Arnd Bergmann wrote:
> >>>> On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
> >>>> <lorenzo.pieralisi@arm.com> wrote:
> >>>>> Current pci_scan_root_bus() interface is made up of two main
> >>>>> code paths:
> >>>>>
> >>>>> - pci_create_root_bus()
> >>>>> - pci_scan_child_bus()
> >>>>>
> >>>>> pci_create_root_bus() is a wrapper function that allows to create
> >>>>> a struct pci_host_bridge structure, initialize it with the passed
> >>>>> parameters and register it with the kernel.
> >>>>>
> >>>>> As the struct pci_host_bridge require additional struct members,
> >>>>> pci_create_root_bus() parameters list has grown in time, making
> >>>>> it unwieldy to add further parameters to it in case the struct
> >>>>> pci_host_bridge gains more members fields to augment its functionality.
> >>>>>
> >>>>> Since PCI core code provides functions to allocate struct
> >>>>> pci_host_bridge, instead of forcing the pci_create_root_bus() interface
> >>>>> to add new parameters to cater for new struct pci_host_bridge
> >>>>> functionality, it is more suitable to add an interface in PCI
> >>>>> core code to scan a PCI bus straight from a struct pci_host_bridge
> >>>>> created and customized by each specific PCI host controller driver.
> >>>>>
> >>>>> Add a pci_scan_root_bus_bridge() function to allow PCI host controller
> >>>>> drivers to create and initialize struct pci_host_bridge and scan
> >>>>> the resulting bus.
> >>>>>
> >>>>> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> >>>>> Cc: Arnd Bergmann <arnd@arndb.de>
> >>>>> Cc: Bjorn Helgaas <bhelgaas@google.com>
> >>>>
> >>>> Good idea, yes. To avoid growing the number of interfaces too
> >>>> much, should we change the existing users of pci_register_host_bridge
> >>>> in host drivers over to this entry point, and make the other one
> >>>> local to probe.c then?
> >>>
> >>> Yes, the problem is that there are drivers (ie pcie-iproc.c) that
> >>> require the struct pci_bus (created by pci_register_host_bridge())
> >>> to fiddle with it to check link status and THEN scan the bus (so
> >>> the pci_register_host_bridge() call can't be embedded in the scan
> >>> interface - the driver requires struct pci_bus for pci_ops to work
> >>> before scanning the bus itself).
> >>
> >> I think code like iproc_pcie_check_link() that requires a struct
> >> pci_bus before we even scan the bus is lame.  I think the driver
> >> should be able to bring up the link before telling the PCI core about
> >> the bridge.  Aardvark uses a typical pattern:
> >>
> >>   advk_pcie_probe
> >>     advk_pcie_setup_hw
> >>       advk_pcie_wait_for_link
> >>     pci_scan_root_bus
> >>
> >> I would rather see iproc restructured along that line than add a
> >> callback.
> >>
> >> That would require replacing the pci_bus_read_config uses in
> >> iproc_pcie_check_link() with something different, maybe iproc-internal 
> >> accessors.  Slightly messy, but I think doable.
> > 
> > I agree with you, it probably requires some cfg space accessors copy
> > and paste though but that's doable. I can write the patch myself but
> > I can't test it so help is appreciated here.
> > 
> > Thanks,
> > Lorenzo
> > 
> 
> I agree with Bjorn on the new proposed sequence that link check should
> be done before the standard root bus scan starts.
> 
> Lorenzo, I'm getting quite busy and won't have time to re-write this in
> the near term. I appreciate that you offer to help to re-organize the
> code. Once you have a patch, I can help to test it on our platforms.

Patch here, please test (and update the patch accordingly, it should
not be that complicated) because I have got other things to do too
and I have no insights into this host controller HW so it is likely
I made some mistakes.

Thanks,
Lorenzo

-- >8 --
Subject: [PATCH] drivers: pci: host: iproc: convert link check to raw PCI
 config accessors

Current iproc driver host bridge controller driver requires struct
pci_bus to be created in order to carry out PCI link checks with standard
PCI config space accessors.

This struct pci_bus dependency is fictitious and burdens the driver
with unneeded constraints (eg to use separate APIs to create and scan
the root bus).

Add PCI raw config space accessors to PCIe iproc driver and remove the
fictitious struct pci_bus dependency.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
---
 drivers/pci/host/pcie-iproc.c | 117 ++++++++++++++++++++++++++++++------------
 1 file changed, 83 insertions(+), 34 deletions(-)

diff --git a/drivers/pci/host/pcie-iproc.c b/drivers/pci/host/pcie-iproc.c
index 0f39bd2..0cc52a7 100644
--- a/drivers/pci/host/pcie-iproc.c
+++ b/drivers/pci/host/pcie-iproc.c
@@ -452,14 +452,13 @@ static inline void iproc_pcie_apb_err_disable(struct pci_bus *bus,
  * Note access to the configuration registers are protected at the higher layer
  * by 'pci_lock' in drivers/pci/access.c
  */
-static void __iomem *iproc_pcie_map_cfg_bus(struct pci_bus *bus,
+static void __iomem *iproc_pcie_map_cfg_bus(struct iproc_pcie *pcie,
+					    int busno,
 					    unsigned int devfn,
 					    int where)
 {
-	struct iproc_pcie *pcie = iproc_data(bus);
 	unsigned slot = PCI_SLOT(devfn);
 	unsigned fn = PCI_FUNC(devfn);
-	unsigned busno = bus->number;
 	u32 val;
 	u16 offset;
 
@@ -499,6 +498,58 @@ static void __iomem *iproc_pcie_map_cfg_bus(struct pci_bus *bus,
 		return (pcie->base + offset);
 }
 
+static void __iomem *iproc_pcie_bus_map_cfg_bus(struct pci_bus *bus,
+						unsigned int devfn,
+						int where)
+{
+	return iproc_pcie_map_cfg_bus(iproc_data(bus), bus->number, devfn,
+				      where);
+}
+
+static int iproc_pci_raw_config_read32(struct iproc_pcie *pcie,
+				       unsigned int devfn, int where,
+				       int size, u32 *val)
+{
+	void __iomem *addr;
+
+	addr = iproc_pcie_map_cfg_bus(pcie, 0, devfn, where & ~0x3);
+	if (!addr) {
+		*val = ~0;
+		return PCIBIOS_DEVICE_NOT_FOUND;
+	}
+
+	*val = readl(addr);
+
+	if (size <= 2)
+		*val = (*val >> (8 * (where & 3))) & ((1 << (size * 8)) - 1);
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static int iproc_pci_raw_config_write32(struct iproc_pcie *pcie,
+					unsigned int devfn, int where,
+					int size, u32 val)
+{
+	void __iomem *addr;
+	u32 mask, tmp;
+
+	addr = iproc_pcie_map_cfg_bus(pcie, 0, devfn, where & ~0x3);
+	if (!addr)
+		return PCIBIOS_DEVICE_NOT_FOUND;
+
+	if (size == 4) {
+		writel(val, addr);
+		return PCIBIOS_SUCCESSFUL;
+	}
+
+	mask = ~(((1 << (size * 8)) - 1) << ((where & 0x3) * 8));
+	tmp = readl(addr) & mask;
+	tmp |= val << ((where & 0x3) * 8);
+	writel(tmp, addr);
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
 static int iproc_pcie_config_read32(struct pci_bus *bus, unsigned int devfn,
 				    int where, int size, u32 *val)
 {
@@ -524,7 +575,7 @@ static int iproc_pcie_config_write32(struct pci_bus *bus, unsigned int devfn,
 }
 
 static struct pci_ops iproc_pcie_ops = {
-	.map_bus = iproc_pcie_map_cfg_bus,
+	.map_bus = iproc_pcie_bus_map_cfg_bus,
 	.read = iproc_pcie_config_read32,
 	.write = iproc_pcie_config_write32,
 };
@@ -556,12 +607,11 @@ static void iproc_pcie_reset(struct iproc_pcie *pcie)
 	msleep(100);
 }
 
-static int iproc_pcie_check_link(struct iproc_pcie *pcie, struct pci_bus *bus)
+static int iproc_pcie_check_link(struct iproc_pcie *pcie)
 {
 	struct device *dev = pcie->dev;
-	u8 hdr_type;
-	u32 link_ctrl, class, val;
-	u16 pos = PCI_EXP_CAP, link_status;
+	u32 hdr_type, link_ctrl, link_status, class, val;
+	u16 pos = PCI_EXP_CAP;
 	bool link_is_active = false;
 
 	/*
@@ -578,7 +628,7 @@ static int iproc_pcie_check_link(struct iproc_pcie *pcie, struct pci_bus *bus)
 	}
 
 	/* make sure we are not in EP mode */
-	pci_bus_read_config_byte(bus, 0, PCI_HEADER_TYPE, &hdr_type);
+	iproc_pci_raw_config_read32(pcie,  0, PCI_HEADER_TYPE, 1, &hdr_type);
 	if ((hdr_type & 0x7f) != PCI_HEADER_TYPE_BRIDGE) {
 		dev_err(dev, "in EP mode, hdr=%#02x\n", hdr_type);
 		return -EFAULT;
@@ -588,13 +638,16 @@ static int iproc_pcie_check_link(struct iproc_pcie *pcie, struct pci_bus *bus)
 #define PCI_BRIDGE_CTRL_REG_OFFSET 0x43c
 #define PCI_CLASS_BRIDGE_MASK      0xffff00
 #define PCI_CLASS_BRIDGE_SHIFT     8
-	pci_bus_read_config_dword(bus, 0, PCI_BRIDGE_CTRL_REG_OFFSET, &class);
+	iproc_pci_raw_config_read32(pcie, 0, PCI_BRIDGE_CTRL_REG_OFFSET,
+				    4, &class);
 	class &= ~PCI_CLASS_BRIDGE_MASK;
 	class |= (PCI_CLASS_BRIDGE_PCI << PCI_CLASS_BRIDGE_SHIFT);
-	pci_bus_write_config_dword(bus, 0, PCI_BRIDGE_CTRL_REG_OFFSET, class);
+	iproc_pci_raw_config_write32(pcie, 0, PCI_BRIDGE_CTRL_REG_OFFSET,
+				     4, class);
 
 	/* check link status to see if link is active */
-	pci_bus_read_config_word(bus, 0, pos + PCI_EXP_LNKSTA, &link_status);
+	iproc_pci_raw_config_read32(pcie, 0, pos + PCI_EXP_LNKSTA,
+				    2, &link_status);
 	if (link_status & PCI_EXP_LNKSTA_NLW)
 		link_is_active = true;
 
@@ -603,20 +656,21 @@ static int iproc_pcie_check_link(struct iproc_pcie *pcie, struct pci_bus *bus)
 #define PCI_TARGET_LINK_SPEED_MASK    0xf
 #define PCI_TARGET_LINK_SPEED_GEN2    0x2
 #define PCI_TARGET_LINK_SPEED_GEN1    0x1
-		pci_bus_read_config_dword(bus, 0,
-					  pos + PCI_EXP_LNKCTL2,
+		iproc_pci_raw_config_read32(pcie, 0,
+					  pos + PCI_EXP_LNKCTL2, 4,
 					  &link_ctrl);
 		if ((link_ctrl & PCI_TARGET_LINK_SPEED_MASK) ==
 		    PCI_TARGET_LINK_SPEED_GEN2) {
 			link_ctrl &= ~PCI_TARGET_LINK_SPEED_MASK;
 			link_ctrl |= PCI_TARGET_LINK_SPEED_GEN1;
-			pci_bus_write_config_dword(bus, 0,
-					   pos + PCI_EXP_LNKCTL2,
-					   link_ctrl);
+			iproc_pci_raw_config_write32(pcie, 0,
+						pos + PCI_EXP_LNKCTL2,
+						4, link_ctrl);
 			msleep(100);
 
-			pci_bus_read_config_word(bus, 0, pos + PCI_EXP_LNKSTA,
-						 &link_status);
+			iproc_pci_raw_config_read32(pcie, 0,
+						pos + PCI_EXP_LNKSTA,
+						2, &link_status);
 			if (link_status & PCI_EXP_LNKSTA_NLW)
 				link_is_active = true;
 		}
@@ -1252,18 +1306,10 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
 	sysdata = pcie;
 #endif
 
-	bus = pci_create_root_bus(dev, 0, &iproc_pcie_ops, sysdata, res);
-	if (!bus) {
-		dev_err(dev, "unable to create PCI root bus\n");
-		ret = -ENOMEM;
-		goto err_power_off_phy;
-	}
-	pcie->root_bus = bus;
-
-	ret = iproc_pcie_check_link(pcie, bus);
+	ret = iproc_pcie_check_link(pcie);
 	if (ret) {
 		dev_err(dev, "no PCIe EP device detected\n");
-		goto err_rm_root_bus;
+		goto err_power_off_phy;
 	}
 
 	iproc_pcie_enable(pcie);
@@ -1272,7 +1318,14 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
 		if (iproc_pcie_msi_enable(pcie))
 			dev_info(dev, "not using iProc MSI\n");
 
-	pci_scan_child_bus(bus);
+	bus = pci_scan_root_bus(dev, 0, &iproc_pcie_ops, sysdata, res);
+	if (!bus) {
+		dev_err(dev, "unable to scan PCI root bus\n");
+		ret = -ENOMEM;
+		goto err_power_off_phy;
+	}
+	pcie->root_bus = bus;
+
 	pci_assign_unassigned_bus_resources(bus);
 
 	if (pcie->map_irq)
@@ -1285,10 +1338,6 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
 
 	return 0;
 
-err_rm_root_bus:
-	pci_stop_root_bus(bus);
-	pci_remove_root_bus(bus);
-
 err_power_off_phy:
 	phy_power_off(pcie->phy);
 err_exit_phy:
-- 
2.10.0

[RFC/RFT PATCH 03/18] PCI: Introduce pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

On Fri, May 26, 2017 at 10:29:39AM -0700, Ray Jui wrote:
> 
> 
> On 5/26/17 6:07 AM, Lorenzo Pieralisi wrote:
> > On Thu, May 25, 2017 at 03:56:43PM -0500, Bjorn Helgaas wrote:
> >> [+cc Ray, Scott, Jon]
> >>
> >> On Tue, May 02, 2017 at 06:15:01PM +0100, Lorenzo Pieralisi wrote:
> >>> On Fri, Apr 28, 2017 at 02:28:38PM +0200, Arnd Bergmann wrote:
> >>>> On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
> >>>> <lorenzo.pieralisi@arm.com> wrote:
> >>>>> Current pci_scan_root_bus() interface is made up of two main
> >>>>> code paths:
> >>>>>
> >>>>> - pci_create_root_bus()
> >>>>> - pci_scan_child_bus()
> >>>>>
> >>>>> pci_create_root_bus() is a wrapper function that allows to create
> >>>>> a struct pci_host_bridge structure, initialize it with the passed
> >>>>> parameters and register it with the kernel.
> >>>>>
> >>>>> As the struct pci_host_bridge require additional struct members,
> >>>>> pci_create_root_bus() parameters list has grown in time, making
> >>>>> it unwieldy to add further parameters to it in case the struct
> >>>>> pci_host_bridge gains more members fields to augment its functionality.
> >>>>>
> >>>>> Since PCI core code provides functions to allocate struct
> >>>>> pci_host_bridge, instead of forcing the pci_create_root_bus() interface
> >>>>> to add new parameters to cater for new struct pci_host_bridge
> >>>>> functionality, it is more suitable to add an interface in PCI
> >>>>> core code to scan a PCI bus straight from a struct pci_host_bridge
> >>>>> created and customized by each specific PCI host controller driver.
> >>>>>
> >>>>> Add a pci_scan_root_bus_bridge() function to allow PCI host controller
> >>>>> drivers to create and initialize struct pci_host_bridge and scan
> >>>>> the resulting bus.
> >>>>>
> >>>>> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> >>>>> Cc: Arnd Bergmann <arnd@arndb.de>
> >>>>> Cc: Bjorn Helgaas <bhelgaas@google.com>
> >>>>
> >>>> Good idea, yes. To avoid growing the number of interfaces too
> >>>> much, should we change the existing users of pci_register_host_bridge
> >>>> in host drivers over to this entry point, and make the other one
> >>>> local to probe.c then?
> >>>
> >>> Yes, the problem is that there are drivers (ie pcie-iproc.c) that
> >>> require the struct pci_bus (created by pci_register_host_bridge())
> >>> to fiddle with it to check link status and THEN scan the bus (so
> >>> the pci_register_host_bridge() call can't be embedded in the scan
> >>> interface - the driver requires struct pci_bus for pci_ops to work
> >>> before scanning the bus itself).
> >>
> >> I think code like iproc_pcie_check_link() that requires a struct
> >> pci_bus before we even scan the bus is lame.  I think the driver
> >> should be able to bring up the link before telling the PCI core about
> >> the bridge.  Aardvark uses a typical pattern:
> >>
> >>   advk_pcie_probe
> >>     advk_pcie_setup_hw
> >>       advk_pcie_wait_for_link
> >>     pci_scan_root_bus
> >>
> >> I would rather see iproc restructured along that line than add a
> >> callback.
> >>
> >> That would require replacing the pci_bus_read_config uses in
> >> iproc_pcie_check_link() with something different, maybe iproc-internal 
> >> accessors.  Slightly messy, but I think doable.
> > 
> > I agree with you, it probably requires some cfg space accessors copy
> > and paste though but that's doable. I can write the patch myself but
> > I can't test it so help is appreciated here.
> > 
> > Thanks,
> > Lorenzo
> > 
> 
> I agree with Bjorn on the new proposed sequence that link check should
> be done before the standard root bus scan starts.
> 
> Lorenzo, I'm getting quite busy and won't have time to re-write this in
> the near term. I appreciate that you offer to help to re-organize the
> code. Once you have a patch, I can help to test it on our platforms.

Patch here, please test (and update the patch accordingly, it should
not be that complicated) because I have got other things to do too
and I have no insights into this host controller HW so it is likely
I made some mistakes.

Thanks,
Lorenzo

-- >8 --
Subject: [PATCH] drivers: pci: host: iproc: convert link check to raw PCI
 config accessors

Current iproc driver host bridge controller driver requires struct
pci_bus to be created in order to carry out PCI link checks with standard
PCI config space accessors.

This struct pci_bus dependency is fictitious and burdens the driver
with unneeded constraints (eg to use separate APIs to create and scan
the root bus).

Add PCI raw config space accessors to PCIe iproc driver and remove the
fictitious struct pci_bus dependency.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
---
 drivers/pci/host/pcie-iproc.c | 117 ++++++++++++++++++++++++++++++------------
 1 file changed, 83 insertions(+), 34 deletions(-)

diff --git a/drivers/pci/host/pcie-iproc.c b/drivers/pci/host/pcie-iproc.c
index 0f39bd2..0cc52a7 100644
--- a/drivers/pci/host/pcie-iproc.c
+++ b/drivers/pci/host/pcie-iproc.c
@@ -452,14 +452,13 @@ static inline void iproc_pcie_apb_err_disable(struct pci_bus *bus,
  * Note access to the configuration registers are protected at the higher layer
  * by 'pci_lock' in drivers/pci/access.c
  */
-static void __iomem *iproc_pcie_map_cfg_bus(struct pci_bus *bus,
+static void __iomem *iproc_pcie_map_cfg_bus(struct iproc_pcie *pcie,
+					    int busno,
 					    unsigned int devfn,
 					    int where)
 {
-	struct iproc_pcie *pcie = iproc_data(bus);
 	unsigned slot = PCI_SLOT(devfn);
 	unsigned fn = PCI_FUNC(devfn);
-	unsigned busno = bus->number;
 	u32 val;
 	u16 offset;
 
@@ -499,6 +498,58 @@ static void __iomem *iproc_pcie_map_cfg_bus(struct pci_bus *bus,
 		return (pcie->base + offset);
 }
 
+static void __iomem *iproc_pcie_bus_map_cfg_bus(struct pci_bus *bus,
+						unsigned int devfn,
+						int where)
+{
+	return iproc_pcie_map_cfg_bus(iproc_data(bus), bus->number, devfn,
+				      where);
+}
+
+static int iproc_pci_raw_config_read32(struct iproc_pcie *pcie,
+				       unsigned int devfn, int where,
+				       int size, u32 *val)
+{
+	void __iomem *addr;
+
+	addr = iproc_pcie_map_cfg_bus(pcie, 0, devfn, where & ~0x3);
+	if (!addr) {
+		*val = ~0;
+		return PCIBIOS_DEVICE_NOT_FOUND;
+	}
+
+	*val = readl(addr);
+
+	if (size <= 2)
+		*val = (*val >> (8 * (where & 3))) & ((1 << (size * 8)) - 1);
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static int iproc_pci_raw_config_write32(struct iproc_pcie *pcie,
+					unsigned int devfn, int where,
+					int size, u32 val)
+{
+	void __iomem *addr;
+	u32 mask, tmp;
+
+	addr = iproc_pcie_map_cfg_bus(pcie, 0, devfn, where & ~0x3);
+	if (!addr)
+		return PCIBIOS_DEVICE_NOT_FOUND;
+
+	if (size == 4) {
+		writel(val, addr);
+		return PCIBIOS_SUCCESSFUL;
+	}
+
+	mask = ~(((1 << (size * 8)) - 1) << ((where & 0x3) * 8));
+	tmp = readl(addr) & mask;
+	tmp |= val << ((where & 0x3) * 8);
+	writel(tmp, addr);
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
 static int iproc_pcie_config_read32(struct pci_bus *bus, unsigned int devfn,
 				    int where, int size, u32 *val)
 {
@@ -524,7 +575,7 @@ static int iproc_pcie_config_write32(struct pci_bus *bus, unsigned int devfn,
 }
 
 static struct pci_ops iproc_pcie_ops = {
-	.map_bus = iproc_pcie_map_cfg_bus,
+	.map_bus = iproc_pcie_bus_map_cfg_bus,
 	.read = iproc_pcie_config_read32,
 	.write = iproc_pcie_config_write32,
 };
@@ -556,12 +607,11 @@ static void iproc_pcie_reset(struct iproc_pcie *pcie)
 	msleep(100);
 }
 
-static int iproc_pcie_check_link(struct iproc_pcie *pcie, struct pci_bus *bus)
+static int iproc_pcie_check_link(struct iproc_pcie *pcie)
 {
 	struct device *dev = pcie->dev;
-	u8 hdr_type;
-	u32 link_ctrl, class, val;
-	u16 pos = PCI_EXP_CAP, link_status;
+	u32 hdr_type, link_ctrl, link_status, class, val;
+	u16 pos = PCI_EXP_CAP;
 	bool link_is_active = false;
 
 	/*
@@ -578,7 +628,7 @@ static int iproc_pcie_check_link(struct iproc_pcie *pcie, struct pci_bus *bus)
 	}
 
 	/* make sure we are not in EP mode */
-	pci_bus_read_config_byte(bus, 0, PCI_HEADER_TYPE, &hdr_type);
+	iproc_pci_raw_config_read32(pcie,  0, PCI_HEADER_TYPE, 1, &hdr_type);
 	if ((hdr_type & 0x7f) != PCI_HEADER_TYPE_BRIDGE) {
 		dev_err(dev, "in EP mode, hdr=%#02x\n", hdr_type);
 		return -EFAULT;
@@ -588,13 +638,16 @@ static int iproc_pcie_check_link(struct iproc_pcie *pcie, struct pci_bus *bus)
 #define PCI_BRIDGE_CTRL_REG_OFFSET 0x43c
 #define PCI_CLASS_BRIDGE_MASK      0xffff00
 #define PCI_CLASS_BRIDGE_SHIFT     8
-	pci_bus_read_config_dword(bus, 0, PCI_BRIDGE_CTRL_REG_OFFSET, &class);
+	iproc_pci_raw_config_read32(pcie, 0, PCI_BRIDGE_CTRL_REG_OFFSET,
+				    4, &class);
 	class &= ~PCI_CLASS_BRIDGE_MASK;
 	class |= (PCI_CLASS_BRIDGE_PCI << PCI_CLASS_BRIDGE_SHIFT);
-	pci_bus_write_config_dword(bus, 0, PCI_BRIDGE_CTRL_REG_OFFSET, class);
+	iproc_pci_raw_config_write32(pcie, 0, PCI_BRIDGE_CTRL_REG_OFFSET,
+				     4, class);
 
 	/* check link status to see if link is active */
-	pci_bus_read_config_word(bus, 0, pos + PCI_EXP_LNKSTA, &link_status);
+	iproc_pci_raw_config_read32(pcie, 0, pos + PCI_EXP_LNKSTA,
+				    2, &link_status);
 	if (link_status & PCI_EXP_LNKSTA_NLW)
 		link_is_active = true;
 
@@ -603,20 +656,21 @@ static int iproc_pcie_check_link(struct iproc_pcie *pcie, struct pci_bus *bus)
 #define PCI_TARGET_LINK_SPEED_MASK    0xf
 #define PCI_TARGET_LINK_SPEED_GEN2    0x2
 #define PCI_TARGET_LINK_SPEED_GEN1    0x1
-		pci_bus_read_config_dword(bus, 0,
-					  pos + PCI_EXP_LNKCTL2,
+		iproc_pci_raw_config_read32(pcie, 0,
+					  pos + PCI_EXP_LNKCTL2, 4,
 					  &link_ctrl);
 		if ((link_ctrl & PCI_TARGET_LINK_SPEED_MASK) ==
 		    PCI_TARGET_LINK_SPEED_GEN2) {
 			link_ctrl &= ~PCI_TARGET_LINK_SPEED_MASK;
 			link_ctrl |= PCI_TARGET_LINK_SPEED_GEN1;
-			pci_bus_write_config_dword(bus, 0,
-					   pos + PCI_EXP_LNKCTL2,
-					   link_ctrl);
+			iproc_pci_raw_config_write32(pcie, 0,
+						pos + PCI_EXP_LNKCTL2,
+						4, link_ctrl);
 			msleep(100);
 
-			pci_bus_read_config_word(bus, 0, pos + PCI_EXP_LNKSTA,
-						 &link_status);
+			iproc_pci_raw_config_read32(pcie, 0,
+						pos + PCI_EXP_LNKSTA,
+						2, &link_status);
 			if (link_status & PCI_EXP_LNKSTA_NLW)
 				link_is_active = true;
 		}
@@ -1252,18 +1306,10 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
 	sysdata = pcie;
 #endif
 
-	bus = pci_create_root_bus(dev, 0, &iproc_pcie_ops, sysdata, res);
-	if (!bus) {
-		dev_err(dev, "unable to create PCI root bus\n");
-		ret = -ENOMEM;
-		goto err_power_off_phy;
-	}
-	pcie->root_bus = bus;
-
-	ret = iproc_pcie_check_link(pcie, bus);
+	ret = iproc_pcie_check_link(pcie);
 	if (ret) {
 		dev_err(dev, "no PCIe EP device detected\n");
-		goto err_rm_root_bus;
+		goto err_power_off_phy;
 	}
 
 	iproc_pcie_enable(pcie);
@@ -1272,7 +1318,14 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
 		if (iproc_pcie_msi_enable(pcie))
 			dev_info(dev, "not using iProc MSI\n");
 
-	pci_scan_child_bus(bus);
+	bus = pci_scan_root_bus(dev, 0, &iproc_pcie_ops, sysdata, res);
+	if (!bus) {
+		dev_err(dev, "unable to scan PCI root bus\n");
+		ret = -ENOMEM;
+		goto err_power_off_phy;
+	}
+	pcie->root_bus = bus;
+
 	pci_assign_unassigned_bus_resources(bus);
 
 	if (pcie->map_irq)
@@ -1285,10 +1338,6 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
 
 	return 0;
 
-err_rm_root_bus:
-	pci_stop_root_bus(bus);
-	pci_remove_root_bus(bus);
-
 err_power_off_phy:
 	phy_power_off(pcie->phy);
 err_exit_phy:
-- 
2.10.0

Re: [RFC/RFT PATCH 03/18] PCI: Introduce pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

On Thu, May 25, 2017 at 03:56:43PM -0500, Bjorn Helgaas wrote:
> [+cc Ray, Scott, Jon]
> 
> On Tue, May 02, 2017 at 06:15:01PM +0100, Lorenzo Pieralisi wrote:
> > On Fri, Apr 28, 2017 at 02:28:38PM +0200, Arnd Bergmann wrote:
> > > On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
> > > <lorenzo.pieralisi@arm.com> wrote:
> > > > Current pci_scan_root_bus() interface is made up of two main
> > > > code paths:
> > > >
> > > > - pci_create_root_bus()
> > > > - pci_scan_child_bus()
> > > >
> > > > pci_create_root_bus() is a wrapper function that allows to create
> > > > a struct pci_host_bridge structure, initialize it with the passed
> > > > parameters and register it with the kernel.
> > > >
> > > > As the struct pci_host_bridge require additional struct members,
> > > > pci_create_root_bus() parameters list has grown in time, making
> > > > it unwieldy to add further parameters to it in case the struct
> > > > pci_host_bridge gains more members fields to augment its functionality.
> > > >
> > > > Since PCI core code provides functions to allocate struct
> > > > pci_host_bridge, instead of forcing the pci_create_root_bus() interface
> > > > to add new parameters to cater for new struct pci_host_bridge
> > > > functionality, it is more suitable to add an interface in PCI
> > > > core code to scan a PCI bus straight from a struct pci_host_bridge
> > > > created and customized by each specific PCI host controller driver.
> > > >
> > > > Add a pci_scan_root_bus_bridge() function to allow PCI host controller
> > > > drivers to create and initialize struct pci_host_bridge and scan
> > > > the resulting bus.
> > > >
> > > > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > > > Cc: Arnd Bergmann <arnd@arndb.de>
> > > > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > > 
> > > Good idea, yes. To avoid growing the number of interfaces too
> > > much, should we change the existing users of pci_register_host_bridge
> > > in host drivers over to this entry point, and make the other one
> > > local to probe.c then?
> > 
> > Yes, the problem is that there are drivers (ie pcie-iproc.c) that
> > require the struct pci_bus (created by pci_register_host_bridge())
> > to fiddle with it to check link status and THEN scan the bus (so
> > the pci_register_host_bridge() call can't be embedded in the scan
> > interface - the driver requires struct pci_bus for pci_ops to work
> > before scanning the bus itself).
> 
> I think code like iproc_pcie_check_link() that requires a struct
> pci_bus before we even scan the bus is lame.  I think the driver
> should be able to bring up the link before telling the PCI core about
> the bridge.  Aardvark uses a typical pattern:
> 
>   advk_pcie_probe
>     advk_pcie_setup_hw
>       advk_pcie_wait_for_link
>     pci_scan_root_bus
> 
> I would rather see iproc restructured along that line than add a
> callback.
> 
> That would require replacing the pci_bus_read_config uses in
> iproc_pcie_check_link() with something different, maybe iproc-internal 
> accessors.  Slightly messy, but I think doable.

And now I have noticed pci-ftpci100.c requires the same patching for the
same reason.

I hope I will get this series merged before other DT PCI host
controller drivers are because it is honestly becoming unmanageable
for me to patch them all - it is time to consolidate them, copy and
paste is doing damage here and will soon become impossible to fix.

Thanks,
Lorenzo

> > I will see how I can accommodate this change because you definitely
> > have a point.
> > 
> > > > diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> > > > index 7e4ffc4..c7a7f72 100644
> > > > --- a/drivers/pci/probe.c
> > > > +++ b/drivers/pci/probe.c
> > > > @@ -2412,6 +2412,44 @@ void pci_bus_release_busn_res(struct pci_bus *b)
> > > >                         res, ret ? "can not be" : "is");
> > > >  }
> > > >
> > > > +int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge)
> > > > +{
> > > > +       struct resource_entry *window;
> > > > +       bool found = false;
> > > > +       struct pci_bus *b;
> > > > +       int max, bus, ret;
> > > > +
> > > > +       if (!bridge)
> > > > +               return -EINVAL;
> > > > +
> > > > +       resource_list_for_each_entry(window, &bridge->windows)
> > > > +               if (window->res->flags & IORESOURCE_BUS) {
> > > > +                       found = true;
> > > > +                       break;
> > > > +               }
> > > > +
> > > > +       ret = pci_register_host_bridge(bridge);
> > > > +       if (ret < 0)
> > > > +               return ret;
> > > > +
> > > > +       b = bridge->bus;
> > > > +       bus = bridge->busnr;
> > > > +
> > > > +       if (!found) {
> > > > +               dev_info(&b->dev,
> > > > +                "No busn resource found for root bus, will use [bus %02x-ff]\n",
> > > > +                       bus);
> > > > +               pci_bus_insert_busn_res(b, bus, 255);
> > > > +       }
> > > > +
> > > > +       max = pci_scan_child_bus(b);
> > > > +
> > > > +       if (!found)
> > > > +               pci_bus_update_busn_res_end(b, max);
> > > > +
> > > > +       return 0;
> > > > +}
> > > > +
> > > 
> > > We probably want an EXPORT_SYMBOL() here as well.
> > 
> > Yep, sure.
> > 
> > Thanks for having a look !
> > 
> > Lorenzo
> > 
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 03/18] PCI: Introduce pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

On Thu, May 25, 2017 at 03:56:43PM -0500, Bjorn Helgaas wrote:
> [+cc Ray, Scott, Jon]
> 
> On Tue, May 02, 2017 at 06:15:01PM +0100, Lorenzo Pieralisi wrote:
> > On Fri, Apr 28, 2017 at 02:28:38PM +0200, Arnd Bergmann wrote:
> > > On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
> > > <lorenzo.pieralisi@arm.com> wrote:
> > > > Current pci_scan_root_bus() interface is made up of two main
> > > > code paths:
> > > >
> > > > - pci_create_root_bus()
> > > > - pci_scan_child_bus()
> > > >
> > > > pci_create_root_bus() is a wrapper function that allows to create
> > > > a struct pci_host_bridge structure, initialize it with the passed
> > > > parameters and register it with the kernel.
> > > >
> > > > As the struct pci_host_bridge require additional struct members,
> > > > pci_create_root_bus() parameters list has grown in time, making
> > > > it unwieldy to add further parameters to it in case the struct
> > > > pci_host_bridge gains more members fields to augment its functionality.
> > > >
> > > > Since PCI core code provides functions to allocate struct
> > > > pci_host_bridge, instead of forcing the pci_create_root_bus() interface
> > > > to add new parameters to cater for new struct pci_host_bridge
> > > > functionality, it is more suitable to add an interface in PCI
> > > > core code to scan a PCI bus straight from a struct pci_host_bridge
> > > > created and customized by each specific PCI host controller driver.
> > > >
> > > > Add a pci_scan_root_bus_bridge() function to allow PCI host controller
> > > > drivers to create and initialize struct pci_host_bridge and scan
> > > > the resulting bus.
> > > >
> > > > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > > > Cc: Arnd Bergmann <arnd@arndb.de>
> > > > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > > 
> > > Good idea, yes. To avoid growing the number of interfaces too
> > > much, should we change the existing users of pci_register_host_bridge
> > > in host drivers over to this entry point, and make the other one
> > > local to probe.c then?
> > 
> > Yes, the problem is that there are drivers (ie pcie-iproc.c) that
> > require the struct pci_bus (created by pci_register_host_bridge())
> > to fiddle with it to check link status and THEN scan the bus (so
> > the pci_register_host_bridge() call can't be embedded in the scan
> > interface - the driver requires struct pci_bus for pci_ops to work
> > before scanning the bus itself).
> 
> I think code like iproc_pcie_check_link() that requires a struct
> pci_bus before we even scan the bus is lame.  I think the driver
> should be able to bring up the link before telling the PCI core about
> the bridge.  Aardvark uses a typical pattern:
> 
>   advk_pcie_probe
>     advk_pcie_setup_hw
>       advk_pcie_wait_for_link
>     pci_scan_root_bus
> 
> I would rather see iproc restructured along that line than add a
> callback.
> 
> That would require replacing the pci_bus_read_config uses in
> iproc_pcie_check_link() with something different, maybe iproc-internal 
> accessors.  Slightly messy, but I think doable.

And now I have noticed pci-ftpci100.c requires the same patching for the
same reason.

I hope I will get this series merged before other DT PCI host
controller drivers are because it is honestly becoming unmanageable
for me to patch them all - it is time to consolidate them, copy and
paste is doing damage here and will soon become impossible to fix.

Thanks,
Lorenzo

> > I will see how I can accommodate this change because you definitely
> > have a point.
> > 
> > > > diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> > > > index 7e4ffc4..c7a7f72 100644
> > > > --- a/drivers/pci/probe.c
> > > > +++ b/drivers/pci/probe.c
> > > > @@ -2412,6 +2412,44 @@ void pci_bus_release_busn_res(struct pci_bus *b)
> > > >                         res, ret ? "can not be" : "is");
> > > >  }
> > > >
> > > > +int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge)
> > > > +{
> > > > +       struct resource_entry *window;
> > > > +       bool found = false;
> > > > +       struct pci_bus *b;
> > > > +       int max, bus, ret;
> > > > +
> > > > +       if (!bridge)
> > > > +               return -EINVAL;
> > > > +
> > > > +       resource_list_for_each_entry(window, &bridge->windows)
> > > > +               if (window->res->flags & IORESOURCE_BUS) {
> > > > +                       found = true;
> > > > +                       break;
> > > > +               }
> > > > +
> > > > +       ret = pci_register_host_bridge(bridge);
> > > > +       if (ret < 0)
> > > > +               return ret;
> > > > +
> > > > +       b = bridge->bus;
> > > > +       bus = bridge->busnr;
> > > > +
> > > > +       if (!found) {
> > > > +               dev_info(&b->dev,
> > > > +                "No busn resource found for root bus, will use [bus %02x-ff]\n",
> > > > +                       bus);
> > > > +               pci_bus_insert_busn_res(b, bus, 255);
> > > > +       }
> > > > +
> > > > +       max = pci_scan_child_bus(b);
> > > > +
> > > > +       if (!found)
> > > > +               pci_bus_update_busn_res_end(b, max);
> > > > +
> > > > +       return 0;
> > > > +}
> > > > +
> > > 
> > > We probably want an EXPORT_SYMBOL() here as well.
> > 
> > Yep, sure.
> > 
> > Thanks for having a look !
> > 
> > Lorenzo
> > 
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel at lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [RFC/RFT PATCH 08/18] PCI: designware: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

On Fri, Apr 28, 2017 at 03:13:04PM +0200, Arnd Bergmann wrote:
> On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
> <lorenzo.pieralisi@arm.com> wrote:
> > The introduction of pci_scan_root_bus_bridge() provides a PCI core
> > API to scan a PCI root bus backed by an already initialized
> > struct pci_host_bridge object, which simplifies the bus scan
> > interface and makes the PCI scan root bus interface easier to
> > generalize as members are added to the struct pci_host_bridge().
> >
> > Convert PCI designware host code to pci_scan_root_bus_bridge() to
> > improve the PCI root bus scanning interface.
> >
> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: Jingoo Han <jingoohan1@gmail.com>
> > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > Cc: Joao Pinto <Joao.Pinto@synopsys.com>
> > ---
> >  drivers/pci/dwc/pcie-designware-host.c | 36 +++++++++++++++++++++-------------
> >  1 file changed, 22 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
> > index 5ba3349..e43c21a 100644
> > --- a/drivers/pci/dwc/pcie-designware-host.c
> > +++ b/drivers/pci/dwc/pcie-designware-host.c
> > @@ -294,16 +294,21 @@ int dw_pcie_host_init(struct pcie_port *pp)
> >                 dev_err(dev, "missing *config* reg space\n");
> >         }
> >
> > -       ret = of_pci_get_host_bridge_resources(np, 0, 0xff, &res, &pp->io_base);
> > +       bridge = pci_alloc_host_bridge(0);
> > +       if (!bridge)
> > +               return  -ENOMEM;
> > +
> 
> I think here we warn to have the pci_alloc_host_bridge() called in the
> individual
> drivers, to have them allocate the dw_pcie structure as part of the host
> bridge allocation, before calling hisi_add_pcie_port().

I am almost done refactoring this series and this is the last review to
address. What you suggest above makes sense but:

1) it means patching ALL dw_pcie_host_init() callers and allocate the
   host bridge there, not sure it simplifies, certainly it complicates
   the error handling path (given that the host bridge memory is
   probably the only memory that is allocated with kzalloc instead of
   devm interface so it needs unwinding)
2) I noticed that allocating the host bridge in the caller complicates
   error handling, in particular code in the mainline (ie tegra and
   ftpci100) using pci_alloc_host_bridge() needs already patching since it
   may leak memory if PCI host bridge drivers probing fails.

I can implement (1) and (2) but I wanted to ask first to understand if
that's the direction we want to take.

Lorenzo

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 08/18] PCI: designware: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

On Fri, Apr 28, 2017 at 03:13:04PM +0200, Arnd Bergmann wrote:
> On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
> <lorenzo.pieralisi@arm.com> wrote:
> > The introduction of pci_scan_root_bus_bridge() provides a PCI core
> > API to scan a PCI root bus backed by an already initialized
> > struct pci_host_bridge object, which simplifies the bus scan
> > interface and makes the PCI scan root bus interface easier to
> > generalize as members are added to the struct pci_host_bridge().
> >
> > Convert PCI designware host code to pci_scan_root_bus_bridge() to
> > improve the PCI root bus scanning interface.
> >
> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: Jingoo Han <jingoohan1@gmail.com>
> > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > Cc: Joao Pinto <Joao.Pinto@synopsys.com>
> > ---
> >  drivers/pci/dwc/pcie-designware-host.c | 36 +++++++++++++++++++++-------------
> >  1 file changed, 22 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
> > index 5ba3349..e43c21a 100644
> > --- a/drivers/pci/dwc/pcie-designware-host.c
> > +++ b/drivers/pci/dwc/pcie-designware-host.c
> > @@ -294,16 +294,21 @@ int dw_pcie_host_init(struct pcie_port *pp)
> >                 dev_err(dev, "missing *config* reg space\n");
> >         }
> >
> > -       ret = of_pci_get_host_bridge_resources(np, 0, 0xff, &res, &pp->io_base);
> > +       bridge = pci_alloc_host_bridge(0);
> > +       if (!bridge)
> > +               return  -ENOMEM;
> > +
> 
> I think here we warn to have the pci_alloc_host_bridge() called in the
> individual
> drivers, to have them allocate the dw_pcie structure as part of the host
> bridge allocation, before calling hisi_add_pcie_port().

I am almost done refactoring this series and this is the last review to
address. What you suggest above makes sense but:

1) it means patching ALL dw_pcie_host_init() callers and allocate the
   host bridge there, not sure it simplifies, certainly it complicates
   the error handling path (given that the host bridge memory is
   probably the only memory that is allocated with kzalloc instead of
   devm interface so it needs unwinding)
2) I noticed that allocating the host bridge in the caller complicates
   error handling, in particular code in the mainline (ie tegra and
   ftpci100) using pci_alloc_host_bridge() needs already patching since it
   may leak memory if PCI host bridge drivers probing fails.

I can implement (1) and (2) but I wanted to ask first to understand if
that's the direction we want to take.

Lorenzo

Re: [RFC/RFT PATCH 08/18] PCI: designware: Convert PCI scan API to pci_scan_root_bus_bridge()

[Arnd Bergmann]

On Fri, Jun 2, 2017 at 1:49 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> On Fri, Apr 28, 2017 at 03:13:04PM +0200, Arnd Bergmann wrote:
>> On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
>> <lorenzo.pieralisi@arm.com> wrote:
>> > The introduction of pci_scan_root_bus_bridge() provides a PCI core
>> > API to scan a PCI root bus backed by an already initialized
>> > struct pci_host_bridge object, which simplifies the bus scan
>> > interface and makes the PCI scan root bus interface easier to
>> > generalize as members are added to the struct pci_host_bridge().
>> >
>> > Convert PCI designware host code to pci_scan_root_bus_bridge() to
>> > improve the PCI root bus scanning interface.
>> >
>> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
>> > Cc: Jingoo Han <jingoohan1@gmail.com>
>> > Cc: Bjorn Helgaas <bhelgaas@google.com>
>> > Cc: Joao Pinto <Joao.Pinto@synopsys.com>
>> > ---
>> >  drivers/pci/dwc/pcie-designware-host.c | 36 +++++++++++++++++++++-------------
>> >  1 file changed, 22 insertions(+), 14 deletions(-)
>> >
>> > diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
>> > index 5ba3349..e43c21a 100644
>> > --- a/drivers/pci/dwc/pcie-designware-host.c
>> > +++ b/drivers/pci/dwc/pcie-designware-host.c
>> > @@ -294,16 +294,21 @@ int dw_pcie_host_init(struct pcie_port *pp)
>> >                 dev_err(dev, "missing *config* reg space\n");
>> >         }
>> >
>> > -       ret = of_pci_get_host_bridge_resources(np, 0, 0xff, &res, &pp->io_base);
>> > +       bridge = pci_alloc_host_bridge(0);
>> > +       if (!bridge)
>> > +               return  -ENOMEM;
>> > +
>>
>> I think here we warn to have the pci_alloc_host_bridge() called in the
>> individual
>> drivers, to have them allocate the dw_pcie structure as part of the host
>> bridge allocation, before calling hisi_add_pcie_port().
>
> I am almost done refactoring this series and this is the last review to
> address. What you suggest above makes sense but:
>
> 1) it means patching ALL dw_pcie_host_init() callers and allocate the
>    host bridge there, not sure it simplifies, certainly it complicates
>    the error handling path (given that the host bridge memory is
>    probably the only memory that is allocated with kzalloc instead of
>    devm interface so it needs unwinding)
>
> 2) I noticed that allocating the host bridge in the caller complicates
>    error handling, in particular code in the mainline (ie tegra and
>    ftpci100) using pci_alloc_host_bridge() needs already patching since it
>    may leak memory if PCI host bridge drivers probing fails.
>
> I can implement (1) and (2) but I wanted to ask first to understand if
> that's the direction we want to take.

Good question. Maybe we should add a devm_pci_alloc_host_bridge()
instead? Would that solve these problems without creating bigger ones?

        Arnd

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 08/18] PCI: designware: Convert PCI scan API to pci_scan_root_bus_bridge()

[Arnd Bergmann]

On Fri, Jun 2, 2017 at 1:49 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> On Fri, Apr 28, 2017 at 03:13:04PM +0200, Arnd Bergmann wrote:
>> On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
>> <lorenzo.pieralisi@arm.com> wrote:
>> > The introduction of pci_scan_root_bus_bridge() provides a PCI core
>> > API to scan a PCI root bus backed by an already initialized
>> > struct pci_host_bridge object, which simplifies the bus scan
>> > interface and makes the PCI scan root bus interface easier to
>> > generalize as members are added to the struct pci_host_bridge().
>> >
>> > Convert PCI designware host code to pci_scan_root_bus_bridge() to
>> > improve the PCI root bus scanning interface.
>> >
>> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
>> > Cc: Jingoo Han <jingoohan1@gmail.com>
>> > Cc: Bjorn Helgaas <bhelgaas@google.com>
>> > Cc: Joao Pinto <Joao.Pinto@synopsys.com>
>> > ---
>> >  drivers/pci/dwc/pcie-designware-host.c | 36 +++++++++++++++++++++-------------
>> >  1 file changed, 22 insertions(+), 14 deletions(-)
>> >
>> > diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
>> > index 5ba3349..e43c21a 100644
>> > --- a/drivers/pci/dwc/pcie-designware-host.c
>> > +++ b/drivers/pci/dwc/pcie-designware-host.c
>> > @@ -294,16 +294,21 @@ int dw_pcie_host_init(struct pcie_port *pp)
>> >                 dev_err(dev, "missing *config* reg space\n");
>> >         }
>> >
>> > -       ret = of_pci_get_host_bridge_resources(np, 0, 0xff, &res, &pp->io_base);
>> > +       bridge = pci_alloc_host_bridge(0);
>> > +       if (!bridge)
>> > +               return  -ENOMEM;
>> > +
>>
>> I think here we warn to have the pci_alloc_host_bridge() called in the
>> individual
>> drivers, to have them allocate the dw_pcie structure as part of the host
>> bridge allocation, before calling hisi_add_pcie_port().
>
> I am almost done refactoring this series and this is the last review to
> address. What you suggest above makes sense but:
>
> 1) it means patching ALL dw_pcie_host_init() callers and allocate the
>    host bridge there, not sure it simplifies, certainly it complicates
>    the error handling path (given that the host bridge memory is
>    probably the only memory that is allocated with kzalloc instead of
>    devm interface so it needs unwinding)
>
> 2) I noticed that allocating the host bridge in the caller complicates
>    error handling, in particular code in the mainline (ie tegra and
>    ftpci100) using pci_alloc_host_bridge() needs already patching since it
>    may leak memory if PCI host bridge drivers probing fails.
>
> I can implement (1) and (2) but I wanted to ask first to understand if
> that's the direction we want to take.

Good question. Maybe we should add a devm_pci_alloc_host_bridge()
instead? Would that solve these problems without creating bigger ones?

        Arnd

Re: [RFC/RFT PATCH 08/18] PCI: designware: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

On Fri, Jun 02, 2017 at 03:12:48PM +0200, Arnd Bergmann wrote:
> On Fri, Jun 2, 2017 at 1:49 PM, Lorenzo Pieralisi
> <lorenzo.pieralisi@arm.com> wrote:
> > On Fri, Apr 28, 2017 at 03:13:04PM +0200, Arnd Bergmann wrote:
> >> On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
> >> <lorenzo.pieralisi@arm.com> wrote:
> >> > The introduction of pci_scan_root_bus_bridge() provides a PCI core
> >> > API to scan a PCI root bus backed by an already initialized
> >> > struct pci_host_bridge object, which simplifies the bus scan
> >> > interface and makes the PCI scan root bus interface easier to
> >> > generalize as members are added to the struct pci_host_bridge().
> >> >
> >> > Convert PCI designware host code to pci_scan_root_bus_bridge() to
> >> > improve the PCI root bus scanning interface.
> >> >
> >> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> >> > Cc: Jingoo Han <jingoohan1@gmail.com>
> >> > Cc: Bjorn Helgaas <bhelgaas@google.com>
> >> > Cc: Joao Pinto <Joao.Pinto@synopsys.com>
> >> > ---
> >> >  drivers/pci/dwc/pcie-designware-host.c | 36 +++++++++++++++++++++-------------
> >> >  1 file changed, 22 insertions(+), 14 deletions(-)
> >> >
> >> > diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
> >> > index 5ba3349..e43c21a 100644
> >> > --- a/drivers/pci/dwc/pcie-designware-host.c
> >> > +++ b/drivers/pci/dwc/pcie-designware-host.c
> >> > @@ -294,16 +294,21 @@ int dw_pcie_host_init(struct pcie_port *pp)
> >> >                 dev_err(dev, "missing *config* reg space\n");
> >> >         }
> >> >
> >> > -       ret = of_pci_get_host_bridge_resources(np, 0, 0xff, &res, &pp->io_base);
> >> > +       bridge = pci_alloc_host_bridge(0);
> >> > +       if (!bridge)
> >> > +               return  -ENOMEM;
> >> > +
> >>
> >> I think here we warn to have the pci_alloc_host_bridge() called in the
> >> individual
> >> drivers, to have them allocate the dw_pcie structure as part of the host
> >> bridge allocation, before calling hisi_add_pcie_port().
> >
> > I am almost done refactoring this series and this is the last review to
> > address. What you suggest above makes sense but:
> >
> > 1) it means patching ALL dw_pcie_host_init() callers and allocate the
> >    host bridge there, not sure it simplifies, certainly it complicates
> >    the error handling path (given that the host bridge memory is
> >    probably the only memory that is allocated with kzalloc instead of
> >    devm interface so it needs unwinding)
> >
> > 2) I noticed that allocating the host bridge in the caller complicates
> >    error handling, in particular code in the mainline (ie tegra and
> >    ftpci100) using pci_alloc_host_bridge() needs already patching since it
> >    may leak memory if PCI host bridge drivers probing fails.
> >
> > I can implement (1) and (2) but I wanted to ask first to understand if
> > that's the direction we want to take.
> 
> Good question. Maybe we should add a devm_pci_alloc_host_bridge()
> instead? Would that solve these problems without creating bigger ones?

It would be yet another PCI core call (ie unfortunately we still need
pci_alloc_host_bridge() for bridges with no parent device eg bios32) but
I think that's the only option we have if we do not want to clutter the
host bridges error paths with host bridge free calls.

Implementing it should be relatively simple by reshuffling functions.

Thoughts ?

Lorenzo

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 08/18] PCI: designware: Convert PCI scan API to pci_scan_root_bus_bridge()

[Lorenzo Pieralisi]

On Fri, Jun 02, 2017 at 03:12:48PM +0200, Arnd Bergmann wrote:
> On Fri, Jun 2, 2017 at 1:49 PM, Lorenzo Pieralisi
> <lorenzo.pieralisi@arm.com> wrote:
> > On Fri, Apr 28, 2017 at 03:13:04PM +0200, Arnd Bergmann wrote:
> >> On Wed, Apr 26, 2017 at 1:17 PM, Lorenzo Pieralisi
> >> <lorenzo.pieralisi@arm.com> wrote:
> >> > The introduction of pci_scan_root_bus_bridge() provides a PCI core
> >> > API to scan a PCI root bus backed by an already initialized
> >> > struct pci_host_bridge object, which simplifies the bus scan
> >> > interface and makes the PCI scan root bus interface easier to
> >> > generalize as members are added to the struct pci_host_bridge().
> >> >
> >> > Convert PCI designware host code to pci_scan_root_bus_bridge() to
> >> > improve the PCI root bus scanning interface.
> >> >
> >> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> >> > Cc: Jingoo Han <jingoohan1@gmail.com>
> >> > Cc: Bjorn Helgaas <bhelgaas@google.com>
> >> > Cc: Joao Pinto <Joao.Pinto@synopsys.com>
> >> > ---
> >> >  drivers/pci/dwc/pcie-designware-host.c | 36 +++++++++++++++++++++-------------
> >> >  1 file changed, 22 insertions(+), 14 deletions(-)
> >> >
> >> > diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
> >> > index 5ba3349..e43c21a 100644
> >> > --- a/drivers/pci/dwc/pcie-designware-host.c
> >> > +++ b/drivers/pci/dwc/pcie-designware-host.c
> >> > @@ -294,16 +294,21 @@ int dw_pcie_host_init(struct pcie_port *pp)
> >> >                 dev_err(dev, "missing *config* reg space\n");
> >> >         }
> >> >
> >> > -       ret = of_pci_get_host_bridge_resources(np, 0, 0xff, &res, &pp->io_base);
> >> > +       bridge = pci_alloc_host_bridge(0);
> >> > +       if (!bridge)
> >> > +               return  -ENOMEM;
> >> > +
> >>
> >> I think here we warn to have the pci_alloc_host_bridge() called in the
> >> individual
> >> drivers, to have them allocate the dw_pcie structure as part of the host
> >> bridge allocation, before calling hisi_add_pcie_port().
> >
> > I am almost done refactoring this series and this is the last review to
> > address. What you suggest above makes sense but:
> >
> > 1) it means patching ALL dw_pcie_host_init() callers and allocate the
> >    host bridge there, not sure it simplifies, certainly it complicates
> >    the error handling path (given that the host bridge memory is
> >    probably the only memory that is allocated with kzalloc instead of
> >    devm interface so it needs unwinding)
> >
> > 2) I noticed that allocating the host bridge in the caller complicates
> >    error handling, in particular code in the mainline (ie tegra and
> >    ftpci100) using pci_alloc_host_bridge() needs already patching since it
> >    may leak memory if PCI host bridge drivers probing fails.
> >
> > I can implement (1) and (2) but I wanted to ask first to understand if
> > that's the direction we want to take.
> 
> Good question. Maybe we should add a devm_pci_alloc_host_bridge()
> instead? Would that solve these problems without creating bigger ones?

It would be yet another PCI core call (ie unfortunately we still need
pci_alloc_host_bridge() for bridges with no parent device eg bios32) but
I think that's the only option we have if we do not want to clutter the
host bridges error paths with host bridge free calls.

Implementing it should be relatively simple by reshuffling functions.

Thoughts ?

Lorenzo

Re: [RFC/RFT PATCH 08/18] PCI: designware: Convert PCI scan API to pci_scan_root_bus_bridge()

[Arnd Bergmann]

On Fri, Jun 2, 2017 at 3:56 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> On Fri, Jun 02, 2017 at 03:12:48PM +0200, Arnd Bergmann wrote:
>> > I am almost done refactoring this series and this is the last review to
>> > address. What you suggest above makes sense but:
>> >
>> > 1) it means patching ALL dw_pcie_host_init() callers and allocate the
>> >    host bridge there, not sure it simplifies, certainly it complicates
>> >    the error handling path (given that the host bridge memory is
>> >    probably the only memory that is allocated with kzalloc instead of
>> >    devm interface so it needs unwinding)
>> >
>> > 2) I noticed that allocating the host bridge in the caller complicates
>> >    error handling, in particular code in the mainline (ie tegra and
>> >    ftpci100) using pci_alloc_host_bridge() needs already patching since it
>> >    may leak memory if PCI host bridge drivers probing fails.
>> >
>> > I can implement (1) and (2) but I wanted to ask first to understand if
>> > that's the direction we want to take.
>>
>> Good question. Maybe we should add a devm_pci_alloc_host_bridge()
>> instead? Would that solve these problems without creating bigger ones?
>
> It would be yet another PCI core call (ie unfortunately we still need
> pci_alloc_host_bridge() for bridges with no parent device eg bios32) but
> I think that's the only option we have if we do not want to clutter the
> host bridges error paths with host bridge free calls.
>
> Implementing it should be relatively simple by reshuffling functions.
>
> Thoughts ?

I think adding this one would be fairly harmless because it has a clear
purpose and can easily be mixed with the rest of the API.

In one of the earlier drafts, we discussed just letting the user call an
initialization function to set the members and otherwise using kmalloc()
themselves. We decided on this one to save an extra function call in
each driver, but in retrospect, it would have saved us the discussion
now.

If we end up adding a devm_pci_alloc_host_bridge (or maybe
pcim_alloc_host_bridge), we also need to decide what part of the
cleanup would happen during the unwinding, besides the kfree().

        Arnd

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[RFC/RFT PATCH 08/18] PCI: designware: Convert PCI scan API to pci_scan_root_bus_bridge()

[Arnd Bergmann]

On Fri, Jun 2, 2017 at 3:56 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> On Fri, Jun 02, 2017 at 03:12:48PM +0200, Arnd Bergmann wrote:
>> > I am almost done refactoring this series and this is the last review to
>> > address. What you suggest above makes sense but:
>> >
>> > 1) it means patching ALL dw_pcie_host_init() callers and allocate the
>> >    host bridge there, not sure it simplifies, certainly it complicates
>> >    the error handling path (given that the host bridge memory is
>> >    probably the only memory that is allocated with kzalloc instead of
>> >    devm interface so it needs unwinding)
>> >
>> > 2) I noticed that allocating the host bridge in the caller complicates
>> >    error handling, in particular code in the mainline (ie tegra and
>> >    ftpci100) using pci_alloc_host_bridge() needs already patching since it
>> >    may leak memory if PCI host bridge drivers probing fails.
>> >
>> > I can implement (1) and (2) but I wanted to ask first to understand if
>> > that's the direction we want to take.
>>
>> Good question. Maybe we should add a devm_pci_alloc_host_bridge()
>> instead? Would that solve these problems without creating bigger ones?
>
> It would be yet another PCI core call (ie unfortunately we still need
> pci_alloc_host_bridge() for bridges with no parent device eg bios32) but
> I think that's the only option we have if we do not want to clutter the
> host bridges error paths with host bridge free calls.
>
> Implementing it should be relatively simple by reshuffling functions.
>
> Thoughts ?

I think adding this one would be fairly harmless because it has a clear
purpose and can easily be mixed with the rest of the API.

In one of the earlier drafts, we discussed just letting the user call an
initialization function to set the members and otherwise using kmalloc()
themselves. We decided on this one to save an extra function call in
each driver, but in retrospect, it would have saved us the discussion
now.

If we end up adding a devm_pci_alloc_host_bridge (or maybe
pcim_alloc_host_bridge), we also need to decide what part of the
cleanup would happen during the unwinding, besides the kfree().

        Arnd