From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933553AbdEONIK (ORCPT ); Mon, 15 May 2017 09:08:10 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:45709 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1758488AbdEONIF (ORCPT ); Mon, 15 May 2017 09:08:05 -0400 From: Ivan Mikhaylov To: Alistair Popple , Matt Porter Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, Benjamin Herrenschmidt , Joel Stanley , Paul Mackerras , Michael Ellerman Subject: [PATCH 4/4] arch/powerpc/44x/fsp2: wdt tcr update instead of whole rewrite Date: Mon, 15 May 2017 16:07:54 +0300 X-Mailer: git-send-email 2.10.1 (Apple Git-78) X-MIMETrack: Itemize by SMTP Server on D06ML001/06/M/IBM(Release 9.0.1FP6HF197 | July 7, 2016) at 15/05/2017 14:07:59, Serialize by Router on D06ML001/06/M/IBM(Release 9.0.1FP6HF197 | July 7, 2016) at 15/05/2017 14:07:59, Serialize complete at 15/05/2017 14:07:59 X-TNEFEvaluated: 1 X-TM-AS-GCONF: 00 x-cbid: 17051513-0040-0000-0000-000003AA3D7D X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17051513-0041-0000-0000-000020210CB6 Message-Id: <20170515130754.59363-5-ivan@de.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-05-15_08:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1703280000 definitions=main-1705150135 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Prevent a kernel panic caused by unintentionally clearing TCR watchdog bits. At this point in the kernel boot, the watchdog has already been enabled by u-boot. The original code's attempt to write to the TCR register results in an inadvertent clearing of the watchdog configuration bits, causing the 476 to reset. Panic happens in case of error as silently reboot without any outputs on serial. Signed-off-by: Ivan Mikhaylov --- arch/powerpc/kernel/time.c | 16 ++++++++++++++++ 1 files changed, 16 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c index 2b33cfa..f75e512 100644 --- a/arch/powerpc/kernel/time.c +++ b/arch/powerpc/kernel/time.c @@ -738,12 +738,28 @@ static int __init get_freq(char *name, int cells, unsigned long *val) static void start_cpu_decrementer(void) { + unsigned int tcr; #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) /* Clear any pending timer interrupts */ mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS); +#ifdef CONFIG_FSP2 + /* + * Prevent a kernel panic caused by unintentionally clearing TCR + * watchdog bits. At this point in the kernel boot, the watchdog has + * already been enabled by u-boot. The original code's attempt to + * write to the TCR register results in an inadvertent clearing of the + * watchdog configuration bits, causing the 440 to reset. + */ + tcr = mfspr(SPRN_TCR); + tcr &= TCR_WP_MASK; /* clear all bits except for TCR[WP] */ + tcr |= TCR_DIE; /* enable decrementer */ + mtspr(SPRN_TCR, tcr); +#else /* Enable decrementer interrupt */ mtspr(SPRN_TCR, TCR_DIE); +#endif + #endif /* defined(CONFIG_BOOKE) || defined(CONFIG_40x) */ } -- 1.7.1