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From: Tom St Denis <tom.stdenis-5C7GfCeVMHo@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Tom St Denis <tom.stdenis-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH 1/6] drm/amd/display: Tidy up dce120_timing_generator_enable_advanced_request()
Date: Tue, 16 May 2017 10:22:00 -0400	[thread overview]
Message-ID: <20170516142205.468-2-tom.stdenis@amd.com> (raw)
In-Reply-To: <20170516142205.468-1-tom.stdenis-5C7GfCeVMHo@public.gmane.org>

Simplify the function by removing identical looking code blocks.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
---
 .../display/dc/dce120/dce120_timing_generator.c    | 37 +++++++---------------
 1 file changed, 12 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
index 245356e72b36..ce5612fe36b0 100644
--- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
+++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
@@ -669,36 +669,23 @@ void dce120_timing_generator_enable_advanced_request(
 				mmCRTC0_CRTC_START_LINE_CONTROL,
 				tg110->offsets.crtc);
 
-
-	if (enable) {
-		set_reg_field_value(
-			value,
-			0,
-			CRTC0_CRTC_START_LINE_CONTROL,
-			CRTC_LEGACY_REQUESTOR_EN);
-	} else {
-		set_reg_field_value(
-			value,
-			1,
-			CRTC0_CRTC_START_LINE_CONTROL,
-			CRTC_LEGACY_REQUESTOR_EN);
-	}
+	set_reg_field_value(
+		value,
+		enable ? 0 : 1,
+		CRTC0_CRTC_START_LINE_CONTROL,
+		CRTC_LEGACY_REQUESTOR_EN);
 
 	/* Program advanced line position acc.to the best case from fetching data perspective to hide MC latency
 	 * and prefilling Line Buffer in V Blank (to 10 lines as LB can store max 10 lines)
 	 */
 	if (v_sync_width_and_b_porch > 10)
-		set_reg_field_value(
-			value,
-			10,
-			CRTC0_CRTC_START_LINE_CONTROL,
-			CRTC_ADVANCED_START_LINE_POSITION);
-	else
-		set_reg_field_value(
-			value,
-			v_sync_width_and_b_porch,
-			CRTC0_CRTC_START_LINE_CONTROL,
-			CRTC_ADVANCED_START_LINE_POSITION);
+		v_sync_width_and_b_porch = 10;
+
+	set_reg_field_value(
+		value,
+		v_sync_width_and_b_porch,
+		CRTC0_CRTC_START_LINE_CONTROL,
+		CRTC_ADVANCED_START_LINE_POSITION);
 
 	dm_write_reg_soc15(tg->ctx,
 			mmCRTC0_CRTC_START_LINE_CONTROL,
-- 
2.12.0

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  parent reply	other threads:[~2017-05-16 14:22 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-16 14:21 Various minor Display DCE120 cleanups Tom St Denis
     [not found] ` <20170516142205.468-1-tom.stdenis-5C7GfCeVMHo@public.gmane.org>
2017-05-16 14:22   ` Tom St Denis [this message]
2017-05-16 14:22   ` [PATCH 2/6] drm/amd/display: Fix indentation in dce120_tg_program_timing() Tom St Denis
2017-05-16 14:22   ` [PATCH 3/6] drm/amd/display: Make dce120_tg_is_blanked() more legible Tom St Denis
2017-05-16 14:22   ` [PATCH 4/6] drm/amd/display: Clean up indentation in dce120_tg_set_blank() Tom St Denis
2017-05-16 14:22   ` [PATCH 5/6] drm/amd/display: Tidy up dce120_clock_source_create() Tom St Denis
2017-05-16 14:22   ` [PATCH 6/6] drm/amd/display: Tidy up mem_input_program_surface_flip_and_addr() Tom St Denis
     [not found]     ` <20170516142205.468-7-tom.stdenis-5C7GfCeVMHo@public.gmane.org>
2017-05-23 15:17       ` Deucher, Alexander
     [not found]         ` <BN6PR12MB1652B96CB688DCD1A7507C6CF7F90-/b2+HYfkarQqUD6E6FAiowdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2017-05-23 15:39           ` Harry Wentland

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