[U-Boot] [PATCH 13/14] drivers:usb:xhci:fsl: Implement Erratum A-010151 for FSL USB3 controller

From: Tom Rini <trini@konsulko.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 13/14] drivers:usb:xhci:fsl: Implement Erratum A-010151 for FSL USB3 controller
Date: Tue, 16 May 2017 15:30:25 -0400	[thread overview]
Message-ID: <20170516193025.GK5701@bill-the-cat> (raw)
In-Reply-To: <1494936994-20026-14-git-send-email-yinbo.zhu@nxp.com>

On Tue, May 16, 2017 at 08:16:33PM +0800, yinbo.zhu wrote:
> From: Sriram Dash <sriram.dash@nxp.com>
> 
> Currently the controller by default enables the Receive Detect feature in P3
> mode in USB 3.0 PHY. However, USB 3.0 PHY does not reliably support receive
> detection in P3 mode.
> Enabling the USB3 controller to configure USB in P2 mode whenever the Receive
> Detect feature is required.
> 
> Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
> Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
> ---
>  drivers/usb/host/xhci-dwc3.c | 5 +++++
>  drivers/usb/host/xhci-fsl.c  | 7 +++++++
>  include/linux/usb/dwc3.h     | 1 +
>  3 files changed, 13 insertions(+)
> 
> diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
> index 33961cd..adbd9b5 100644
> --- a/drivers/usb/host/xhci-dwc3.c
> +++ b/drivers/usb/host/xhci-dwc3.c
> @@ -97,3 +97,8 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
>  	setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL |
>  			GFLADJ_30MHZ(val));
>  }
> +
> +void dwc3_set_rxdetect_power_mode(struct dwc3 *dwc3_reg, u32 val)
> +{
> +	setbits_le32(&dwc3_reg->g_usb3pipectl[0], val);
> +}
> diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c
> index 3a16624..e8e90fa 100644
> --- a/drivers/usb/host/xhci-fsl.c
> +++ b/drivers/usb/host/xhci-fsl.c
> @@ -86,6 +86,13 @@ static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci)
>  	fsl_xhci_set_beat_burst_length(fsl_xhci->dwc3_reg);
>  
>  	/*
> +	* A-010151: USB controller to configure USB in P2 mode
> +	* whenever the Receive Detect feature is required
> +	*/
> +	dwc3_set_rxdetect_power_mode(fsl_xhci->dwc3_reg,
> +				     DWC3_GUSB3PIPECTL_DISRXDETP3);
> +
> +	/*
>  	 * A-010151: The dwc3 phy TSMC 28-nm HPM 0.9/1.8 V does not
>  	 * reliably support Rx Detect in P3 mode(P3 is the default
>  	 * setting). Therefore, some USB3.0 devices may not be detected
> diff --git a/include/linux/usb/dwc3.h b/include/linux/usb/dwc3.h
> index c1b23b2..873b4db 100644
> --- a/include/linux/usb/dwc3.h
> +++ b/include/linux/usb/dwc3.h
> @@ -220,5 +220,6 @@ void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode);
>  void dwc3_core_soft_reset(struct dwc3 *dwc3_reg);
>  int dwc3_core_init(struct dwc3 *dwc3_reg);
>  void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val);
> +void dwc3_set_rxdetect_power_mode(struct dwc3 *dwc3_reg, u32 val);
>  #endif
>  #endif /* __DWC3_H_ */

Marek?

-- 
Tom
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