From mboxrd@z Thu Jan 1 00:00:00 1970 From: Simon Glass Date: Mon, 22 May 2017 05:17:26 -0600 Subject: [U-Boot] [PATCH 06/12] arm: Disable LPAE if not enabled In-Reply-To: <20170522111732.11265-1-sjg@chromium.org> References: <20170522111732.11265-1-sjg@chromium.org> Message-ID: <20170522111732.11265-7-sjg@chromium.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de If CONFIG_ARMV7_LPAE is not defined we should make sure that the feature is disabled. This can happen if U-Boot is chain-loaded from another boot loader which does enable LPAE. Signed-off-by: Simon Glass --- arch/arm/lib/cache-cp15.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index f293573601..cf852c061b 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -172,6 +172,15 @@ static inline void mmu_setup(void) : : "r" (MEMORY_ATTRIBUTES) : "memory"); } #elif defined(CONFIG_CPU_V7) + if (is_hyp()) { + /* Set HTCR to disable LPAE */ + asm volatile("mcr p15, 4, %0, c2, c0, 2" + : : "r" (0) : "memory"); + } else { + /* Set TTBCR to disable LPAE */ + asm volatile("mcr p15, 0, %0, c2, c0, 2" + : : "r" (0) : "memory"); + } /* Set TTBR0 */ reg = gd->arch.tlb_addr & TTBR0_BASE_ADDR_MASK; #if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH) -- 2.13.0.303.g4ebf302169-goog