From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030775AbdEWPBr (ORCPT ); Tue, 23 May 2017 11:01:47 -0400 Received: from mail-oi0-f65.google.com ([209.85.218.65]:36147 "EHLO mail-oi0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934510AbdEWPBl (ORCPT ); Tue, 23 May 2017 11:01:41 -0400 Date: Tue, 23 May 2017 10:01:37 -0500 From: Rob Herring To: YT Shen Cc: Matthias Brugger , Mark Rutland , Thomas Gleixner , Jason Cooper , Marc Zyngier , Greg Kroah-Hartman , Catalin Marinas , Will Deacon , Mars Cheng , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, srv_heupstream@mediatek.com Subject: Re: [PATCH 2/2] arm64: dts: Add Mediatek SoC MT2712 and evaluation board dts and Makefile Message-ID: <20170523150137.ouyloy46ahuhsenu@rob-hp-laptop> References: <1495192186-22480-1-git-send-email-yt.shen@mediatek.com> <1495192186-22480-3-git-send-email-yt.shen@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1495192186-22480-3-git-send-email-yt.shen@mediatek.com> User-Agent: NeoMutt/20170113 (1.7.2) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, May 19, 2017 at 07:09:46PM +0800, YT Shen wrote: > This adds basic chip support for Mediatek 2712 > > Signed-off-by: YT Shen > --- > arch/arm64/boot/dts/mediatek/Makefile | 1 + > arch/arm64/boot/dts/mediatek/mt2712-evb.dts | 44 +++++++ > arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 172 ++++++++++++++++++++++++++++ > 3 files changed, 217 insertions(+) > create mode 100644 arch/arm64/boot/dts/mediatek/mt2712-evb.dts > create mode 100644 arch/arm64/boot/dts/mediatek/mt2712e.dtsi > > diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile > index 9fbfd32..fcc0604 100644 > --- a/arch/arm64/boot/dts/mediatek/Makefile > +++ b/arch/arm64/boot/dts/mediatek/Makefile > @@ -1,3 +1,4 @@ > +dtb-$(CONFIG_ARCH_MEDIATEK) += mt2712-evb.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt6755-evb.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb > diff --git a/arch/arm64/boot/dts/mediatek/mt2712-evb.dts b/arch/arm64/boot/dts/mediatek/mt2712-evb.dts > new file mode 100644 > index 0000000..40b0c91 > --- /dev/null > +++ b/arch/arm64/boot/dts/mediatek/mt2712-evb.dts > @@ -0,0 +1,44 @@ > +/* > + * Copyright (c) 2017 MediaTek Inc. > + * Author: YT Shen > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + */ You may want to dual license this. Not sure what the rest of Mediatek dts files do though. Also, you can use SPDX tag here if you want. > + > +/dts-v1/; > +#include "mt2712e.dtsi" > + > +/ { > + model = "MediaTek MT2712 evaluation board"; > + compatible = "mediatek,mt2712-evb", "mediatek,mt2712"; > + > + aliases { > + serial0 = &uart0; > + serial1 = &uart1; > + serial2 = &uart2; > + serial3 = &uart3; > + serial4 = &uart4; > + serial5 = &uart5; > + }; > + > + memory@40000000 { > + device_type = "memory"; > + reg = <0 0x40000000 0 0x80000000>; > + }; > + > + chosen { > + bootargs = "console=ttyS0,921600n1 initrd=0x45000000,90M"; Both of these have a way to be expressed in DT. For the initrd, the bootloader should be setting the address and size anyway. > + }; > +}; > + > +&uart0 { > + status = "okay"; > +}; > + > diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi > new file mode 100644 > index 0000000..40747a9 > --- /dev/null > +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi > @@ -0,0 +1,172 @@ > +/* > + * Copyright (c) 2017 MediaTek Inc. > + * Author: YT Shen > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + */ > + > +#include > +#include > + > +/ { > + compatible = "mediatek,mt2712"; > + interrupt-parent = <&sysirq>; > + #address-cells = <2>; > + #size-cells = <2>; > + > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cpu-map { > + cluster0 { > + core0 { > + cpu = <&cpu0>; > + }; > + core1 { > + cpu = <&cpu1>; > + }; > + }; > + > + cluster1 { > + core0 { > + cpu = <&cpu2>; > + }; > + }; > + }; > + > + cpu0: cpu@0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a35"; > + reg = <0x000>; > + }; > + > + cpu1: cpu@1 { > + device_type = "cpu"; > + compatible = "arm,cortex-a35"; > + reg = <0x001>; > + enable-method = "psci"; > + }; > + > + cpu2: cpu@200 { > + device_type = "cpu"; > + compatible = "arm,cortex-a72"; > + reg = <0x200>; > + enable-method = "psci"; > + }; > + }; > + > + psci { > + compatible = "arm,psci-0.2"; > + method = "smc"; > + }; > + > + uart_clk: dummy26m { > + compatible = "fixed-clock"; > + clock-frequency = <26000000>; > + #clock-cells = <0>; > + }; > + > + timer { > + compatible = "arm,armv8-timer"; > + interrupt-parent = <&gic>; > + interrupts = + (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, > + + (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, > + + (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, > + + (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; > + }; > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + compatible = "simple-bus"; > + ranges; > + > + uart5: serial@1000f000 { > + compatible = "mediatek,mt2712-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x1000f000 0 0x400>; > + interrupts = ; > + clocks = <&uart_clk>; > + status = "disabled"; > + }; > + > + sysirq: intpol-controller@10220a80 { interrupt-controller@... > + compatible = "mediatek,mt2712-sysirq", > + "mediatek,mt6577-sysirq"; > + interrupt-controller; > + #interrupt-cells = <3>; > + interrupt-parent = <&gic>; > + reg = <0 0x10220a80 0 0x40>; > + }; > + > + gic: interrupt-controller@10510000 { > + compatible = "arm,gic-400"; > + #interrupt-cells = <3>; > + interrupt-parent = <&gic>; > + interrupt-controller; > + reg = <0 0x10510000 0 0x1000>, > + <0 0x10520000 0 0x1000>, > + <0 0x10540000 0 0x2000>, > + <0 0x10560000 0 0x2000>; > + interrupts = + (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; > + }; > + > + uart0: serial@11002000 { > + compatible = "mediatek,mt2712-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x11002000 0 0x400>; > + interrupts = ; > + clocks = <&uart_clk>; > + status = "disabled"; > + }; > + > + uart1: serial@11003000 { > + compatible = "mediatek,mt2712-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x11003000 0 0x400>; > + interrupts = ; > + clocks = <&uart_clk>; > + status = "disabled"; > + }; > + > + uart2: serial@11004000 { > + compatible = "mediatek,mt2712-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x11004000 0 0x400>; > + interrupts = ; > + clocks = <&uart_clk>; > + status = "disabled"; > + }; > + > + uart3: serial@11005000 { > + compatible = "mediatek,mt2712-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x11005000 0 0x400>; > + interrupts = ; > + clocks = <&uart_clk>; > + status = "disabled"; > + }; > + > + uart4: serial@11019000 { > + compatible = "mediatek,mt2712-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x11019000 0 0x400>; > + interrupts = ; > + clocks = <&uart_clk>; > + status = "disabled"; > + }; > + }; > +}; > + > -- > 1.9.1 > > -- > To unsubscribe from this list: send the line "unsubscribe devicetree" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: robh@kernel.org (Rob Herring) Date: Tue, 23 May 2017 10:01:37 -0500 Subject: [PATCH 2/2] arm64: dts: Add Mediatek SoC MT2712 and evaluation board dts and Makefile In-Reply-To: <1495192186-22480-3-git-send-email-yt.shen@mediatek.com> References: <1495192186-22480-1-git-send-email-yt.shen@mediatek.com> <1495192186-22480-3-git-send-email-yt.shen@mediatek.com> Message-ID: <20170523150137.ouyloy46ahuhsenu@rob-hp-laptop> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Fri, May 19, 2017 at 07:09:46PM +0800, YT Shen wrote: > This adds basic chip support for Mediatek 2712 > > Signed-off-by: YT Shen > --- > arch/arm64/boot/dts/mediatek/Makefile | 1 + > arch/arm64/boot/dts/mediatek/mt2712-evb.dts | 44 +++++++ > arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 172 ++++++++++++++++++++++++++++ > 3 files changed, 217 insertions(+) > create mode 100644 arch/arm64/boot/dts/mediatek/mt2712-evb.dts > create mode 100644 arch/arm64/boot/dts/mediatek/mt2712e.dtsi > > diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile > index 9fbfd32..fcc0604 100644 > --- a/arch/arm64/boot/dts/mediatek/Makefile > +++ b/arch/arm64/boot/dts/mediatek/Makefile > @@ -1,3 +1,4 @@ > +dtb-$(CONFIG_ARCH_MEDIATEK) += mt2712-evb.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt6755-evb.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb > diff --git a/arch/arm64/boot/dts/mediatek/mt2712-evb.dts b/arch/arm64/boot/dts/mediatek/mt2712-evb.dts > new file mode 100644 > index 0000000..40b0c91 > --- /dev/null > +++ b/arch/arm64/boot/dts/mediatek/mt2712-evb.dts > @@ -0,0 +1,44 @@ > +/* > + * Copyright (c) 2017 MediaTek Inc. > + * Author: YT Shen > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + */ You may want to dual license this. Not sure what the rest of Mediatek dts files do though. Also, you can use SPDX tag here if you want. > + > +/dts-v1/; > +#include "mt2712e.dtsi" > + > +/ { > + model = "MediaTek MT2712 evaluation board"; > + compatible = "mediatek,mt2712-evb", "mediatek,mt2712"; > + > + aliases { > + serial0 = &uart0; > + serial1 = &uart1; > + serial2 = &uart2; > + serial3 = &uart3; > + serial4 = &uart4; > + serial5 = &uart5; > + }; > + > + memory at 40000000 { > + device_type = "memory"; > + reg = <0 0x40000000 0 0x80000000>; > + }; > + > + chosen { > + bootargs = "console=ttyS0,921600n1 initrd=0x45000000,90M"; Both of these have a way to be expressed in DT. For the initrd, the bootloader should be setting the address and size anyway. > + }; > +}; > + > +&uart0 { > + status = "okay"; > +}; > + > diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi > new file mode 100644 > index 0000000..40747a9 > --- /dev/null > +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi > @@ -0,0 +1,172 @@ > +/* > + * Copyright (c) 2017 MediaTek Inc. > + * Author: YT Shen > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + */ > + > +#include > +#include > + > +/ { > + compatible = "mediatek,mt2712"; > + interrupt-parent = <&sysirq>; > + #address-cells = <2>; > + #size-cells = <2>; > + > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cpu-map { > + cluster0 { > + core0 { > + cpu = <&cpu0>; > + }; > + core1 { > + cpu = <&cpu1>; > + }; > + }; > + > + cluster1 { > + core0 { > + cpu = <&cpu2>; > + }; > + }; > + }; > + > + cpu0: cpu at 0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a35"; > + reg = <0x000>; > + }; > + > + cpu1: cpu at 1 { > + device_type = "cpu"; > + compatible = "arm,cortex-a35"; > + reg = <0x001>; > + enable-method = "psci"; > + }; > + > + cpu2: cpu at 200 { > + device_type = "cpu"; > + compatible = "arm,cortex-a72"; > + reg = <0x200>; > + enable-method = "psci"; > + }; > + }; > + > + psci { > + compatible = "arm,psci-0.2"; > + method = "smc"; > + }; > + > + uart_clk: dummy26m { > + compatible = "fixed-clock"; > + clock-frequency = <26000000>; > + #clock-cells = <0>; > + }; > + > + timer { > + compatible = "arm,armv8-timer"; > + interrupt-parent = <&gic>; > + interrupts = + (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, > + + (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, > + + (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, > + + (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; > + }; > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + compatible = "simple-bus"; > + ranges; > + > + uart5: serial at 1000f000 { > + compatible = "mediatek,mt2712-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x1000f000 0 0x400>; > + interrupts = ; > + clocks = <&uart_clk>; > + status = "disabled"; > + }; > + > + sysirq: intpol-controller at 10220a80 { interrupt-controller at ... > + compatible = "mediatek,mt2712-sysirq", > + "mediatek,mt6577-sysirq"; > + interrupt-controller; > + #interrupt-cells = <3>; > + interrupt-parent = <&gic>; > + reg = <0 0x10220a80 0 0x40>; > + }; > + > + gic: interrupt-controller at 10510000 { > + compatible = "arm,gic-400"; > + #interrupt-cells = <3>; > + interrupt-parent = <&gic>; > + interrupt-controller; > + reg = <0 0x10510000 0 0x1000>, > + <0 0x10520000 0 0x1000>, > + <0 0x10540000 0 0x2000>, > + <0 0x10560000 0 0x2000>; > + interrupts = + (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; > + }; > + > + uart0: serial at 11002000 { > + compatible = "mediatek,mt2712-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x11002000 0 0x400>; > + interrupts = ; > + clocks = <&uart_clk>; > + status = "disabled"; > + }; > + > + uart1: serial at 11003000 { > + compatible = "mediatek,mt2712-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x11003000 0 0x400>; > + interrupts = ; > + clocks = <&uart_clk>; > + status = "disabled"; > + }; > + > + uart2: serial at 11004000 { > + compatible = "mediatek,mt2712-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x11004000 0 0x400>; > + interrupts = ; > + clocks = <&uart_clk>; > + status = "disabled"; > + }; > + > + uart3: serial at 11005000 { > + compatible = "mediatek,mt2712-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x11005000 0 0x400>; > + interrupts = ; > + clocks = <&uart_clk>; > + status = "disabled"; > + }; > + > + uart4: serial at 11019000 { > + compatible = "mediatek,mt2712-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x11019000 0 0x400>; > + interrupts = ; > + clocks = <&uart_clk>; > + status = "disabled"; > + }; > + }; > +}; > + > -- > 1.9.1 > > -- > To unsubscribe from this list: send the line "unsubscribe devicetree" in > the body of a message to majordomo at vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html