From mboxrd@z Thu Jan 1 00:00:00 1970 From: Richard Genoud Subject: [PATCH 2/2] gpio: mvebu: fix gpio bank registration when pwm is used Date: Tue, 30 May 2017 14:28:48 +0200 Message-ID: <20170530122848.2803-2-richard.genoud@gmail.com> References: <20170530122848.2803-1-richard.genoud@gmail.com> Return-path: Received: from mail-wm0-f65.google.com ([74.125.82.65]:34252 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751563AbdE3M3T (ORCPT ); Tue, 30 May 2017 08:29:19 -0400 In-Reply-To: <20170530122848.2803-1-richard.genoud@gmail.com> Sender: linux-gpio-owner@vger.kernel.org List-Id: linux-gpio@vger.kernel.org To: Linus Walleij Cc: Alexandre Courbot , Andrew Lunn , Gregory Clement , Jason Cooper , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org, Mark Rutland , Ralph Sennhauser , Rob Herring , Russell King , Sebastian Hesselbarth , Thierry Reding , Richard Genoud If more than one gpio bank has the "pwm" property, only one will be registered successfully, all the others will fail with: mvebu-gpio: probe of f1018140.gpio failed with error -17 That's because in alloc_pwms(), the chip->base (aka "int pwm"), was not set (thus, ==0) ; and 0 is a meaningful start value in alloc_pwm(). What was intended is chip->base = -1. Like that, the numbering will be done auto-magically Tested on clearfog-pro (Marvell 88F6828) Signed-off-by: Richard Genoud --- drivers/gpio/gpio-mvebu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c index cdef2c78cb3b..4734923e11fd 100644 --- a/drivers/gpio/gpio-mvebu.c +++ b/drivers/gpio/gpio-mvebu.c @@ -768,6 +768,7 @@ static int mvebu_pwm_probe(struct platform_device *pdev, mvpwm->chip.dev = dev; mvpwm->chip.ops = &mvebu_pwm_ops; mvpwm->chip.npwm = mvchip->chip.ngpio; + mvpwm->chip.base = -1; spin_lock_init(&mvpwm->lock); From mboxrd@z Thu Jan 1 00:00:00 1970 From: richard.genoud@gmail.com (Richard Genoud) Date: Tue, 30 May 2017 14:28:48 +0200 Subject: [PATCH 2/2] gpio: mvebu: fix gpio bank registration when pwm is used In-Reply-To: <20170530122848.2803-1-richard.genoud@gmail.com> References: <20170530122848.2803-1-richard.genoud@gmail.com> Message-ID: <20170530122848.2803-2-richard.genoud@gmail.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org If more than one gpio bank has the "pwm" property, only one will be registered successfully, all the others will fail with: mvebu-gpio: probe of f1018140.gpio failed with error -17 That's because in alloc_pwms(), the chip->base (aka "int pwm"), was not set (thus, ==0) ; and 0 is a meaningful start value in alloc_pwm(). What was intended is chip->base = -1. Like that, the numbering will be done auto-magically Tested on clearfog-pro (Marvell 88F6828) Signed-off-by: Richard Genoud --- drivers/gpio/gpio-mvebu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c index cdef2c78cb3b..4734923e11fd 100644 --- a/drivers/gpio/gpio-mvebu.c +++ b/drivers/gpio/gpio-mvebu.c @@ -768,6 +768,7 @@ static int mvebu_pwm_probe(struct platform_device *pdev, mvpwm->chip.dev = dev; mvpwm->chip.ops = &mvebu_pwm_ops; mvpwm->chip.npwm = mvchip->chip.ngpio; + mvpwm->chip.base = -1; spin_lock_init(&mvpwm->lock);