From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751673AbdFAI2S (ORCPT ); Thu, 1 Jun 2017 04:28:18 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:56104 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751644AbdFAI2O (ORCPT ); Thu, 1 Jun 2017 04:28:14 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 6CF72605A8 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sboyd@codeaurora.org Date: Thu, 1 Jun 2017 01:28:04 -0700 From: Stephen Boyd To: Yuantian Tang Cc: mturquette@baylibre.com, robh+dt@kernel.org, mark.rutland@arm.com, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Scott Wood Subject: Re: [PATCH 2/2 v2] clk: qoriq: Separate root input clock for core PLLs on ls1012a Message-ID: <20170601082804.GE20170@codeaurora.org> References: <1489977443-33582-1-git-send-email-andy.tang@nxp.com> <1489977443-33582-2-git-send-email-andy.tang@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1489977443-33582-2-git-send-email-andy.tang@nxp.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 03/20, Yuantian Tang wrote: > From: Scott Wood > > ls1012a has separate input root clocks for core PLLs versus the > platform PLL, with the latter described as sysclk in the hw docs. > If a second input clock, named "coreclk", is present, this clock will be > used for the core PLLs. > > Signed-off-by: Scott Wood > Signed-off-by: Tang Yuantian > Acked-by: Rob Herring > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project From mboxrd@z Thu Jan 1 00:00:00 1970 From: sboyd@codeaurora.org (Stephen Boyd) Date: Thu, 1 Jun 2017 01:28:04 -0700 Subject: [PATCH 2/2 v2] clk: qoriq: Separate root input clock for core PLLs on ls1012a In-Reply-To: <1489977443-33582-2-git-send-email-andy.tang@nxp.com> References: <1489977443-33582-1-git-send-email-andy.tang@nxp.com> <1489977443-33582-2-git-send-email-andy.tang@nxp.com> Message-ID: <20170601082804.GE20170@codeaurora.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 03/20, Yuantian Tang wrote: > From: Scott Wood > > ls1012a has separate input root clocks for core PLLs versus the > platform PLL, with the latter described as sysclk in the hw docs. > If a second input clock, named "coreclk", is present, this clock will be > used for the core PLLs. > > Signed-off-by: Scott Wood > Signed-off-by: Tang Yuantian > Acked-by: Rob Herring > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project