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From: Michael Rolnik <mrolnik@gmail.com>
To: qemu-devel@nongnu.org
Cc: anichang@protonmail.ch, Michael Rolnik <mrolnik@gmail.com>,
	Richard Henderson <rth@twiddle.net>
Subject: [Qemu-devel] [PATCH RFC v19 05/13] target-avr: adding AVR interrupt handling
Date: Thu,  8 Jun 2017 21:49:40 +0300	[thread overview]
Message-ID: <20170608184944.19406-6-mrolnik@gmail.com> (raw)
In-Reply-To: <20170608184944.19406-1-mrolnik@gmail.com>

Signed-off-by: Michael Rolnik <mrolnik@gmail.com>
Message-Id: <1471522070-77598-6-git-send-email-mrolnik@gmail.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target/avr/helper.c | 55 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 55 insertions(+)

diff --git a/target/avr/helper.c b/target/avr/helper.c
index c1871939b3..61255fdff3 100644
--- a/target/avr/helper.c
+++ b/target/avr/helper.c
@@ -32,11 +32,66 @@
 bool avr_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
 {
     bool ret = false;
+    CPUClass *cc = CPU_GET_CLASS(cs);
+    AVRCPU *cpu = AVR_CPU(cs);
+    CPUAVRState *env = &cpu->env;
+
+    if (interrupt_request & CPU_INTERRUPT_RESET) {
+        if (cpu_interrupts_enabled(env)) {
+            cs->exception_index = EXCP_RESET;
+            cc->do_interrupt(cs);
+
+            cs->interrupt_request &= ~CPU_INTERRUPT_RESET;
+
+            ret = true;
+        }
+    }
+    if (interrupt_request & CPU_INTERRUPT_HARD) {
+        if (cpu_interrupts_enabled(env) && env->intsrc != 0) {
+            int index = ctz32(env->intsrc);
+            cs->exception_index = EXCP_INT(index);
+            cc->do_interrupt(cs);
+
+            env->intsrc &= env->intsrc - 1; /* clear the interrupt */
+            cs->interrupt_request &= ~CPU_INTERRUPT_HARD;
+
+            ret = true;
+        }
+    }
     return ret;
 }
 
 void avr_cpu_do_interrupt(CPUState *cs)
 {
+    AVRCPU *cpu = AVR_CPU(cs);
+    CPUAVRState *env = &cpu->env;
+
+    uint32_t ret = env->pc_w;
+    int vector = 0;
+    int size = avr_feature(env, AVR_FEATURE_JMP_CALL) ? 2 : 1;
+    int base = 0; /* TODO: where to get it */
+
+    if (cs->exception_index == EXCP_RESET) {
+        vector = 0;
+    } else if (env->intsrc != 0) {
+        vector = ctz32(env->intsrc) + 1;
+    }
+
+    if (avr_feature(env, AVR_FEATURE_3_BYTE_PC)) {
+        cpu_stb_data(env, env->sp--, (ret & 0x0000ff));
+        cpu_stb_data(env, env->sp--, (ret & 0x00ff00) >>  8);
+        cpu_stb_data(env, env->sp--, (ret & 0xff0000) >> 16);
+    } else if (avr_feature(env, AVR_FEATURE_2_BYTE_PC)) {
+        cpu_stb_data(env, env->sp--, (ret & 0x0000ff));
+        cpu_stb_data(env, env->sp--, (ret & 0x00ff00) >>  8);
+    } else {
+        cpu_stb_data(env, env->sp--, (ret & 0x0000ff));
+    }
+
+    env->pc_w = base + vector * size;
+    env->sregI = 0; /* clear Global Interrupt Flag */
+
+    cs->exception_index = -1;
 }
 
 int avr_cpu_memory_rw_debug(CPUState *cs, vaddr addr, uint8_t *buf,
-- 
2.11.0 (Apple Git-81)

  parent reply	other threads:[~2017-06-08 18:50 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-08 18:49 [Qemu-devel] [PATCH RFC v19 00/13] QEMU AVR 8 bit cores Michael Rolnik
2017-06-08 18:49 ` [Qemu-devel] [PATCH RFC v19 01/13] target-avr: AVR cores support is added Michael Rolnik
2017-06-13 20:09   ` Thomas Huth
2017-06-13 20:32     ` Michael Rolnik
2017-06-14  5:19       ` Thomas Huth
2017-06-08 18:49 ` [Qemu-devel] [PATCH RFC v19 02/13] target-avr: adding AVR CPU features/flavors Michael Rolnik
2017-06-08 18:49 ` [Qemu-devel] [PATCH RFC v19 03/13] target-avr: adding a sample AVR board Michael Rolnik
2017-06-13 19:55   ` Thomas Huth
2017-06-08 18:49 ` [Qemu-devel] [PATCH RFC v19 04/13] target-avr: adding instructions encodings Michael Rolnik
2017-06-08 18:49 ` Michael Rolnik [this message]
2017-06-08 18:49 ` [Qemu-devel] [PATCH RFC v19 06/13] target-avr: adding helpers for IN, OUT, SLEEP, WBR & unsupported instructions Michael Rolnik
2017-06-08 18:49 ` [Qemu-devel] [PATCH RFC v19 07/13] target-avr: adding instruction translation Michael Rolnik
2017-06-08 18:49 ` [Qemu-devel] [PATCH RFC v19 08/13] target-avr: instruction decoder generator Michael Rolnik
2017-06-13 20:04   ` Thomas Huth
2017-06-08 18:49 ` [Qemu-devel] [PATCH RFC v19 09/13] target-avr: adding instruction decoder Michael Rolnik
2017-06-13 20:01   ` Thomas Huth
2017-06-13 20:29     ` Michael Rolnik
2017-06-14  5:14       ` Thomas Huth
2017-06-14  6:22         ` Michael Rolnik
2017-06-22  7:15 ` [Qemu-devel] [PATCH RFC v19 00/13] QEMU AVR 8 bit cores Michael Rolnik
2017-06-27 16:59   ` Anichang
2017-07-04 22:38   ` Richard Henderson
2017-07-05  6:34     ` Michael Rolnik
2017-07-05 15:59       ` Richard Henderson
2017-07-05 16:06         ` Michael Rolnik

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