From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751717AbdFIHlv (ORCPT ); Fri, 9 Jun 2017 03:41:51 -0400 Received: from mx1.redhat.com ([209.132.183.28]:50410 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751541AbdFIHlt (ORCPT ); Fri, 9 Jun 2017 03:41:49 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 4D520C057FA7 Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=peterx@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 4D520C057FA7 Date: Fri, 9 Jun 2017 15:41:44 +0800 From: Peter Xu To: Paolo Bonzini Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Longpeng , Huangweidong , Gonglei , wangxin , Radim =?utf-8?B?S3LEjW3DocWZ?= Subject: Re: [PATCH 2/4] KVM: VMX: avoid double list add with VT-d posted interrupts Message-ID: <20170609074143.GL3628@pxdev.xzpeter.org> References: <20170606105707.23207-1-pbonzini@redhat.com> <20170606105707.23207-3-pbonzini@redhat.com> <20170608065057.GB3628@pxdev.xzpeter.org> <463359347.7021259.1496905239878.JavaMail.zimbra@redhat.com> <20170608091644.GD3628@pxdev.xzpeter.org> <5cfad7aa-9069-5419-b0b3-41df74a4f551@redhat.com> <20170609025044.GH3628@pxdev.xzpeter.org> <821f022f-ff94-876d-2426-8b6ab35af65f@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <821f022f-ff94-876d-2426-8b6ab35af65f@redhat.com> User-Agent: Mutt/1.5.24 (2015-08-30) X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Fri, 09 Jun 2017 07:41:49 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jun 09, 2017 at 09:29:45AM +0200, Paolo Bonzini wrote: > > > On 09/06/2017 04:50, Peter Xu wrote: > > Even, I'm thinking whether we can unconditionally setup PDST only in > > pi_load(), then post_block() only needs to handle the NV bit. > > No, you can't do that without fiddling with the blocked_vcpu lists in > pi_load. Then how about we keep the blocked_vcpu list maintainance in post_block(), but only let pi_load() handle the PDST? (I really feel like they are two things - the blocked_vcpu list helps for the kick when wakeup happens; while PDST makes sure the PI is always pointing to the correct cpu) > > > (PS. since I'm at here... could I ask why in pi_pre_block we need to > > udpate PDST as well? I guess that decides who will run the > > wakeup_handler code to kick the vcpu thread, but would that really > > matter?) > > For this one it's a yes. :) I think it's not needed anymore indeed > after these patches; see this comment: > > /* > * The wakeup_handler expects the VCPU to be on the > * blocked_vcpu_list that matches ndst. Actually I was always unclear on what this sentense means: iiuc blocked_vcpu_list is only a list of vcpus that may need a kick, so why it has anything to do with PDST after all? (or say, no matter what PDST is, we just kick the vcpu thread without doing anything else, do we?) > Interrupts > * are disabled so no preemption should happen, but > * err on the side of safety. > */ > > So we could add a WARN. Thanks, -- Peter Xu