From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751989AbdFJKTx (ORCPT ); Sat, 10 Jun 2017 06:19:53 -0400 Received: from pandora.armlinux.org.uk ([78.32.30.218]:33936 "EHLO pandora.armlinux.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751890AbdFJKTv (ORCPT ); Sat, 10 Jun 2017 06:19:51 -0400 Date: Sat, 10 Jun 2017 11:19:43 +0100 From: Russell King - ARM Linux To: Hoeun Ryu Cc: Robin Murphy , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH] arm:lpae: build TTB control register value from scratch in v7_ttb_setup Message-ID: <20170610101943.GW4902@n2100.armlinux.org.uk> References: <1496803173-4894-1-git-send-email-hoeun.ryu@gmail.com> <448EF961-9178-4A3F-8995-F4E3466F4A92@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <448EF961-9178-4A3F-8995-F4E3466F4A92@gmail.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Jun 10, 2017 at 01:43:24PM +0900, Hoeun Ryu wrote: > Hello, Russell and Robin. > > Would you please review this patch ? I think it's fine, thanks. > > Than you > > > On Jun 7, 2017, at 11:39 AM, Hoeun Ryu wrote: > > > > Reading TTBCR in early boot stage might return the value of the previous > > kernel's configuration, especially in case of kexec. For example, if > > normal kernel (first kernel) had run on a configuration of PHYS_OFFSET <= > > PAGE_OFFSET and crash kernel (second kernel) is running on a configuration > > PHYS_OFFSET > PAGE_OFFSET, which can happen because it depends on the > > reserved area for crash kernel, reading TTBCR and using the value to OR > > other bit fields might be risky because it doesn't have a reset value for > > TTBCR. > > > > Suggested-by: Robin Murphy > > Signed-off-by: Hoeun Ryu > > --- > > > > * v1: amended based on > > - "[PATCHv2] arm: LPAE: kexec: clear TTBCR.T1SZ explicitly when > > PHYS_OFFSET > PAGE_OFFSET" > > - https://lkml.org/lkml/2017/6/5/239 > > > > arch/arm/mm/proc-v7-3level.S | 3 +-- > > 1 file changed, 1 insertion(+), 2 deletions(-) > > > > diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S > > index 5e5720e..7d16bbc 100644 > > --- a/arch/arm/mm/proc-v7-3level.S > > +++ b/arch/arm/mm/proc-v7-3level.S > > @@ -129,8 +129,7 @@ ENDPROC(cpu_v7_set_pte_ext) > > .macro v7_ttb_setup, zero, ttbr0l, ttbr0h, ttbr1, tmp > > ldr \tmp, =swapper_pg_dir @ swapper_pg_dir virtual address > > cmp \ttbr1, \tmp, lsr #12 @ PHYS_OFFSET > PAGE_OFFSET? > > - mrc p15, 0, \tmp, c2, c0, 2 @ TTB control egister > > - orr \tmp, \tmp, #TTB_EAE > > + mov \tmp, #TTB_EAE @ for TTB control egister > > ALT_SMP(orr \tmp, \tmp, #TTB_FLAGS_SMP) > > ALT_UP(orr \tmp, \tmp, #TTB_FLAGS_UP) > > ALT_SMP(orr \tmp, \tmp, #TTB_FLAGS_SMP << 16) > > -- > > 2.7.4 > > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -- RMK's Patch system: http://www.armlinux.org.uk/developer/patches/ FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up according to speedtest.net. From mboxrd@z Thu Jan 1 00:00:00 1970 From: linux@armlinux.org.uk (Russell King - ARM Linux) Date: Sat, 10 Jun 2017 11:19:43 +0100 Subject: [PATCH] arm:lpae: build TTB control register value from scratch in v7_ttb_setup In-Reply-To: <448EF961-9178-4A3F-8995-F4E3466F4A92@gmail.com> References: <1496803173-4894-1-git-send-email-hoeun.ryu@gmail.com> <448EF961-9178-4A3F-8995-F4E3466F4A92@gmail.com> Message-ID: <20170610101943.GW4902@n2100.armlinux.org.uk> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Sat, Jun 10, 2017 at 01:43:24PM +0900, Hoeun Ryu wrote: > Hello, Russell and Robin. > > Would you please review this patch ? I think it's fine, thanks. > > Than you > > > On Jun 7, 2017, at 11:39 AM, Hoeun Ryu wrote: > > > > Reading TTBCR in early boot stage might return the value of the previous > > kernel's configuration, especially in case of kexec. For example, if > > normal kernel (first kernel) had run on a configuration of PHYS_OFFSET <= > > PAGE_OFFSET and crash kernel (second kernel) is running on a configuration > > PHYS_OFFSET > PAGE_OFFSET, which can happen because it depends on the > > reserved area for crash kernel, reading TTBCR and using the value to OR > > other bit fields might be risky because it doesn't have a reset value for > > TTBCR. > > > > Suggested-by: Robin Murphy > > Signed-off-by: Hoeun Ryu > > --- > > > > * v1: amended based on > > - "[PATCHv2] arm: LPAE: kexec: clear TTBCR.T1SZ explicitly when > > PHYS_OFFSET > PAGE_OFFSET" > > - https://lkml.org/lkml/2017/6/5/239 > > > > arch/arm/mm/proc-v7-3level.S | 3 +-- > > 1 file changed, 1 insertion(+), 2 deletions(-) > > > > diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S > > index 5e5720e..7d16bbc 100644 > > --- a/arch/arm/mm/proc-v7-3level.S > > +++ b/arch/arm/mm/proc-v7-3level.S > > @@ -129,8 +129,7 @@ ENDPROC(cpu_v7_set_pte_ext) > > .macro v7_ttb_setup, zero, ttbr0l, ttbr0h, ttbr1, tmp > > ldr \tmp, =swapper_pg_dir @ swapper_pg_dir virtual address > > cmp \ttbr1, \tmp, lsr #12 @ PHYS_OFFSET > PAGE_OFFSET? > > - mrc p15, 0, \tmp, c2, c0, 2 @ TTB control egister > > - orr \tmp, \tmp, #TTB_EAE > > + mov \tmp, #TTB_EAE @ for TTB control egister > > ALT_SMP(orr \tmp, \tmp, #TTB_FLAGS_SMP) > > ALT_UP(orr \tmp, \tmp, #TTB_FLAGS_UP) > > ALT_SMP(orr \tmp, \tmp, #TTB_FLAGS_SMP << 16) > > -- > > 2.7.4 > > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel at lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -- RMK's Patch system: http://www.armlinux.org.uk/developer/patches/ FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up according to speedtest.net.