From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bruce Richardson Subject: [PATCH 09/18] crypto/aesni_mb: remove check for SSE4 Date: Tue, 20 Jun 2017 16:23:04 +0100 Message-ID: <20170620152313.107642-10-bruce.richardson@intel.com> References: <20170620152313.107642-1-bruce.richardson@intel.com> Cc: Bruce Richardson , dev@dpdk.org To: Declan Doherty Return-path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 6F3A97CBB for ; Tue, 20 Jun 2017 18:37:51 +0200 (CEST) In-Reply-To: <20170620152313.107642-1-bruce.richardson@intel.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Since SSE4 is now part of the minimum requirements for DPDK, we don't need to check for its presence any more. Signed-off-by: Bruce Richardson --- drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c index 45b25c9..9419dca 100644 --- a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c +++ b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c @@ -691,12 +691,8 @@ cryptodev_aesni_mb_create(const char *name, vector_mode = RTE_AESNI_MB_AVX2; else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX)) vector_mode = RTE_AESNI_MB_AVX; - else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_1)) + else vector_mode = RTE_AESNI_MB_SSE; - else { - MB_LOG_ERR("Vector instructions are not supported by CPU"); - return -EFAULT; - } dev = rte_cryptodev_pmd_virtual_dev_init(init_params->name, sizeof(struct aesni_mb_private), init_params->socket_id); -- 2.9.4