From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bruce Richardson Subject: [PATCH 13/18] net/enic: replace check for SSE4 with check for x86 Date: Tue, 20 Jun 2017 16:23:08 +0100 Message-ID: <20170620152313.107642-14-bruce.richardson@intel.com> References: <20170620152313.107642-1-bruce.richardson@intel.com> Cc: Bruce Richardson , dev@dpdk.org To: John Daley , Nelson Escobar Return-path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id 6D0B07CBB for ; Tue, 20 Jun 2017 18:38:31 +0200 (CEST) In-Reply-To: <20170620152313.107642-1-bruce.richardson@intel.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Since SSE4 is now minimum requirement for x86 platforms we can replace the check for SSE4 with a check for x86 Signed-off-by: Bruce Richardson --- drivers/net/enic/enic_clsf.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/enic/enic_clsf.c b/drivers/net/enic/enic_clsf.c index 9e94afd..9b46142 100644 --- a/drivers/net/enic/enic_clsf.c +++ b/drivers/net/enic/enic_clsf.c @@ -57,7 +57,7 @@ #include "vnic_intr.h" #include "vnic_nic.h" -#ifdef RTE_MACHINE_CPUFLAG_SSE4_2 +#ifdef RTE_ARCH_X86 #include #define DEFAULT_HASH_FUNC rte_hash_crc #else -- 2.9.4