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From: Andrew Jeffery <andrew@aj.id.au>
To: linus.walleij@linaro.org
Cc: Andrew Jeffery <andrew@aj.id.au>,
	robh+dt@kernel.org, mark.rutland@arm.com, joel@jms.id.au,
	benh@kernel.crashing.org, ryan_chen@aspeedtech.com,
	linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-aspeed@lists.ozlabs.org
Subject: [PATCH 2/4] ARM: aspeed: g5: Add USB functions to pinctrl bindings
Date: Tue, 27 Jun 2017 11:42:12 +0930	[thread overview]
Message-ID: <20170627021214.23323-3-andrew@aj.id.au> (raw)
In-Reply-To: <20170627021214.23323-1-andrew@aj.id.au>

The Aspeed AST2500 SoC contains a number of USB controllers:

* USB 1.1 Host Controller
* USB 2.0 Host Controller (x2)
* Combined USB 2.0 Virtual Hub and USB 1.1 HID Controller

The controllers are exposed via two USB ports with functionality muxed
as required. The following table illustrates the relationships between
the ports and the controllers via the mux function names:

Port  | USB Version  | USB Mode     | Mux Function
------|--------------|--------------|-------------
A     | 2.0          | Virtual Hub  | USB2AD
A     | 2.0          | Host         | USB2AH
B     | 1.1          | HID          | USB11BHID
B     | 2.0          | Device       | USB2BD
B     | 2.0          | Host         | USB2BH

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
 Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt
index 09142dab47db..3b7266c7c438 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt
@@ -87,7 +87,8 @@ SALT11 SALT12 SALT13 SALT14 SALT2 SALT3 SALT4 SALT5 SALT6 SALT7 SALT8 SALT9
 SCL1 SCL2 SD1 SD2 SDA1 SDA2 SGPS1 SGPS2 SIOONCTRL SIOPBI SIOPBO SIOPWREQ
 SIOPWRGD SIOS3 SIOS5 SIOSCI SPI1 SPI1CS1 SPI1DEBUG SPI1PASSTHRU SPI2CK SPI2CS0
 SPI2CS1 SPI2MISO SPI2MOSI TIMER3 TIMER4 TIMER5 TIMER6 TIMER7 TIMER8 TXD1 TXD2
-TXD3 TXD4 UART6 USBCKI VGABIOSROM VGAHS VGAVS VPI24 VPO WDTRST1 WDTRST2
+TXD3 TXD4 UART6 USB11BHID USB2AD USB2AH USB2BD USB2BH USBCKI VGABIOSROM VGAHS
+VGAVS VPI24 VPO WDTRST1 WDTRST2
 
 Examples
 ========
-- 
2.11.0


  reply	other threads:[~2017-06-27  2:13 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-27  2:12 [PATCH 0/4] pinctrl: Add USB support for Aspeed SoCs Andrew Jeffery
2017-06-27  2:12 ` Andrew Jeffery
2017-06-27  2:12 ` Andrew Jeffery [this message]
2017-06-29 20:13   ` [PATCH 2/4] ARM: aspeed: g5: Add USB functions to pinctrl bindings Rob Herring
2017-06-29 20:32     ` Rob Herring
2017-06-30  1:14       ` Andrew Jeffery
2017-06-27  2:12 ` [PATCH 3/4] pinctrl: aspeed: g4: Add USB device and host support Andrew Jeffery
2017-06-27  2:12 ` [PATCH 4/4] pinctrl: aspeed: g5: " Andrew Jeffery
     [not found] ` <20170627021214.23323-1-andrew-zrmu5oMJ5Fs@public.gmane.org>
2017-06-27  2:12   ` [PATCH 1/4] ARM: aspeed: g4: Add USB functions to pinctrl bindings Andrew Jeffery
2017-06-27  2:12     ` Andrew Jeffery
2017-06-27  3:53     ` Benjamin Herrenschmidt
     [not found]       ` <1498535619.3651.29.camel-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org>
2017-06-30  1:13         ` Andrew Jeffery
2017-06-30  1:13           ` Andrew Jeffery
     [not found]     ` <20170627021214.23323-2-andrew-zrmu5oMJ5Fs@public.gmane.org>
2017-06-29 20:12       ` Rob Herring
2017-06-29 20:12         ` Rob Herring
2017-06-29 12:53   ` [PATCH 0/4] pinctrl: Add USB support for Aspeed SoCs Linus Walleij
2017-06-29 12:53     ` Linus Walleij
2017-06-30  1:24     ` Andrew Jeffery

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