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From: Pranith Kumar <bobby.prani@gmail.com>
To: alex.bennee@linaro.org
Cc: qemu-devel@nongnu.org, rth@twiddle.net
Subject: [Qemu-devel] [PATCH v2 1/3] tcg/aarch64: Introduce and use long branch to register
Date: Thu, 29 Jun 2017 03:52:41 -0400	[thread overview]
Message-ID: <20170629075243.26984-2-bobby.prani@gmail.com> (raw)
In-Reply-To: <20170629075243.26984-1-bobby.prani@gmail.com>

We can use a branch to register instruction for exit_tb for offsets
greater than 128MB.

CC: Richard Henderson <rth@twiddle.net>
CC: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>
---
 tcg/aarch64/tcg-target.inc.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index 1fa3bccc89..8fce11ace7 100644
--- a/tcg/aarch64/tcg-target.inc.c
+++ b/tcg/aarch64/tcg-target.inc.c
@@ -819,6 +819,17 @@ static inline void tcg_out_goto(TCGContext *s, tcg_insn_unit *target)
     tcg_out_insn(s, 3206, B, offset);
 }
 
+static inline void tcg_out_goto_long(TCGContext *s, tcg_insn_unit *target)
+{
+    ptrdiff_t offset = target - s->code_ptr;
+    if (offset == sextract64(offset, 0, 26)) {
+        tcg_out_insn(s, 3206, BL, offset);
+    } else {
+        tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_TMP, (intptr_t)target);
+        tcg_out_insn(s, 3207, BR, TCG_REG_TMP);
+    }
+}
+
 static inline void tcg_out_goto_noaddr(TCGContext *s)
 {
     /* We pay attention here to not modify the branch target by reading from
@@ -1364,10 +1375,10 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
     case INDEX_op_exit_tb:
         /* Reuse the zeroing that exists for goto_ptr.  */
         if (a0 == 0) {
-            tcg_out_goto(s, s->code_gen_epilogue);
+            tcg_out_goto_long(s, s->code_gen_epilogue);
         } else {
             tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_X0, a0);
-            tcg_out_goto(s, tb_ret_addr);
+            tcg_out_goto_long(s, tb_ret_addr);
         }
         break;
 
-- 
2.13.0

  reply	other threads:[~2017-06-29  7:52 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-29  7:52 [Qemu-devel] [PATCH v2 0/3] Relax code buffer size limitation on aarch64 hosts Pranith Kumar
2017-06-29  7:52 ` Pranith Kumar [this message]
2017-06-29 16:24   ` [Qemu-devel] [PATCH v2 1/3] tcg/aarch64: Introduce and use long branch to register Richard Henderson
2017-06-29  7:52 ` [Qemu-devel] [PATCH v2 2/3] tcg/aarch64: Use ADRP+ADD to compute target address Pranith Kumar
2017-06-29 16:36   ` Richard Henderson
2017-06-29  7:52 ` [Qemu-devel] [PATCH v3 3/3] tcg/aarch64: Enable indirect jump path using LDR (literal) Pranith Kumar
2017-06-29 16:41   ` Richard Henderson

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