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From: Mahesh Kumar <mahesh1.kumar@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: paulo.r.zanoni@intel.com, maarten.lankhorst@intel.com
Subject: [PATCH 1/2] drm/i915/skl+: Check for supported plane configuration in Interlace mode
Date: Thu, 29 Jun 2017 14:27:39 +0530	[thread overview]
Message-ID: <20170629085740.31588-2-mahesh1.kumar@intel.com> (raw)
In-Reply-To: <20170629085740.31588-1-mahesh1.kumar@intel.com>

In Gen9 platform Interlaced fetch mode doesn't support following plane
configuration:
 - Y/Yf tiling
 - 90/270 rotation
 - Scaling
 - YUV420 hybrid planar source pixel formats.

This patch adds check to fail the flip if any of the above configuration
is requested.

Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 36 ++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 4e03ca6c946f..1f2394a0c07d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11022,6 +11022,7 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
 	bool is_crtc_enabled = crtc_state->active;
 	bool turn_off, turn_on, visible, was_visible;
 	struct drm_framebuffer *fb = plane_state->fb;
+	const struct drm_display_mode *mode = &crtc_state->adjusted_mode;
 	int ret;
 
 	if (INTEL_GEN(dev_priv) >= 9 && plane->id != PLANE_CURSOR) {
@@ -11108,6 +11109,41 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
 	    !needs_scaling(old_plane_state))
 		pipe_config->disable_lp_wm = true;
 
+	/*
+	 * Y-tiling is not supported in IF-ID Interlace mode in
+	 * GEN9 and above.
+	 * Scaling is not supported with Interlaced fetch mode.
+	 * YUV420 hybrid planar source pixel formats are not supported with
+	 * Interlaced fetch mode.
+	 */
+	if (visible && INTEL_GEN(dev_priv) >= 9 &&
+				mode->flags & DRM_MODE_FLAG_INTERLACE) {
+		struct drm_format_name_buf format_name;
+
+		if (fb->modifier == I915_FORMAT_MOD_Y_TILED ||
+		    fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
+			DRM_DEBUG_KMS("Y/Yf tiling not supported in IF-ID mode\n");
+			return -EINVAL;
+		}
+
+		if (needs_scaling(to_intel_plane_state(plane_state))) {
+			DRM_DEBUG_KMS("Scaling not supported in IF-ID mode\n");
+			return -EINVAL;
+		}
+
+		switch (fb->format->format) {
+		case DRM_FORMAT_NV12:
+		case DRM_FORMAT_YUV420:
+		case DRM_FORMAT_YVU420:
+			DRM_DEBUG_KMS("Unsupported pixel format %s for IF-ID\n",
+				      drm_get_format_name(fb->format->format,
+				      &format_name));
+			return -EINVAL;
+		default:
+			break;
+		}
+	}
+
 	return 0;
 }
 
-- 
2.13.0

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2017-06-29  8:54 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-29  8:57 [PATCH 0/2] Handle unsupported configuration with IF-ID Mahesh Kumar
2017-06-29  8:57 ` Mahesh Kumar [this message]
2017-06-29 14:06   ` [PATCH 1/2] drm/i915/skl+: Check for supported plane configuration in Interlace mode Ville Syrjälä
2017-06-29 14:21     ` Mahesh Kumar
2017-06-29  8:57 ` [PATCH 2/2] drm/i915/skl+: Pipe scaling not supported in IF-ID " Mahesh Kumar
2017-06-29 14:16   ` Ville Syrjälä
2017-06-29 14:59     ` Mahesh Kumar
2017-06-29  9:12 ` ✓ Fi.CI.BAT: success for Handle unsupported configuration with IF-ID Patchwork

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