From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753511AbdF2P3X (ORCPT ); Thu, 29 Jun 2017 11:29:23 -0400 Received: from mx1.redhat.com ([209.132.183.28]:50330 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752852AbdF2P3P (ORCPT ); Thu, 29 Jun 2017 11:29:15 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com D4D2CA1486 Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=jolsa@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com D4D2CA1486 Date: Thu, 29 Jun 2017 17:29:12 +0200 From: Jiri Olsa To: kan.liang@intel.com Cc: acme@kernel.org, linux-kernel@vger.kernel.org, mingo@redhat.com, peterz@infradead.org, adrian.hunter@intel.com, alexander.shishkin@linux.intel.com, ak@linux.intel.com Subject: Re: [PATCH] perf tools: set no branch type for dummy event in PT Message-ID: <20170629152912.GB1463@krava> References: <20170628143153.29643-1-kan.liang@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170628143153.29643-1-kan.liang@intel.com> User-Agent: Mutt/1.8.3 (2017-05-23) X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Thu, 29 Jun 2017 15:29:15 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jun 28, 2017 at 10:31:53AM -0400, kan.liang@intel.com wrote: > From: Kan Liang > > An earlier kernel patch allowed enabling PT and LBR at the same > time on Goldmont. > commit ccbebba4c6bf ("perf/x86/intel/pt: Bypass PT vs. LBR > exclusivity if the core supports it") > However, users still cannot use Intel PT and LBRs simultaneously. > $ sudo perf record -e cycles,intel_pt//u -b -- sleep 1 > Error: > PMU Hardware doesn't support sampling/overflow-interrupts. > > PT implicitly adds dummy event in perf tool. dummy event is > software event which doesn't support LBR. > > Always setting branch_type=no for dummy event in Intel PT. > > Signed-off-by: Kan Liang > --- > tools/perf/arch/x86/util/intel-pt.c | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/tools/perf/arch/x86/util/intel-pt.c b/tools/perf/arch/x86/util/intel-pt.c > index f630de0..651ab9e 100644 > --- a/tools/perf/arch/x86/util/intel-pt.c > +++ b/tools/perf/arch/x86/util/intel-pt.c > @@ -544,6 +544,22 @@ static int intel_pt_validate_config(struct perf_pmu *intel_pt_pmu, > evsel->attr.config); > } > > +static int add_no_lbr_config_term(struct list_head *config_terms) > +{ > + struct perf_evsel_config_term *lbr_term; > + > + lbr_term = zalloc(sizeof(*lbr_term)); > + if (!lbr_term) > + return -ENOMEM; > + > + INIT_LIST_HEAD(&lbr_term->list); > + lbr_term->type = PERF_EVSEL__CONFIG_TERM_BRANCH; > + lbr_term->val.branch = strdup("no"); > + list_add_tail(&lbr_term->list, config_terms); > + > + return 0; > +} > + > static int intel_pt_recording_options(struct auxtrace_record *itr, > struct perf_evlist *evlist, > struct record_opts *opts) > @@ -701,6 +717,8 @@ static int intel_pt_recording_options(struct auxtrace_record *itr, > perf_evsel__set_sample_bit(switch_evsel, TIME); > perf_evsel__set_sample_bit(switch_evsel, CPU); > > + add_no_lbr_config_term(&switch_evsel->config_terms); > + hum, why can't you change the sample bit directly? with: perf_evsel__reset_sample_bit(switch_evsel, BRANCH_STACK); jirka