From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752347AbdF3KBk (ORCPT ); Fri, 30 Jun 2017 06:01:40 -0400 Received: from foss.arm.com ([217.140.101.70]:39992 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751874AbdF3KAC (ORCPT ); Fri, 30 Jun 2017 06:00:02 -0400 From: Andre Przywara To: Jassi Brar , Sudeep Holla Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Maxime Ripard , Chen-Yu Tsai , Icenowy Zheng , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH 5/8] arm64: dts: allwinner: a64: add SCPI DVFS nodes Date: Fri, 30 Jun 2017 10:56:05 +0100 Message-Id: <20170630095608.24943-6-andre.przywara@arm.com> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20170630095608.24943-1-andre.przywara@arm.com> References: <20170630095608.24943-1-andre.przywara@arm.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org One functionality provided by the SCPI handler is frequency scaling, which allows to switch the one CPU cluster between several operating points, each specifying a matching frequency and CPU voltage. The actual table is specified in firmware and can be queried by Linux using standardised SCPI calls. Signed-off-by: Andre Przywara --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index ef6f10e..58c3675 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -61,6 +61,7 @@ device_type = "cpu"; reg = <0>; enable-method = "psci"; + clocks = <&scpi_dvfs 0>; }; cpu1: cpu@1 { @@ -68,6 +69,7 @@ device_type = "cpu"; reg = <1>; enable-method = "psci"; + clocks = <&scpi_dvfs 0>; }; cpu2: cpu@2 { @@ -75,6 +77,7 @@ device_type = "cpu"; reg = <2>; enable-method = "psci"; + clocks = <&scpi_dvfs 0>; }; cpu3: cpu@3 { @@ -82,6 +85,7 @@ device_type = "cpu"; reg = <3>; enable-method = "psci"; + clocks = <&scpi_dvfs 0>; }; }; @@ -148,6 +152,17 @@ compatible = "arm,scpi"; mboxes = <&mailbox 0>; shmem = <&cpu_scp_mem>; + + scpi-clocks { + compatible = "arm,scpi-clocks"; + + scpi_dvfs: scpi_dvfs_clocks { + compatible = "arm,scpi-dvfs-clocks"; + #clock-cells = <1>; + clock-indices = <0>; + clock-output-names = "cpu_clk"; + }; + }; }; soc { -- 2.9.0 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andre Przywara Subject: [PATCH 5/8] arm64: dts: allwinner: a64: add SCPI DVFS nodes Date: Fri, 30 Jun 2017 10:56:05 +0100 Message-ID: <20170630095608.24943-6-andre.przywara@arm.com> References: <20170630095608.24943-1-andre.przywara@arm.com> Reply-To: andre.przywara-5wv7dgnIgG8@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org In-Reply-To: <20170630095608.24943-1-andre.przywara-5wv7dgnIgG8@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Jassi Brar , Sudeep Holla Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org, Maxime Ripard , Chen-Yu Tsai , Icenowy Zheng , Rob Herring , Mark Rutland , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org One functionality provided by the SCPI handler is frequency scaling, which allows to switch the one CPU cluster between several operating points, each specifying a matching frequency and CPU voltage. The actual table is specified in firmware and can be queried by Linux using standardised SCPI calls. Signed-off-by: Andre Przywara --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index ef6f10e..58c3675 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -61,6 +61,7 @@ device_type = "cpu"; reg = <0>; enable-method = "psci"; + clocks = <&scpi_dvfs 0>; }; cpu1: cpu@1 { @@ -68,6 +69,7 @@ device_type = "cpu"; reg = <1>; enable-method = "psci"; + clocks = <&scpi_dvfs 0>; }; cpu2: cpu@2 { @@ -75,6 +77,7 @@ device_type = "cpu"; reg = <2>; enable-method = "psci"; + clocks = <&scpi_dvfs 0>; }; cpu3: cpu@3 { @@ -82,6 +85,7 @@ device_type = "cpu"; reg = <3>; enable-method = "psci"; + clocks = <&scpi_dvfs 0>; }; }; @@ -148,6 +152,17 @@ compatible = "arm,scpi"; mboxes = <&mailbox 0>; shmem = <&cpu_scp_mem>; + + scpi-clocks { + compatible = "arm,scpi-clocks"; + + scpi_dvfs: scpi_dvfs_clocks { + compatible = "arm,scpi-dvfs-clocks"; + #clock-cells = <1>; + clock-indices = <0>; + clock-output-names = "cpu_clk"; + }; + }; }; soc { -- 2.9.0 From mboxrd@z Thu Jan 1 00:00:00 1970 From: andre.przywara@arm.com (Andre Przywara) Date: Fri, 30 Jun 2017 10:56:05 +0100 Subject: [PATCH 5/8] arm64: dts: allwinner: a64: add SCPI DVFS nodes In-Reply-To: <20170630095608.24943-1-andre.przywara@arm.com> References: <20170630095608.24943-1-andre.przywara@arm.com> Message-ID: <20170630095608.24943-6-andre.przywara@arm.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org One functionality provided by the SCPI handler is frequency scaling, which allows to switch the one CPU cluster between several operating points, each specifying a matching frequency and CPU voltage. The actual table is specified in firmware and can be queried by Linux using standardised SCPI calls. Signed-off-by: Andre Przywara --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index ef6f10e..58c3675 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -61,6 +61,7 @@ device_type = "cpu"; reg = <0>; enable-method = "psci"; + clocks = <&scpi_dvfs 0>; }; cpu1: cpu at 1 { @@ -68,6 +69,7 @@ device_type = "cpu"; reg = <1>; enable-method = "psci"; + clocks = <&scpi_dvfs 0>; }; cpu2: cpu at 2 { @@ -75,6 +77,7 @@ device_type = "cpu"; reg = <2>; enable-method = "psci"; + clocks = <&scpi_dvfs 0>; }; cpu3: cpu at 3 { @@ -82,6 +85,7 @@ device_type = "cpu"; reg = <3>; enable-method = "psci"; + clocks = <&scpi_dvfs 0>; }; }; @@ -148,6 +152,17 @@ compatible = "arm,scpi"; mboxes = <&mailbox 0>; shmem = <&cpu_scp_mem>; + + scpi-clocks { + compatible = "arm,scpi-clocks"; + + scpi_dvfs: scpi_dvfs_clocks { + compatible = "arm,scpi-dvfs-clocks"; + #clock-cells = <1>; + clock-indices = <0>; + clock-output-names = "cpu_clk"; + }; + }; }; soc { -- 2.9.0