From: Patchwork <patchwork@emeril.freedesktop.org>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/cnl: Allow 2 pixel per clock on Cannonlake.
Date: Thu, 17 Aug 2017 01:28:06 -0000 [thread overview]
Message-ID: <20170817012806.29783.42895@emeril.freedesktop.org> (raw)
In-Reply-To: <20170817005441.17273-1-rodrigo.vivi@intel.com>
== Series Details ==
Series: series starting with [1/2] drm/i915/cnl: Allow 2 pixel per clock on Cannonlake.
URL : https://patchwork.freedesktop.org/series/28890/
State : success
== Summary ==
Series 28890v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/28890/revisions/1/mbox/
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
pass -> DMESG-WARN (fi-byt-n2820) fdo#101705
fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705
fi-bdw-5557u total:279 pass:268 dwarn:0 dfail:0 fail:0 skip:11 time:453s
fi-bdw-gvtdvm total:279 pass:265 dwarn:0 dfail:0 fail:0 skip:14 time:441s
fi-blb-e6850 total:279 pass:224 dwarn:1 dfail:0 fail:0 skip:54 time:356s
fi-bsw-n3050 total:279 pass:243 dwarn:0 dfail:0 fail:0 skip:36 time:552s
fi-bxt-j4205 total:279 pass:260 dwarn:0 dfail:0 fail:0 skip:19 time:519s
fi-byt-j1900 total:279 pass:254 dwarn:1 dfail:0 fail:0 skip:24 time:525s
fi-byt-n2820 total:279 pass:250 dwarn:1 dfail:0 fail:0 skip:28 time:514s
fi-glk-2a total:279 pass:260 dwarn:0 dfail:0 fail:0 skip:19 time:614s
fi-hsw-4770 total:279 pass:263 dwarn:0 dfail:0 fail:0 skip:16 time:446s
fi-hsw-4770r total:279 pass:263 dwarn:0 dfail:0 fail:0 skip:16 time:422s
fi-ilk-650 total:279 pass:229 dwarn:0 dfail:0 fail:0 skip:50 time:428s
fi-ivb-3520m total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:508s
fi-ivb-3770 total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:476s
fi-kbl-7500u total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:476s
fi-kbl-7560u total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:599s
fi-kbl-r total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:598s
fi-pnv-d510 total:279 pass:223 dwarn:1 dfail:0 fail:0 skip:55 time:526s
fi-skl-6260u total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:468s
fi-skl-6700k total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:477s
fi-skl-6770hq total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:489s
fi-skl-gvtdvm total:279 pass:266 dwarn:0 dfail:0 fail:0 skip:13 time:444s
fi-skl-x1585l total:279 pass:268 dwarn:0 dfail:0 fail:0 skip:11 time:489s
fi-snb-2520m total:279 pass:251 dwarn:0 dfail:0 fail:0 skip:28 time:545s
fi-snb-2600 total:279 pass:250 dwarn:0 dfail:0 fail:0 skip:29 time:410s
ada53b43f81fe618f3f0f1dfbd3dd776bb277323 drm-tip: 2017y-08m-16d-15h-18m-56s UTC integration manifest
36dd9803628a drm/i915: Introduce HAS_2PPC.
82245cda4c5c drm/i915/cnl: Allow 2 pixel per clock on Cannonlake.
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5420/
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next prev parent reply other threads:[~2017-08-17 1:28 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-17 0:54 [PATCH 1/2] drm/i915/cnl: Allow 2 pixel per clock on Cannonlake Rodrigo Vivi
2017-08-17 0:54 ` [PATCH 2/2] drm/i915: Introduce HAS_2PPC Rodrigo Vivi
2017-08-30 19:12 ` Pandiyan, Dhinakaran
2017-08-30 19:32 ` Chris Wilson
2017-08-31 2:58 ` Pandiyan, Dhinakaran
2017-08-31 4:40 ` Rodrigo Vivi
2017-08-31 7:59 ` Daniel Vetter
2017-08-17 1:28 ` Patchwork [this message]
2017-08-30 18:14 ` [PATCH 1/2] drm/i915/cnl: Allow 2 pixel per clock on Cannonlake Pandiyan, Dhinakaran
2017-08-30 18:59 ` Ville Syrjälä
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