From: Jiri Olsa <jolsa@redhat.com>
To: Andi Kleen <ak@linux.intel.com>
Cc: Andi Kleen <andi@firstfloor.org>,
peterz@infradead.org, acme@kernel.org, jolsa@kernel.org,
linux-kernel@vger.kernel.org, Joe Mario <jmario@redhat.com>
Subject: Re: [PATCH v5 3/4] perf, tools: Add support for printing new mem_info encodings
Date: Wed, 23 Aug 2017 16:14:01 +0200 [thread overview]
Message-ID: <20170823141401.GA16889@krava> (raw)
In-Reply-To: <20170823140032.GE28715@tassilo.jf.intel.com>
On Wed, Aug 23, 2017 at 07:00:32AM -0700, Andi Kleen wrote:
> > Andi,
> > how is this 'Remote' different from the remote levels in mem_lvl?
> >
> > "Remote RAM (1 hop)",
> > "Remote RAM (2 hops)",
> > "Remote Cache (1 hop)",
> > "Remote Cache (2 hops)",
>
> It applies to any other level. This is needed to express
> "Remote unknown level", as is reported by Skylake.
so if I find HITM with this flag set I should count it
as remote HITM then? something like attached.. untested
thanks,
jirka
---
diff --git a/tools/perf/util/mem-events.c b/tools/perf/util/mem-events.c
index 06f5a3a4295c..65e22b9e59f9 100644
--- a/tools/perf/util/mem-events.c
+++ b/tools/perf/util/mem-events.c
@@ -279,6 +279,7 @@ int c2c_decode_stats(struct c2c_stats *stats, struct mem_info *mi)
u64 lvl = data_src->mem_lvl;
u64 snoop = data_src->mem_snoop;
u64 lock = data_src->mem_lock;
+ bool mr = data_src->mem_remote;
int err = 0;
#define HITM_INC(__f) \
@@ -324,7 +325,7 @@ do { \
}
if ((lvl & P(LVL, REM_RAM1)) ||
- (lvl & P(LVL, REM_RAM2))) {
+ (lvl & P(LVL, REM_RAM2)) || mr) {
stats->rmt_dram++;
if (snoop & P(SNOOP, HIT))
stats->ld_shared++;
@@ -334,7 +335,7 @@ do { \
}
if ((lvl & P(LVL, REM_CCE1)) ||
- (lvl & P(LVL, REM_CCE2))) {
+ (lvl & P(LVL, REM_CCE2)) || mr) {
if (snoop & P(SNOOP, HIT))
stats->rmt_hit++;
else if (snoop & P(SNOOP, HITM))
next prev parent reply other threads:[~2017-08-23 14:14 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-16 22:21 Fix Skylake PEBS data source for perf v5 Andi Kleen
2017-08-16 22:21 ` [PATCH v5 1/4] perf/x86: Move Nehalem PEBS code to flag Andi Kleen
2017-08-25 11:53 ` [tip:perf/core] " tip-bot for Andi Kleen
2017-08-16 22:21 ` [PATCH v5 2/4] perf/x86: Fix data source decoding for Skylake Andi Kleen
2017-08-25 11:53 ` [tip:perf/core] " tip-bot for Andi Kleen
2017-08-16 22:21 ` [PATCH v5 3/4] perf, tools: Add support for printing new mem_info encodings Andi Kleen
2017-08-23 13:01 ` Jiri Olsa
2017-08-23 14:00 ` Andi Kleen
2017-08-23 14:14 ` Jiri Olsa [this message]
2017-08-23 15:59 ` Andi Kleen
2017-08-24 8:23 ` Jiri Olsa
2017-08-24 8:23 ` [tip:perf/core] perf " tip-bot for Andi Kleen
2017-08-16 22:21 ` [PATCH v5 4/4] perf, tools: Add test cases for new data source encoding Andi Kleen
2017-08-24 8:23 ` [tip:perf/core] perf test: " tip-bot for Andi Kleen
2017-08-22 15:37 ` Fix Skylake PEBS data source for perf v5 Arnaldo Carvalho de Melo
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